KR20100052297A - Electrostatic discharge protection circuit - Google Patents

Electrostatic discharge protection circuit Download PDF

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Publication number
KR20100052297A
KR20100052297A KR1020080111252A KR20080111252A KR20100052297A KR 20100052297 A KR20100052297 A KR 20100052297A KR 1020080111252 A KR1020080111252 A KR 1020080111252A KR 20080111252 A KR20080111252 A KR 20080111252A KR 20100052297 A KR20100052297 A KR 20100052297A
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South Korea
Prior art keywords
electrostatic
line
voltage line
input
electrostatic discharge
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KR1020080111252A
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Korean (ko)
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KR101006096B1 (en
Inventor
김장후
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주식회사 하이닉스반도체
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Priority to KR1020080111252A priority Critical patent/KR101006096B1/en
Publication of KR20100052297A publication Critical patent/KR20100052297A/en
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Publication of KR101006096B1 publication Critical patent/KR101006096B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0255—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using diodes as protective elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0259—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using bipolar transistors as protective elements
    • H01L27/0262—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using bipolar transistors as protective elements including a PNP transistor and a NPN transistor, wherein each of said transistors has its base coupled to the collector of the other transistor, e.g. silicon controlled rectifier [SCR] devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0292—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using a specific configuration of the conducting means connecting the protective devices, e.g. ESD buses
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0296—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices involving a specific disposition of the protective devices

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE: An electrostatic discharge protection circuit is provided to design a highly integrated semiconductor circuit by serially connecting a plurality of diode in order to reduce a junction capacitance of an input-output pad. CONSTITUTION: An electrostatic bus-line(402) is arranged between a power-voltage line(400) and a ground-voltage line(404). The cathode of a PN diode(422) is connected to a connection line between the inner circuit(410) of a semiconductor and an input-output pad(412). A first electrostatic discharge unit forms a path through which electrostatic current is discharged. A second electrostatic discharge unit is connected to a terminal which is connected to a ground-voltage line and the electrostatic bus-line. The third electrostatic discharge unit discharges the electrostatic current to the power-voltage line.

Description

Electrostatic Discharge Protection Circuit

The present invention relates to a semiconductor device, and more particularly, to an electrostatic discharge protection circuit that protects an internal circuit from static electricity flowing into an input / output pad.

Most semiconductor integrated circuits install an electrostatic protection circuit between the input / output pads and the semiconductor internal circuitry to protect the main circuit from damage caused by static electricity.

1 is a typical electrostatic discharge circuit used in an input / output circuit of a semiconductor circuit. An electrostatic discharge circuit directly connected to an input / output pad remains off while the circuit is in normal operation, thereby affecting normal circuit operation. However, when static electricity is generated between the input / output pad and the voltage line, the electrostatic discharge circuit enters an operation mode to provide an electrostatic discharge path to protect the internal circuit from the transient current caused by static electricity.

In general, the static electricity protection circuit in Figure 1 is a MOS transistor, diode, SCR

The combination of (silicon-controlled rectifier) is widely used. Electrostatic discharge circuits installed in the input / output pads do not have good electrical performance of the circuits or semiconductor devices necessary for preventing static electricity, and have a large chip area, which may adversely affect the price of the chip. Among them, the most serious problem is that the junction capacitance (Pincap) of the electrostatic discharge circuit connected to the input / output pad increases, and the area occupied by the electrostatic protection circuit increases.

Parasitic resistance, inductance, and capacitance of input / output pads must be very small in order for a semiconductor device to operate at high speed, but a junction capacitance of an electrostatic protection circuit directly connected to the input / output pad is one obstacle. At present, efforts to reduce this have continued in many ways.

In addition, in the conventional circuit illustrated in FIG. 1, since one electrostatic protection circuit is connected to one input / output pad, the electrostatic protection circuit occupies a large amount of chip area, and thus it is difficult to adequately cope with the high integration trend. .

However, in the conventional static electricity protection circuit, the junction capacitance is lowered by reducing the size of the static electricity protection circuit, but in this case, since the static electricity protection performance is also lowered, it is not good to reduce the capacitance by reducing the static electricity protection circuit. Thus, the static electricity protection circuit required for the high speed operation circuit should be able to lower the capacitance without reducing the performance.

2 illustrates a structure of an existing static electricity protection circuit. This structure uses diode structure and RC triggering circuit to improve characteristics in negative power supply voltage (Vdd) mode and positive ground voltage (Vss) mode. This structure is designed to reduce PinRC with high speed, but it has a problem of consuming a large area to implement RC and power clamp.

The present invention provides a circuit for discharging static electricity to protect the internal circuit of the semiconductor circuit from static electricity flowing into the input / output pad.

In addition, the present invention provides an electrostatic protection circuit that reduces the junction capacitors of the input / output stage, and reduces the area occupied by the chip without reducing the electrostatic protection performance.

Power supply voltage line; A ground voltage line; An electrostatic bus line disposed between the power supply voltage line and the ground voltage line; A connection line between the semiconductor internal circuit and the input / output pad; A first electrostatic discharge unit connected to the connection line and connected to the electrostatic bus line and forming a path for discharging an electrostatic current flowing into the input / output pad; A second electrostatic discharge unit connected to the connection line, connected to a terminal connected to the ground voltage line and the electrostatic bus line, and discharging an electrostatic current flowing into the input / output pad; And a third electrostatic discharge unit connected to the first electrostatic discharge unit by the electrostatic bus line and discharging an electrostatic current having a discharge path formed on the electrostatic bus line to the power supply voltage line.

Preferably, the first electrostatic discharge part is composed of a plurality of diodes having an anode connected to the connection line and a cathode connected to the electrostatic bus line.

In the plurality of diodes, two or more diodes are preferably connected in series.

Preferably, the second electrostatic discharge part includes a diode having a cathode connected to the connection line, and an anode connected to the ground voltage line and a connection terminal of the electrostatic discharge line.

The diode is preferably composed of a zener diode and a junction diode.

Preferably, the third electrostatic discharge portion is composed of a transistor.

Preferably, the transistor includes an NMOS transistor having a drain connected to the power supply voltage line, a gate, a source, and a bulk connected to the electrostatic bus line.

The transistor is preferably composed of a MOS transistor, a bipolar transistor and an SCR.

Power supply voltage line; Electrostatic bus line; Connection line connecting the semiconductor internal circuit and the input / output pad; A plurality of PN diodes having a cathode connected to the electrostatic bus line, an anode connected to the connection line, and positively discharged to the electrostatic bus line when positive static electricity flows into the input / output pads; A PN diode having a cathode connected to the connection line, an anode connected to the electrostatic bus line, and having a negative electrostatic charge flowing into the input / output pad; And an NMOS transistor for discharging the static electricity having a gate, a source, and a bulk connected to the electrostatic bus line, a drain connected to the power supply voltage line, and a discharge path formed on the electrostatic bus line to the power supply voltage line. do.

A ground voltage line; Electrostatic bus line; Connection line connecting the semiconductor internal circuit and the input / output pad; A plurality of PN diodes having a cathode connected to the electrostatic bus line, an anode connected to the connection line, and positively discharged to the ground voltage line through the electrostatic bus line when positive static electricity flows into the input / output pads. ; And a PN diode having a cathode connected to the connection line, an anode connected to the ground voltage line, and electrostatic discharged to the ground voltage line when negative static electricity flows into the input / output pad.

The present invention eliminates the RC triggering circuit compared to the conventional static protection circuit, thereby reducing the area occupied by the static electricity protection circuit, and by connecting a plurality of diodes in series, thereby reducing the junction capacitance of the input / output pads. By contributing to the improvement of speed, there is an effect that a highly integrated high performance semiconductor circuit can be designed.

The present invention proposes an electrostatic discharge circuit that reduces junction capacitance at the input / output pad and reduces the footprint of the electrostatic protection circuit without reducing the electrostatic protection performance.

3 illustrates an electrostatic protection circuit in which an electrostatic bus line 302 is installed between the power supply voltage line 300 and the ground voltage line 304 to discharge an electrostatic current applied to the input / output pad 312. .

Specifically, the cathode of the PN diode 322 is connected to the connection line connecting the internal circuit 310 and the input / output pad 312, the anode is connected to the electrostatic bus line 302, and the PN diode 324 in parallel. Is connected to the connection line, and the cathode is connected to the electrostatic busline 302.

At this time, the electrostatic busline 302 is in a floating state. The electrostatic bus line 302 is connected to the power supply voltage line 300 or the ground voltage line 304 and the transistors 320 and 326 so that the static electricity bus line 302 is separated from the power supply voltage line 300 and the ground voltage line 304 in a normal state. It is in a state.

Since the electrostatic protection circuit configured in this manner forms an electrostatic discharge path using the electrostatic bus line 302, the electrostatic discharge path is always formed of the power supply voltage line 300 and the ground voltage line 304, thereby providing a conventional method. Compared with the structure, the electrostatic protection performance is not reduced.

In addition, the present invention proposes a structure as shown in FIG. 4 in order to have a smaller junction capacitance and to occupy a smaller area than that of a conventional static electricity protection circuit (see FIG. 3).

Looking at the configuration of the present invention in detail with reference to Figure 4 as follows.

The present invention is the power supply voltage line 400, electrostatic bus line 402, ground voltage line

404, an internal circuit 410, an input / output pad 412, a PN diode 420, an NP diode 422, and an NMOS transistor 424.

Specifically, the electrostatic bus line 402 disposed in parallel with the power supply voltage line 400. The electrostatic busline 402 includes a branch path connected to the ground voltage line 404. The cathode is connected to the electrostatic busline 402 and the anode is internal circuit

The plurality of PN diodes 420 connected to the connection line of the 410 and the input / output pad 412 discharge the positive electrostatic current flowing into the input / output pad to the electrostatic bus line 402. The NP diode 422, whose cathode is connected to the connection line of the internal circuit 410 and the input / output pad 412, and the anode is connected to the electrostatic discharge line 402 and the ground voltage line 404, has an electrostatic bus line ( 402 or ground voltage line 404 to discharge an electrostatic current. Drain connects to power supply voltage line 400 and gate, source and bulk connect to electrostatic busline 402

The NMOS transistor 424 is configured to form a path for discharging the electrostatic current flowing through the electrostatic bus line 402 to the power supply voltage line 400.

Referring to FIG. 4, the present invention is improved in comparison with the problems of the prior invention, wherein the first electrostatic discharge is connected to the connection line between the electrostatic bus line 402 and the internal circuit 410 and the input / output pad 412. The unit is preferably configured by connecting a plurality of diodes 420 in series, thereby reducing leakage current. In addition, the equivalent capacitance due to the series connection of the diodes is reduced, resulting in a decrease in the junction capacitance of the input / output pads 412.

In addition, the second electrostatic discharge unit is connected to a terminal to which the electrostatic bus line 402 and the ground voltage line 404 are connected, and is connected to the connection line of the internal circuit 410 and the input / output pad 412. Using a diode 422, the power supply voltage line 400 and the ground voltage line

Omitting the RC triggering circuit between 404 causes a reduction in area.

Accordingly, the present invention has the effect of reducing the junction capacitance and the area occupied without reducing the electrostatic protection performance, thereby solving the problems of the conventional electrostatic protection circuit, and thus reducing the low junction capacitance without reducing the electrostatic protection performance. The branch can be designed for the static electricity protection circuit.

Looking at the operation of the present invention with reference to Figures 5-a, 5-b as follows.

First, referring to a path (power voltage line mode) in which the static electricity is discharged to the power supply voltage line 400, when positive static electricity is applied to the input / output pad 412, the PN diode 420 is operated and the PN diode 420 is operated. The electrostatic current is discharged to the power supply voltage line 400 through the parasitic PN diode of the NMOS transistor 424 via the electrostatic bus line 402 connected to the cathode of (path 1).

When negative static electricity is applied to the input / output pad 412, the NP diode 422 is operated, and the parasitic of the NMOS transistor 424 is passed through the electrostatic bus line 402 connected to the anode of the NP diode 422. Electrostatic current is discharged to the power supply voltage line 400 through the PN diode (Path 2).

On the other hand, looking at the path (ground voltage line mode) to the electrostatic discharge to the ground voltage line 404, when a positive static electricity is applied to the input / output pad 412, the PN diode 420 is operated, the PN diode 420 Electrostatic current is discharged to the ground voltage line 404 through the electrostatic bus line 402 connected to the cathode of ().

When negative static electricity is applied to the input / output pad 412, the NP diode 422 is operated, and the electrostatic current is discharged to the ground voltage line 404 connected to the anode of the NP diode 422. (Path 4)

Looking at the operation process according to another embodiment,

If the ground voltage line 404 is omitted, the PN diode 420 operates when positive static electricity is applied to the input / output pad 412, and the parasitic PN of the NMOS transistor 424 is passed through the electrostatic bus line 402. When the static electricity is discharged or negative static electricity is applied to the power supply voltage line 400 through the diode, the NP diode 422 is operated, and the power is supplied through the parasitic PN diode of the NMOS transistor 424 through the electrostatic bus line 402. The static electricity is discharged to the voltage line 400 to provide the path 1 and the path 2 described above (see FIG. 5-A).

When the power supply voltage line 400 and the NMOS transistor 424 are omitted, when a positive static electricity flows into the input / output pad 412, the PN diode 420 operates and the ground voltage is passed through the electrostatic bus line 402. Electrostatic discharge to line 404. When negative static electricity is introduced, when the NP diode 422 is operated, electrostatic discharge is performed directly to the ground voltage line 404 to provide the paths 3 and 4 described above. (See Figure 5-b)

In the circuit of the present invention shown in FIG. 4, the power supply voltage line 400 and the ground voltage line 404 are disconnected by the transistor 424 in normal operation. The transistor 424 includes a bipolar transistor, a field oxide transistor, a MOS transistor, and an SCR.

Controlled Rectifier) and a combination of these electrostatic protection elements.

In normal operation, the electrostatic bus line 402 and the input / output pad 412 are disconnected by the multiple PN diodes 420, and the ground voltage line 404 and the input / output pad 412 are connected to the NP diode 422. Disconnected by The diodes may be composed of a junction diode, a zener diode and a combination of these electrostatic protection elements.

Internal circuit by electrostatic discharge circuit composed of the transistor or diode

Since the 410 and the input / output pad 412 are disconnected, the internal circuit 410 and the input / output pad 412 are not affected.

In view of the reduction in the junction capacitance of the present invention, multiple PN diodes

The use of 420 reduces the junction capacitance of the input / output pad 412 because the junction capacitance of the series diode is that the capacitors are connected in series, thereby reducing the size of the equivalent capacitance.

Looking at the aspect of reducing the occupied area of the present invention, since the RC triggering circuit is omitted in Figure 4 it is possible to reduce the occupied area of the static electricity protection circuit.

As described above, the present invention includes the discharge line 406 in the electrostatic bus line 402 to vary the discharge path of the electrostatic current flowing into the input / output pad 412 to the path 1 to the path 4 before. Compared with the performance of the electrostatic discharge circuit, the performance does not fall. In addition, since the RC triggering circuit used in the conventional invention is omitted, the area occupied by the static electricity protection circuit can be reduced.

In addition, by connecting a plurality of diodes in series with the electrostatic protection element has the effect of reducing the junction capacitance in the input / output pad 412.

6 to 8 are simulation results for comparing the performance of the electrostatic discharge circuit of the present invention and the conventional invention. Referring to FIGS. 6 and 8 to compare the present invention and the conventional invention, the turn-on voltage is 5-6 volts in the case of the negative power supply voltage and the positive ground voltage in the case of the conventional invention (see FIG. 6). Compared to), the turn-on voltage for all the electrostatic discharge paths of the present invention has a characteristic of 5 volts or less (see FIG. 8), and has a very good characteristic.

In addition, referring to FIG. 7, since the leakage current of the present invention has a very small size, the leakage current has a characteristic of preventing leakage current.

1 is a protection circuit used for an input / output circuit of a semiconductor circuit according to the prior art.

2 is a static discharge circuit including a RC trigger unit according to the prior art

3 is an electrostatic discharge circuit according to the prior art

4 is an electrostatic discharge circuit according to an embodiment of the present invention.

Figure 5-a is a power supply voltage mode electrostatic discharge path of the present invention

5-b is a ground voltage mode electrostatic discharge path of the present invention.

6 is a graph illustrating a turn-on voltage simulation of the related art.

Figure 7 is a leakage current (leakage current) simulation graph of the present invention

8 is a graph illustrating a turn-on voltage simulation of the present invention.

Claims (10)

Power supply voltage line; A ground voltage line; An electrostatic bus line disposed between the power supply voltage line and the ground voltage line; A connection line between the semiconductor internal circuit and the input / output pad; A first electrostatic discharge unit connected to the connection line and connected to the electrostatic bus line and forming a path for discharging an electrostatic current flowing into the input / output pad; A second electrostatic discharge unit connected to the connection line, connected to a terminal connected to the ground voltage line and the electrostatic bus line, and discharging an electrostatic current flowing into the input / output pad; And A third electrostatic discharge unit connected to the first electrostatic discharge unit by the electrostatic bus line and discharging an electrostatic current having a discharge path formed on the electrostatic bus line to the power voltage line; Electrostatic discharge protection circuit comprising a. The method of claim 1, And wherein the first electrostatic discharge portion comprises a plurality of diodes having an anode connected to the connection line and a cathode connected to the electrostatic bus line. The method of claim 2, The plurality of diodes are electrostatic discharge protection circuit, characterized in that two or more diodes are connected in series. The method of claim 1, And the second electrostatic discharge part comprises a diode having a cathode connected to the connection line, and an anode connected to the ground voltage line and the connection terminal of the electrostatic discharge line. The method according to any one of claims 2 to 4, The diode is a zener diode, a junction diode, characterized in that the electrostatic discharge protection circuit. The method of claim 1, And said third electrostatic discharge portion comprises a transistor. The method of claim 6, And the transistor comprises an NMOS transistor having a drain connected to the power supply voltage line, a gate, a source, and a bulk connected to the electrostatic bus line. The method of claim 6, And the transistor comprises a MOS transistor, a bipolar transistor, and an SCR. Power supply voltage line; Electrostatic buslines; A connection line connecting the semiconductor internal circuit and the input / output pads; A plurality of PN diodes having a cathode connected to the electrostatic bus line, an anode connected to the connection line, and positively discharged to the electrostatic bus line when positive static electricity flows into the input / output pads; A PN diode having a cathode connected to the connection line, an anode connected to the electrostatic bus line, and having a negative electrostatic charge flowing into the input / output pad; And An NMOS transistor for discharging static electricity having a gate, a source, and a bulk connected to the electrostatic bus line, a drain connected to the power supply voltage line, and a discharge path formed in the electrostatic bus line to the power supply voltage line; Electrostatic discharge circuit comprising a. A ground voltage line; Electrostatic buslines; A connection line connecting the semiconductor internal circuit and the input / output pads; A plurality of PN diodes having a cathode connected to the electrostatic bus line, an anode connected to the connection line, and positively discharged to the ground voltage line through the electrostatic bus line when positive static electricity flows into the input / output pads. ; And A PN diode having a cathode connected to the connection line, an anode connected to the ground voltage line, and electrostatically discharged to the ground voltage line when negative static electricity flows into the input / output pads; Electrostatic discharge circuit comprising a.
KR1020080111252A 2008-11-10 2008-11-10 Electrostatic discharge protection circuit KR101006096B1 (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012057464A2 (en) * 2010-10-28 2012-05-03 숭실대학교산학협력단 Diode for electrostatic protection

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3920276B2 (en) 2004-04-20 2007-05-30 Ｎｅｃエレクトロニクス株式会社 ESD protection circuit
JP4282581B2 (en) 2004-09-29 2009-06-24 株式会社東芝 ESD protection circuit
KR100855265B1 (en) * 2006-06-30 2008-09-01 주식회사 하이닉스반도체 Electrostatic discharge protection circuit

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012057464A2 (en) * 2010-10-28 2012-05-03 숭실대학교산학협력단 Diode for electrostatic protection
KR101159468B1 (en) * 2010-10-28 2012-06-25 숭실대학교산학협력단 Electrostatic discharge protection diode
WO2012057464A3 (en) * 2010-10-28 2012-07-05 숭실대학교산학협력단 Diode for electrostatic protection
US8717724B2 (en) 2010-10-28 2014-05-06 Soongsil University Research Consortium Techno-Park Diode for electrostatic protection

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