KR20100000678A - A printed circuit board comprising embeded electronic component within and a method for manufacturing the same - Google Patents

Abstract

PURPOSE: An electronic device embedded printed circuit board and a manufacturing method thereof are provided to match an external connection bump of the electronic device with a via of an outer layer circuit pattern by mounting the electronic device based on an alignment hole. CONSTITUTION: A base substrate(100) includes a first insulation layer, an upper circuit pattern, and a lower circuit pattern. The upper circuit pattern is formed in an upper side of the first insulation layer. The lower circuit pattern is formed in the lower side of the first insulation layer. A cavity(200) and an alignment hole(500) passes through the base substrate. An electronic device(300) is embedded in the cavity. The external connection bump is formed on one side of the electronic device. A second insulation layer(700) is stacked in the upper side and the lower side of the base substrate. The second insulation layer fills the alignment hole.

Description

Electronic printed circuit board and its manufacturing method {A PRINTED CIRCUIT BOARD COMPRISING EMBEDED ELECTRONIC COMPONENT WITHIN AND A METHOD FOR MANUFACTURING THE SAME}

The present invention relates to an electronic device embedded printed circuit board and a method of manufacturing the same, and more particularly to an electronic device embedded printed circuit board having an alignment hole aligned with the lower circuit pattern of the base substrate.

Various technologies are required in the implementation of printed circuit boards in the market, which tends to require profile reduction and various functions in semiconductor packages.

For example, in the manufacture of Flip Chip Ball Grid Array (FCBGA) packages, the electrically conductive terminals or lands of the IC components are directly connected to the corresponding lands of the die bond region on the surface of the substrate using reflowable solder bumps or balls. Is soldered. At this time, the electronic component or components are functionally connected to other elements of the electronic system through a layer of electrically conductive paths including the substrate traces, and the substrate traces generally carry signals transmitted between electronic components such as the IC of the system. . In the case of FCBGA, the IC at the top of the substrate and the capacitor at the bottom may be surface-mounted respectively. In this case, the path of the circuit connecting the IC and the capacitor, that is, the length of the connection circuit, is increased by the thickness of the substrate. Increased values adversely affect electrical performance. In addition, since a certain area of the bottom surface can only be used for chip mounting, for example, a user who wants a ball array on all the bottom surfaces can not satisfy the requirements, such as design freedom.

As a solution to this problem, component embedding technology for reducing circuit paths by inserting components into a board is emerging.

1A and 1B illustrate a conventional method for manufacturing a printed circuit board embedded with an electronic component, which will be described with reference to the related art.

First, FIG. 1A shows a substrate body 10 having an insulating material 13 having a cavity 20 on which an electronic component 30 can be mounted, and an electronic component 30 disposed above the cavity 20, respectively. do. The electronic component 30 is coupled to the header (not shown) by vacuum adsorption and transported to be mounted on the substrate body 10. At this time, when the electronic component 30 is mounted, the insulating layer 70 is stacked on the substrate body 10 and is electrically connected to the connection pad 33 formed on one surface of the electronic component 30 on the insulating layer 70. The circuit layer 90 including the vias 93 and the circuit patterns 91 may be formed to manufacture a printed circuit board embedded with the electronic component 30.

However, since the connection pads 33 of the electronic component 30 are not observed in appearance after the insulating layer 70 is laminated on the substrate body 10, the via holes exposing the connection pads 33 on the insulating layer 70. There is a problem in that the alignment is difficult to form.

In order to maintain the mating of the connection pad 33 and the via 93, the electronic component 30 must be mounted in an aligned state to a predetermined standard. In the related art, as illustrated in FIG. 1A, a circuit pattern 15 and an electronic component formed on an upper portion of the substrate body 10 through a detection device 60 disposed between the substrate body 10 and the electronic component 30. The electronic component 30 was mounted so that the position of the connection pad 33 was aligned with the circuit pattern 15 formed on the substrate main body 10 by detecting the position of the connection pad 33 of the substrate 30.

However, the direction in which the connection pad 33 is positioned is not the circuit pattern 15 formed on the upper portion of the substrate body 10 but the circuit pattern 17 formed on the lower portion of the substrate body 10. Although the circuit pattern 15 formed on the upper portion of the substrate body 10 and the circuit pattern 17 formed on the lower portion are formed to satisfy certain matching requirements for interlayer conduction, they are formed on the upper and lower portions due to an error in the resist exposure process. The resulting circuit patterns 15 and 17 are not completely matched. Therefore, when mounting the electronic component 30 based on the circuit pattern 15 formed on the substrate body 10, as shown in Figure 1b, the connection pad 33 and the insulating layer of the electronic component 30. There was a problem that matching between vias 93 formed in the circuit layer 90 formed on the 70 did not occur.

As described above, there was a similar problem in the face-up mounting method as well as the face-down mounting method. That is, when mounting an electronic component in a face-up manner, the position of the connection pad of the electronic component cannot be detected by the header which carries the electronic component. Therefore, in the face-up mounting method, the electronic component is arranged based on the external shape of the electronic component and the upper circuit pattern of the substrate body. However, in the case of a semiconductor chip, since the external shape does not have a constant shape in an error of a dicing process, the mounting pad has a problem in that the position of the connection pad is not matched with the via hole of the external circuit layer.

Therefore, it has been required to propose a structure and a manufacturing method of an electronic device-embedded printed circuit board capable of matching the via 93 formed on the outer side of the substrate body 10 with the connection pad 33 of the electronic component 30. .

The present invention has been made to solve the above problems of the prior art, and the structure of the printed circuit board and the manufacturing method of the external connection bump of the electronic device can be matched with the vias formed in the outer circuit layer of the base substrate. Suggest.

In accordance with another aspect of the present invention, a printed circuit board including an electronic device may include: a base substrate having a first insulating layer, an upper circuit pattern formed on the first insulating layer, and a lower circuit pattern formed on the lower portion of the first insulating layer; A cavity penetrating the base substrate; An alignment hole penetrating the base substrate; An electronic device embedded in the cavity and having an external connection bump formed on one surface thereof; And a second insulating layer stacked on upper and lower portions of the base substrate and completely filling the alignment holes.

As a preferable feature of the present invention, the alignment hole is a through hole formed in alignment with the lower circuit pattern.

In another preferred aspect of the present invention, the base substrate is a double-sided printed circuit board or a multilayer printed circuit board.

A further preferred feature of the present invention is that it further comprises a circuit layer formed on the second insulating layer and electrically connected to the external connection terminal and the lower circuit pattern.

As another preferable feature of the present invention, the alignment hole is provided in a plurality of symmetrical arrangement between the cavity.

In accordance with another aspect of the present invention, there is provided a method of manufacturing a printed circuit board including an electronic device, the method including: (A) providing a base substrate having an upper circuit pattern formed on an upper portion and a lower circuit pattern formed on a lower portion thereof; (B) forming a cavity for embedding electronic elements and an alignment hole for aligning the electronic elements in the base substrate; (C) mounting the electronic device on the base substrate such that the external connection bump formed on one surface of the electronic device is aligned with the alignment hole.

As a preferable feature of the present invention, the base substrate is a double-sided printed circuit board or a multilayer printed circuit board.

In another preferred aspect of the present invention, the alignment hole is a through hole formed at a position corresponding to the arrangement of the lower circuit pattern of the base substrate.

In another preferred aspect of the present invention, the mounting of the electronic device may include: (i) attaching a tape to a lower surface of the base substrate; (Ii) disposing the electronic device such that the alignment hole and the external connection terminal are aligned on the tape; (Iii) laminating a second upper insulating layer on an upper surface of the base substrate; (Iii) removing the tape and laminating a second lower insulating layer on a lower surface of the base substrate.

In another preferred embodiment of the present invention, the disposing of the electronic device may include: (i) detecting a position of the alignment hole and a position of the external connection bump; (Ii) arranging the electronic device such that the alignment hole and the external connection bump are aligned with each other.

The features and advantages of the present invention will become more apparent from the following detailed description based on the accompanying drawings.

Prior to this, the terms or words used in this specification and claims are not to be interpreted in a conventional and dictionary sense, and the inventors may appropriately define the concept of terms in order to best describe their own invention. It should be interpreted as meaning and concept corresponding to the technical idea of the present invention based on the principle that the present invention.

Since the printed circuit board having the electronic device according to the present invention includes an alignment hole for matching the position with the lower circuit pattern, it is possible to form an outer circuit layer having an outer layer via that reliably matches the external connection bump of the electronic device. There is an advantage.

In addition, the method of manufacturing a printed circuit board with electronic devices according to the present invention aligns and mounts the electronic devices based on the alignment holes aligned with the lower circuit pattern of the base board, so that they can be connected to the external connection terminals of the electronic devices well. There is an advantage that can form an outer layer via.

Hereinafter, a preferred embodiment of an electronic device embedded printed circuit board and a method of manufacturing the same according to the present invention will be described in detail with reference to the accompanying drawings. Throughout the accompanying drawings, the same or corresponding components are referred to by the same reference numerals, and redundant descriptions are omitted. In this specification, terms such as first and second are used to distinguish one component from another component, and a component is not limited by the terms.

2 is a cross-sectional view of a printed circuit board embedded with an electronic device according to a preferred embodiment of the present invention. As shown in FIG. 2, the present invention includes a base substrate 100, a cavity 200 passing through the base substrate 100, an alignment hole 500 passing through the base substrate 100, and a cavity 200. It is embedded in the electronic device 300 and the base substrate 100 having the external connection bump 330 formed on one surface and stacked on the upper and lower, and includes a second insulating layer 700 to completely fill the alignment hole 500 It is a constitution.

The base substrate 100 may be a double-sided printed circuit board or a multilayer printed circuit board. In this embodiment, the first insulating layer 130 and the upper circuit pattern 150 formed on the first insulating layer 130 and the first printed circuit board may be formed. 1 A double-sided printed circuit board having a lower circuit pattern 170 formed under the insulating layer 130 is used as the base substrate 100. The base substrate 100 may include an inner layer via 160 (PTH) electrically connecting the upper circuit pattern 150 and the lower circuit pattern 170.

The first insulating layer 130 is formed of a material that electrically insulates the upper circuit pattern 150 and the lower circuit pattern 170, for example, a thermosetting resin, a thermoplastic resin, a substrate reinforced thermosetting resin and a substrate reinforced It may be composed of a resin alone or in combination of two or more of the thermoplastic resins.

The cavity 200 is a through hole provided for embedding the electronic device 300 in the base substrate 100 and has a size corresponding to the size of the electronic device 300. In this case, the cavity 200 may not only be easily embedded in the electronic device 300 but also have a size larger than the size of the electronic device 300 such that the electronic device 300 can be moved to a certain extent within the cavity 200. It is preferred to have

The alignment hole 500 is a through hole provided to align the electronic device 300, and the alignment hole 500 may have a size similar to that of the inner layer via 160 for interlayer electrical connection, although the shape and size thereof are not limited. have. However, the align hole 500 is not configured for interlayer electrical connections and is distinguished from the inner layer vias 160 in that the interior is not electrically charged with an electrically conductive material.

Here, the alignment hole 500 is formed at a position aligned with the arrangement of the lower circuit pattern 170. In general, when the inner circuit layer is formed, an alignment mark for interlayer conduction and matching with the outer circuit layer built up on the inner circuit layer is provided, which usually has a shape of a through hole into which the through shaft can be inserted. Therefore, in stacking the insulating layer on the inner circuit layer and forming the blind outer layer via hole in the insulating layer, the position of the via hole is specified based on the alignment mark. In this embodiment, the alignment hole 500 is formed at a position aligned with the arrangement of the lower circuit pattern 170, which means that the alignment hole 500 is formed based on the alignment mark of the lower circuit pattern 170. . That is, the alignment hole 500 may serve as another alignment mark. Since the alignment hole 500 of the present embodiment is formed through the base substrate 100, the lower circuit may be formed even on the surface on which the upper circuit pattern 150 is formed. The alignment mark of the pattern 170 can be confirmed.

On the other hand, the alignment hole 500 is preferably formed around the cavity 200 in which the electronic device 300 is embedded in that the electronic device 300 is aligned. In this case, the alignment hole 500 of the present exemplary embodiment may check the alignment mark of the lower circuit pattern 170 on the surface on which the upper circuit pattern 150 is formed, but is formed around the cavity 200 in close proximity to the cavity 200. If it is sufficient, it is not necessary to form in a specific position, it is preferable to form the circuit line is not dense in consideration of the upper and lower circuit patterns 170.

In addition, although only one alignment hole 500 may be formed, a plurality of alignment holes 500 may be formed for precise alignment. In this embodiment, two alignment holes 500 are shown which are arranged symmetrically with the cavity 200 interposed therebetween.

The electronic device 300 is a component that is electrically connected to a printed circuit board to perform a specific function. For example, the electronic device 300 may be a capacitor device or a semiconductor device, and one surface of the electronic device 300 may be electrically connected to a printed circuit board. An external connection bump 330 is provided. In this embodiment, a semiconductor chip having an electronic circuit integrated therein is used as the electronic device 300, and an external connection bump 330 is formed on one surface of the semiconductor chip to draw an electrical signal to the electronic circuit.

The second insulating layer 700 is an insulating layer additionally stacked on the upper and lower portions of the base substrate 100, and the second insulating layer 700 not only covers the upper and lower portions of the base substrate 100, but also aligns it. The hole 500, the inner layer via 160, and the portion in which the electronic device 300 of the cavity 200 is not filled are filled. The second insulating layer 700 may be made of a thermosetting resin, a thermoplastic resin, a substrate reinforced thermosetting resin and a substrate reinforced thermoplastic resin alone or in combination of two or more kinds thereof.

The outer circuit layer 900 is formed on the second insulating layer 700. The outer circuit layer 900 includes an outer via 930 and an outer circuit pattern 910 electrically connected to the external connection bump 330, the upper circuit pattern 150, and the lower circuit pattern 170 of the electronic device 300. ) . The electronic device 300 and the base substrate 100 may be electrically connected through the outer circuit layer 900.

As described above, since the printed circuit board having the electronic device according to the present exemplary embodiment includes an alignment hole 500, an outer layer via 930 that reliably matches the external connection bump 330 of the electronic device 300 is provided. It is possible to implement the outer circuit layer 900 having.

Hereinafter, a method of manufacturing an electronic device-embedded printed circuit board according to a preferred embodiment of the present invention will be described. 3 to 14 are views illustrating a manufacturing method of an electronic device-embedded printed circuit board according to an exemplary embodiment of the present invention in a process order.

First, a step of providing a base substrate 100 on which the electronic device 300 is to be built. 3 to 5 illustrate a step of providing the base substrate 100. Here, the double-sided printed circuit board is used as the base substrate 100, but is not limited thereto. The base substrate 100 may be a multilayer printed circuit board. In addition, although a method of providing a double-sided substrate by applying a subtractive method is illustrated and described herein, it is not limited thereto, and other known substrate manufacturing processes, for example, additive process, It is noted that the substrate can be manufactured by a semiadditive process (SAP, MSAP).

As shown in FIG. 3, a copper clad laminate (CCL) having copper foils 135 stacked on both surfaces of the first insulating layer 130 is provided.

Next, as shown in FIG. 4, the via hole 165 is processed by CNC drilling or laser (CO ₂ or YAG laser) drilling in the copper clad laminate.

Next, as shown in FIG. 5, a plating layer is formed on the inner wall of the via hole 165, a resist is laminated on the copper foil 135, and the copper foil 135 is etched to form upper and lower circuit patterns 150 and 170. By the above process, the base substrate 100 used in the present embodiment can be made.

Next, as shown in FIG. 6, the cavity 200 and the alignment hole 500 are processed in the base substrate 100. The cavity 200 and the alignment hole 500 can be processed by CNC drilling or laser drilling.

Here, the cavity 200 is preferably formed to be larger than the size of the electronic device 300 at the position where the electronic device 300 is to be mounted. It is important to form the cavity 200 to have a space sufficient to accommodate the alignment of the electronic device 300.

Here, the alignment hole 500 is formed to be aligned with the arrangement of the lower circuit pattern 170. That is, the arrangement of the lower circuit patterns 170 and the alignment marks of the lower circuit patterns 170 are detected and aligned. As described above, although the position, number, and shape of the alignment holes 500 are not limited, one or more alignment holes 500 may be disposed around the cavity 200 to improve the accuracy of the alignment of the electronic device 300. It is preferable to form In the present embodiment, two alignment holes 500 are symmetrically formed with the cavity 200 interposed therebetween.

Meanwhile, the cavity 200 and the alignment hole 500 may be processed at the same time or may be sequentially processed.

Next, as shown in FIG. 7, the tape 400 is attached to one surface of the base substrate 100 to close the cavity 200. The tape 400 is a member that is temporarily used before the position of the electronic device 300 is fixed by stacking the second insulating layer 700. An adhesive that does not leave a residue on the surface of the substrate during removal may be used. . In addition, since the heat is applied to the substrate in the process of laminating the second insulating layer 700 after fixing the electronic device 300 to the tape 400, the material of the tape 400 may be excellent in heat resistance. For example, a tape 400 made of a polyimide (PI) film coated with a silicone adhesive may be used.

Next, as shown in FIG. 8, the electronic device 300 is disposed above the cavity 200 of the base substrate 100. The electronic device 300 is attached to the header (not shown) by a vacuum suction method and moved above the cavity 200. At this time, the position detecting means 600 disposed between the electronic device 300 and the base substrate 100, for example, the position of the external connection bump 330 of the electronic device 300 by the camera and the base substrate 100. The position of the alignment hole 500 is detected. The position information collected by the position detecting unit 600 is transmitted to a control unit for controlling the movement of the header, and the control unit has a position where the header is aligned with the alignment hole 500 of the external connection bump 330 of the electronic device 300. The electronic device 300 is moved to be disposed in the.

Next, as shown in FIG. 9, the electronic device 300 is mounted on the base substrate 100. When the electronic device 300 is disposed in the correct position, the position detecting means 600 moves in the horizontal direction, and the header mounts the electronic device 300 on the tape 400 of the base substrate 100.

Next, as shown in FIG. 10, a second upper insulating layer 730 is stacked. When the electronic device 300 is mounted on the tape 400, the second upper insulating layer 730 is stacked on the base substrate 100. The electronic device 300 is fixed to the base substrate 100 by stacking the second upper insulating layer 730. By stacking the second upper insulating layer 730, the empty space of the cavity 200, the alignment hole 500, and the inner space of the inner layer via 160 are filled with the second insulating layer 700.

Next, as shown in FIG. 11, the tape 400 is removed, and then the second lower insulating layer 750 is stacked as shown in FIG. 12. By stacking the second lower insulating layer 750, the electronic device 300 is completely surrounded by the second insulating layer 700.

Next, as shown in FIG. 13, the blind via hole 310 exposing the upper circuit pattern 150, the lower circuit pattern 170, and the external connection terminal is processed in the second insulating layer 700. In this case, the blind via hole 310 formed under the second insulating layer 700 is formed at a specific position based on the alignment mark of the lower circuit pattern 170. As described above, since the external connection bump 330 of the electronic device 300 is formed in alignment with the arrangement of the lower circuit pattern 170, the blind via hole 310 is formed based on the alignment mark of the lower circuit pattern 170. Even if formed, the external connection bumps 330 can be well exposed.

Next, as illustrated in FIG. 14, an outer circuit layer 900 may be electrically connected to the external connection bump 330, the upper circuit pattern 150, and the lower circuit pattern 170. The outer circuit layer 900 may be formed by a conventional circuit forming process.

As described above, the method of manufacturing the printed circuit board with electronic devices according to the present embodiment includes the electronic device 300 based on the alignment holes 500 aligned with the lower circuit pattern 170 of the base substrate 100. Since there is an alignment and mounting, the outer circuit layer 900 having a good connection with the external connection terminal of the electronic device 300 has an advantage.

On the other hand, the present invention is not limited to the described embodiments, it is obvious to those skilled in the art that various modifications and variations can be made without departing from the spirit and scope of the present invention. Therefore, such modifications or variations will have to belong to the claims of the present invention.

1 is a view showing a process for manufacturing a printed circuit board with an electronic device according to the prior art.

2 is a cross-sectional view of a printed circuit board embedded with an electronic device according to a preferred embodiment of the present invention.

3 to 14 are diagrams showing a method of manufacturing a printed circuit board with an electronic device according to a preferred embodiment of the present invention in the process order.

Claims (10)

A base substrate having a first insulating layer, an upper circuit pattern formed on the first insulating layer, and a lower circuit pattern formed on the lower portion of the first insulating layer; A cavity penetrating the base substrate; An alignment hole penetrating the base substrate; An electronic device embedded in the cavity and having an external connection bump formed on one surface thereof; And Second insulating layers stacked on top and bottom of the base substrate and completely filling the alignment holes; Electronic printed circuit board containing a. The method of claim 1, The alignment hole is a printed circuit board with an electronic element, characterized in that the through-hole formed in alignment with the arrangement of the lower circuit pattern. The method of claim 1, The base substrate is a printed circuit board with an electronic device, characterized in that the double-sided printed circuit board or a multilayer printed circuit board. The method of claim 1, And a circuit layer formed on the second insulating layer and electrically connected to the external connection terminal and the lower circuit pattern. The method of claim 1, And a plurality of the alignment holes symmetrically arranged with the cavity interposed therebetween. (A) providing a base substrate having an upper circuit pattern formed on the upper portion and a lower circuit pattern formed on the lower portion; (B) forming a cavity for embedding electronic elements and an alignment hole for aligning the electronic elements in the base substrate; And (C) mounting the electronic device on the base substrate such that the external connection bump formed on one surface of the electronic device and the alignment hole are aligned; Method of manufacturing a printed circuit board embedded electronic device comprising a. The method of claim 6, The base substrate is a manufacturing method of a printed circuit board with an electronic device, characterized in that the double-sided printed circuit board or a multilayer printed circuit board. The method of claim 6, And the alignment hole is a through hole formed at a position corresponding to the arrangement of the lower circuit pattern of the base substrate. The method of claim 6, Mounting the electronic device, (Iii) adhering a tape to a lower surface of the base substrate; (Ii) disposing the electronic device such that the alignment hole and the external connection terminal are aligned on the tape; (Iii) laminating a second upper insulating layer on an upper surface of the base substrate; And (Iii) removing the tape and laminating a second lower insulating layer on a lower surface of the base substrate; Method of manufacturing a printed circuit board with a built-in electronic device comprising a. The method of claim 9, Arranging the electronic device, (Iii) detecting a position of the alignment hole and a position of the external connection bump; And (Ii) disposing the electronic device such that the alignment hole and the external connection bump are aligned; Method of manufacturing a printed circuit board with a built-in electronic device comprising a.

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