KR20090119506A - Liquid crystal display device - Google Patents

Abstract

PURPOSE: A liquid crystal display device is provided to selectively install a lead out line in a direction in parallel with a data line to install a sensing unit in a pixel area, thereby sensing a touch location without a lead out line per a line. CONSTITUTION: The first storage capacitor(113) is formed between each pixel electrode and the first storage electrode on the first substrate. The second storage capacitor(114) and a sensing capacitor(115) are formed between the nth gate line and a common electrode(203) in series. A lead out line(118) is in parallel with the mth data line(102). In a sensing transistor(116), a drain electrode is connected to the first node between the second storage capacitor and the sensing capacitor. A source electrode is connected to the lead out line. A gate electrode is connected to the (n-1) gate line.

Description

Liquid crystal display device

The present invention relates to a liquid crystal display, and more particularly, to a liquid crystal display capable of detecting a change in liquid crystal capacitance according to a touch and detecting the presence or absence of a touch.

In recent years, as the information age has entered, the display field for visually expressing electrical information signals has been rapidly developed, and various flat panel display devices having excellent performance of thinning, light weight, and low power consumption have been developed. Flat Display Device has been developed and is rapidly replacing the existing Cathode Ray Tube (CRT).

Specific examples of such a flat panel display device include a liquid crystal display device (LCD), a plasma display panel device (PDP), a field emission display device (FED), and an electroluminescent display device. (Electro luminescence Display Device: ELD) and the like, these are commonly used as an essential component of a flat panel display panel that implements an image, a flat panel display panel has a pair of light emitting or polarizing material layer in between It has a configuration in which a transparent insulating substrate is faced and bonded together.

The dual liquid crystal display displays an image by adjusting the light transmittance of the liquid crystal using an electric field. To this end, the image display device includes a display panel having a liquid crystal cell, a backlight unit for irradiating light to the display panel, and a driving circuit for driving the liquid crystal cell.

The display panel is formed such that a plurality of unit pixel regions are defined by crossing a plurality of gate lines and a plurality of data lines. In this case, each pixel area includes a thin film transistor array substrate and a color filter array substrate facing each other, a spacer positioned to maintain a constant cell gap between the two substrates, and a liquid crystal filled in the cell gap.

The thin film transistor array substrate includes a gate line and a data line, a thin film transistor formed of a switch element at each intersection of the gate lines and the data lines, a pixel electrode formed of a liquid crystal cell and connected to the thin film transistor, and the like. It consists of the applied alignment film. The gate lines and the data lines receive signals from the driving circuits through the respective pad parts.

The thin film transistor supplies the pixel voltage signal supplied to the data line to the pixel electrode in response to the scan signal supplied to the gate line.

The color filter array substrate includes color filters formed in units of liquid crystal cells, a black matrix for distinguishing between color filters and reflecting external light, a common electrode for supplying a reference voltage to the liquid crystal cells in common, and an alignment layer applied thereon. It consists of.

The thin film transistor substrate and the color filter array substrate manufactured as described above are aligned and bonded to each other, and then liquid crystal is injected and encapsulated.

As described above, there is an increasing demand for a liquid crystal display device having a touch panel capable of recognizing a touch portion through a hand of a person or a separate input means and transmitting separate information in response thereto. Currently, the touch panel is applied in the form of attaching to the outer surface of the liquid crystal display, and efforts have been made to mount it inside the panel in the liquid crystal display.

An example to be described below illustrates an example in which the touch panel is formed inside a liquid crystal display to prevent an increase in volume accompanying the separate attachment of the touch panel.

Hereinafter, a liquid crystal display according to the related art will be described with reference to the accompanying drawings.

1 is a schematic circuit diagram illustrating a conventional capacitive method, and FIG. 2 is a circuit diagram showing the capacitive sensor of FIG. 1 and a driving method thereof.

As shown in FIGS. 1 and 2, a conventional liquid crystal display device includes a first and a second substrate (not shown) facing each other, a liquid crystal layer (not shown) filled therebetween, and cross each other on the first substrate. And a gate line 11 and a data line 12 defining a pixel area, and a thin film transistor TFT formed at an intersection of the gate line 11 and the data line 12. It is done by A common electrode (not shown, Vcom (applied voltage)) is formed on the second substrate, and a pixel electrode 13 is formed on the pixel region on the first substrate.

Here, a first wiring 21 parallel to the gate line 11 and a second wiring 22 parallel to the data line 12 are further formed outside the pixel area for capacitive sensing. A first reference voltage line Vref1 and a second reference voltage line Vref2 parallel to the first wiring 21 and the second wiring 22, respectively, are further formed.

The first capacitance capacitor Cref1 is disposed between the first reference voltage line Vref1 and the first wiring 21, and the first capacitance capacitor is between the first reference voltage line Vref1 and the common electrode Vcom. Clc1) is formed. In this case, the first auxiliary capacitor Cref1 and the first capacitance capacitor Clc1 are formed in series. The first auxiliary capacitor Cref1 and the first capacitance capacitor Clc1 of the series connection are formed corresponding to each pixel.

Similarly, a second auxiliary capacitor Cref2 is formed between the second reference voltage line Vref2 and the second wiring 22, and a second blackout is formed between the common electrode Vcom and the second wiring 22. Capacitive capacitor Clc2 is formed. The second auxiliary capacitor Cref2 and the second capacitance capacitor Clc2 are also formed in series.

Here, the signal sensed by the first wiring 21 is provided with an amplifier 31 as shown in FIG. 2 at the end thereof, so that each of the capacitance capacitors Clc 32 and the auxiliary capacitor Cref 33 are provided. A value obtained by amplifying the voltage applied to the node Vn1 between and is obtained, and the touch position and the touch position are sensed according to this value. That is, the voltage value at the node Vn1 varies depending on whether the value of the capacitive capacitor Clc 32 is touched, and the value of the capacitive capacitor Clc 32 is touched when touched. When the voltage Vout value output from the node Vn1 through the amplifier 31 is measured differently from the initial state, it is known that the touch state is detected, and the corresponding touch position is sensed.

The first and second switches sw1 and sw2 are provided on the other side opposite to the output side of the node Vnl of the capacitive capacitor and the auxiliary capacitor to apply the selective signal for each of the first and second switches.

Two common voltage values Vcomh and Vcoml cross each other and are applied to the first and second reference voltage lines Vref1 and Vref2 connected to one side of the first and second auxiliary capacitors Cref1 and Cref2 33, respectively. do. When the common voltage is VcomH, the voltage Va is applied and stored in the Clc 32 through the first switch sw1, and is output to the amplifier 31 when the common voltage is Vcoml. As a result, the output voltage includes the information of the Clc 32 value changed at the touch. The output voltage change according to the change in capacitance is as follows.

In such a configuration, wiring of the cross arrangement of the X-axis and the Y-axis is required, thereby increasing the parasitic capacitor.

However, the liquid crystal display for recognizing touch in the conventional capacitive method as described above has the following problems.

First, it is possible to know whether the touch by sensing the voltage change of a point corresponding to one pixel selectively, it is impossible to recognize when touching several points at the same time.

Second, to detect touch, X-axis position and Y-axis position are formed to cross each other, and the size of panel is expected to increase, and as the size of panel increases, the line resistance, wiring and Since parasitic capacitors are added between the wires, the coupling capacitance is increased, and thus, the signal to noise (S / N) ratio is lowered, resulting in poor signal reliability and difficulty in touch recognition.

An object of the present invention is to provide a liquid crystal display device capable of sensing the presence or absence of a touch and a touch position by recognizing a change in liquid crystal capacitance according to a touch.

According to an aspect of the present invention, a liquid crystal display device includes a first substrate and a second substrate facing each other, and a plurality of gate lines and data defining a plurality of pixel regions crossing each other on the first substrate. A pixel transistor formed at each intersection of the line, the plurality of gate lines and the data line, a plurality of pixel electrodes formed in the pixel regions, a common electrode formed on the entire surface of the second substrate, and the first and second electrodes. A liquid crystal layer filled between the substrate, a liquid crystal capacitor formed between each pixel electrode and the common electrode, a first storage capacitor formed between each pixel electrode and the first storage electrode on the first substrate, and an nth gate line; A second storage capacitor and a sensing capacitor formed in series between the common electrode, a readout wiring parallel to the mth data line, and 2 there is a second drain electrode in a first node between the storage capacitor and a sensing capacitor, the source electrode to the lead-out wire, characterized by comprising an sensing transistor gate electrode connected to a gate line n-1.

In addition, the liquid crystal display device of the present invention for achieving the same object, a first substrate and a second substrate facing each other, and a plurality of gate lines and data defining a plurality of pixel regions crossing each other on the first substrate; A line, a pixel transistor formed at each intersection of the plurality of gate lines and the data line, a plurality of pixel electrodes formed in each pixel region, a common electrode formed on the front surface of the second substrate, and a common parallel to the gate line A liquid crystal layer filled between a line, the first and second substrates, a liquid crystal capacitor formed between the pixel electrodes and the common electrode, and first storage formed between each pixel electrode and the first storage electrode on the first substrate. A capacitor, a second storage capacitor and a sensing capacitor formed in series between the common line and the common electrode, and an mth de A sensing electrode connected to a lead-out wiring parallel to the data line, a drain electrode at a first node between the second storage capacitor and a sensing capacitor, a source electrode at the read-out wiring, and a gate electrode at an n-1 gate line There is another feature of what is included with the transistor.

Here, the sensing capacitor is varied according to the capacitance corresponding to the change in thickness of the liquid crystal layer at the touch point.

The first node may be connected to a power supply voltage line, and a resistance may be further formed between the power supply voltage line and the first node.

The first storage capacitor is defined by the pixel electrode and a first storage electrode overlapping the pixel electrode, and the second storage capacitor is connected to the first node and overlaps the gate line. It is defined by two storage electrodes.

Meanwhile, a time constant defined by the resistance value of the resistor and the capacitance values of the second storage capacitor, the sensing capacitor, and the sensing transistor is less than one frame time, and the gate high signal applied to the gate line is turned on. It is desirable to be larger than the on-time period.

In this case, the resistance may include a semiconductor layer or a diode structure.

The liquid crystal display of the present invention as described above has the following effects.

First, compared with the conventional capacitive type wiring having the wiring (lead-out wiring) located in the X and Y-axis directions, the lead-out wiring in a direction parallel to the data line is selectively provided and the sensing unit is provided in the pixel area. Even if the lead-out wiring is not provided for each line, the touch position can be achieved, structural optimization can be achieved, and parasitic capacitance between the wirings can be reduced. As a result, the parasitic capacitance is less affected by the large area, and the touch sensing can be stably performed.

Second, fourth, the sensing transistor for sensing formed between the gate line and the read-out wiring, the read-out wiring parallel to the data line, the Y-axis touch position is sensed, even if the sensing unit in the X-axis direction is omitted The X-axis position can be detected by detecting the gate line connected to the sensing transistor.

Third, unlike the photo method affected by external light, whether the touch is detected by the capacitance change of the touch portion and the position is detected, the touch can be detected without affecting the external environment.

Fourth, by forming the sensing unit at the same time when forming the TFT array of the liquid crystal panel, the sensing unit is integrated in the liquid crystal panel, the touch sensing is possible without attaching a separate touch panel, it is possible to perform the touch function and the external attachment type by embedding the touch sensor It is possible to reduce the weight and the weight, and to reduce the manufacturing cost.

Hereinafter, a liquid crystal display and a touch sensing method thereof according to the present invention will be described in detail with reference to the accompanying drawings.

3 is a circuit diagram illustrating a liquid crystal display according to a first embodiment of the present invention.

As shown in FIG. 3, the liquid crystal display according to the first exemplary embodiment of the present invention includes a first and a second substrate (100, not shown in FIGS. 7A and 7B) and the first and second substrates facing each other for touch sensing. And a liquid crystal layer (not shown) filled between two substrates, a thin film transistor array formed on the first substrate 100, and a color filter array formed on the second substrate.

The color filter array may include a black matrix layer (not shown) formed in a non-pixel region, a color filter layer (not shown) for determining the color of each pixel region, and a common electrode (not shown 203) formed on the entire surface of the second substrate. Include.

The thin film transistor array may include a gate line 101, a data line 102, a gate line 101, and a data line crossing the first substrate (see 100 in FIG. 7) to define a pixel area. The liquid crystal capacitor 112 (Clc) and the first liquid crystal capacitor 112 (Clc) are formed in parallel between the pixel transistor 111 (Tpixel) and the drain terminal of the pixel transistor 151 (Vpixel) formed at the intersection of the pixel 102 and the common electrode 203. It is connected to the storage capacitor 113 (Cst1). In a practical configuration, a liquid crystal capacitor may be disposed between the common electrode 203 and the drain terminal of the pixel transistor 111 (Tpixel) and a liquid crystal layer therebetween. 112 (Clc) is formed, and a first storage capacitor 113 (Cst1) is formed between the drain terminal of the pixel transistor 111 (Vpixel) and the first voltage line L1 (interlayer). In this case, the first voltage line L1 may be formed separately, but the common electrode 203 or the front gate line Gn-1 may be used to optimize the structure.

In the liquid crystal display of the present invention, a pixel thin film transistor 151 (Tpixel) for driving pixels and a liquid crystal capacitor 152 connected thereto are disposed between the gate line 101 (Gn) and the common electrode 203. In addition to (Clc) and the first storage capacitor 153 (Cst1), a touch sensing unit is formed between the gate line 101 (Gn), the common electrode 203, and the gate line 101 '(Gn-1) of the previous stage. Further added.

The touch sensing unit may include a second storage capacitor 114 (Cst2) and a sensing capacitor 115 (Csen) connected in series between the gate line 101 (Gn) and the common electrode 203, and the first sensor. 2 A drain electrode is connected to node A between the storage capacitor 114 (Cst2) and the sensing capacitor 115 (Csen), a gate electrode is connected to the gate line 101 'of the front end, and a data line Dm is connected to the data line Dm. And a sensing transistor 116 (Tsw) connected to a source electrode in a read out line (ROIC) formed in parallel. In addition, between the node A and the second power supply voltage Vd2 line L2, a resistor 117 (R1) for stabilizing a voltage value applied to the drain electrode side of the sensing transistor 116 (Tsw). ) Is further added.

The touch sensing unit may be formed for each pixel, or may be regularly formed for a certain number of pixels. The position of the touch sensing unit may be determined corresponding to the number of pixels entering the area of one touch area in consideration of the area of the general touch area and the size of the pixel. That is, when the number of pixels entering the area in one touch area is n, the touch sensing unit may be formed for every n pixels.

In addition, the first voltage line L1 is a line applying the first power supply voltage Vd1, and in general, the first power supply voltage Vd1 is a common voltage applied to the common electrode formed on the second substrate. Vcom) value. The first voltage line L1 is connected to the other electrode of the first storage capacitor 113 (Cst1). In other words, one electrode of the first storage capacitor 113 becomes a pixel electrode and is connected to the other electrode according to the formation portion of the first storage capacitor 113 (Cst1) overlapping with the pixel electrode. The first voltage line L1 may be a common line formed in the front gate line Gn-1 or separately, pixel regions parallel to each gate line. In addition, the second voltage line L2 is a line applying the second power supply voltage Vd2, for example, a common line formed on the first substrate 100 may be used.

In addition, the read out line (ROIC) senses a current flowing through the sensing transistor 116 (Tsw), and further includes an amplifier at an end thereof, and the sensing transistor 116 (Tsw). The sensitivity can be improved by amplifying the sensed current.

Here, the resistance value R1 of the resistor 117 is smaller than one frame time when the time constant R1 · (Csen + Cst2 + Csw) is calculated, and is sufficiently larger than the on time (1H) of the one gate high signal. Make it big. The touch sensing of the sensing transistor 116 (Tsw) is maintained by maintaining the gate voltage value applied to the sensing transistor Tsw for at least an on time of the gate voltage signal applied to the sensing transistor Tsw within one frame. This is to maintain the time recognition at least over the on time of the sensing transistor.

Here, Csw represents the capacitance between the gate electrode and the channel of the sensing transistor 116, Cst2 represents the capacitance of the second storage capacitor 114, and Csen represents the capacitance of the sensing capacitor 115.

The second voltage Vd2 applied to the second voltage line L2 has a current applied to the sensing transistor 116 (Tsw) when a high signal is applied to the front gate line 101 '(Gn-1). When a high signal is applied to the front gate lines (Gn-1) 101 ', the sensing transistor 116 (Tsw) operates to operate the node A. A current flowing through the sensing transistor 116 flows to the lead-out wiring 115 (RIOC) to sense whether a touch is detected.

FIG. 4 is a graph illustrating a change in charge amount with time at node A of FIG. 3.

As shown in FIG. 4, the change in the charge amount between the sensing capacitor Csen 115 and the second storage capacitor Cst2 114 decreases the thickness of the liquid crystal layer due to the touch at the touch point. The capacitance of the sensing capacitor Csen 115 is increased. Accordingly, the increased amount of charge exits to the lead-out wiring (ROIC) 115 through the sensing transistor 116 when the front gate line (Gn-1) 101 ′ is turned on.

In this case, the charge amount change at the A node is as follows.

That is, after ΔQsen = Q'touch- before Qtouch = (C'sen-Csen) (Vsen-Vref)

Here, C'sen is the increased capacitance value of the sensing capacitor after the touch, Csen represents the capacitance value of the sensing capacitor in the normal state without the touch, Vsen is the voltage value at the A node when the touch, Vref is no touch It represents the voltage value of the A node in the steady state.

As such, when touched, the capacitance increases from Cen to C'sen, thereby increasing the total charge Qsen at the A node, thereby exiting the lead-out wiring 118 side through the sensing transistor 116. Accordingly, the change in the relative charge amount before and after the touch is generated by the voltage change in the lead-out wiring, and the presence or absence and the touch of the touch can be determined by the change in voltage.

The touch position determines the Y-axis and the X-axis position of the lead-out line where the voltage change is sensed and the corresponding gate line connected thereto.

Hereinafter, the liquid crystal display according to the first exemplary embodiment of the present invention will be described in detail with reference to a plan view and a cross-sectional view.

FIG. 5 is a plan view showing a liquid crystal display device corresponding to the circuit diagram of FIG. 3, and FIG. 6 is a plan view specifically illustrating the sensing transistor Tsw of FIG. 3, and FIGS. 7A and 7B are FIGS. It is structural sectional drawing along I 'line and II ~ II' line.

5 to 7B, the liquid crystal display according to the first exemplary embodiment of the present invention crosses a first substrate 100 and a second substrate (not shown) that face each other, and cross each other on the first substrate. A plurality of gate lines 101 and data lines 102 defining a plurality of pixel regions, pixel transistors Vpixels formed at intersections of the plurality of gate lines 101 and data lines 102, and the respective pixels A plurality of pixel electrodes 103 formed in the pixel region, a common electrode (not shown) formed on the entire surface of the second substrate, a liquid crystal layer (not shown) filled between the first and second substrates, and each of the pixels A liquid crystal capacitor (see Clc of FIG. 3) formed between the electrode 103 and the common electrode, and a first storage capacitor formed between each pixel electrode 103 and the first storage electrode 121a on the first substrate 100. Common electric field between the cst and the n-th gate line 101 and the liquid crystal layer (Not shown) a second storage capacitor Cst2 and a sensing capacitor Csen formed in series, a lead-out wiring 118 (ROIC) parallel to the mth data line 102, and the second storage capacitor A sensing transistor Tsw in which a drain electrode is connected to a node between Cst2 and the sensing capacitor Csen, a drain electrode is connected to the lead-out wiring 118, and a gate electrode is connected to the n-1 gate line 101 '. It is made, including.

More specifically, it is as follows.

5 and 6, a shield pattern 121a is formed around the edge of the pixel area, and a shield pattern 121a is formed inside the gate line 101 and the data line 102, and the shield pattern 121a is adjacent to the pixel. The areas are connected through the common line 121. Here, the shield pattern 121a and the common line 121 are integrally formed. The common line 121 is formed in parallel to be spaced at regular intervals corresponding to each gate line 101.

The shield pattern 121a has a 'U' shape formed at the periphery of each pixel area.

Here, the pixel transistor 151 (Tpixel) formed at the intersection of the gate line 101 and the data line 102 includes a gate electrode 101a protruding from the gate line 101, and the gate electrode ( And a source electrode 102a and a drain electrode 102b spaced apart from each other and partially overlapping the semiconductor layer 105, respectively, formed on the 101a. Here, the source electrode 102a entering the gate electrode 101a has a 'U' shape in plan view.

The drain electrode 102b is electrically connected to the overlapping pixel electrode 103 through the first contact portion 107a.

The transparent electrode pattern 123 partially overlaps the lower end of the gate line 101, and is formed to be electrically contacted with the second metal pattern 122 through the second contact part 107b. Here, the second metal pattern 122 is made of a second metal of the same layer as the data line 102 and the lead-out wiring 132, and are formed in parallel with each other. The second metal pattern 122 includes a protrusion at a contact portion of the transparent electrode pattern 123 and a first protrusion 122c having a 'C' shape at an end thereof. The second protrusion 142 is spaced apart from the first protrusion 122c having a 'C' shape and oppositely mirrored thereto. Here, the first and second protrusions 122c and 142 are electrically contacted through the second voltage line L2 and the third and fourth contact parts 127c and 17b, respectively.

In addition, a second voltage line L2 that passes through the first and second protrusions 122c and 142 in a horizontal direction and is parallel to the gate line 101 is formed.

Here, a first storage capacitor Cst1 is formed at a portion where the pixel electrode 103 and the shield pattern 121a overlap each other, and are common on the second substrate with the pixel electrode pattern 123 and the liquid crystal layer interposed therebetween. A sensing capacitor Csen 115 is defined between electrodes (not shown), and a second storage capacitor Cst2 is defined at an overlap portion between the gate lines 114 below the sensing capacitor Csen 115.

In addition, as shown in FIG. 6, the second metal pattern 122 extends to the front gate line (Gn-1) 101 ′ to function as a drain electrode, and surrounds the drain electrode end in an inverted 'U' shape. The lead-out wiring 132 including a source electrode 132 is formed in parallel to the second metal pattern 122 and the data line 102, and the source electrode 132a / drain electrode layer and the front end The semiconductor layer 135 is formed between layers between the gate line 101 'and thus forms the sensing transistor Tsw.

7A and 7B, a plurality of gate lines 101, 101 ′,... Including the gate electrode 101a, a common line 121 including a shield pattern 121a, and a second voltage line ( A gate insulating film 106 is formed on L2, a semiconductor layer 105 is formed on a portion corresponding to the gate electrode 101a on the gate insulating film 106, and the first and second protrusions 122c are formed on the plan view. , It can be seen that the second semiconductor layer 125 is formed at a portion corresponding to the gap 142.

The semiconductor layer 105 and the second semiconductor layer 125 are formed by forming amorphous silicon layers 105a and 125a at the bottom and impurity layers 105b and 125b formed of an n + layer at the top. At this time, the impurity layers 105b and 125b are removed according to the separation between the source electrode 102a and the drain electrode 102b and the separation between the first and second protrusions 122c and 142 formed thereon. . The third semiconductor layer 135 is formed by stacking an amorphous silicon layer 135a and an impurity layer 135b on a predetermined portion of the front end gate line 101 ′. Similarly, the lead-out wiring 132 is formed. The impurity layer 135b is removed between the source electrode 132a protruding from the second metal wiring 122 spaced apart from the source electrode 132a and serving as a drain electrode.

In addition, a passivation layer 107 is formed on the source / drain electrodes 102a and 102b and the first and second protrusions 122c and 143, and the first to fourth contact portions 107a, 107b and 127a described above. , 127b is defined by selectively removing the passivation layer 107 to remove the lower second metal, respectively.

8 is a circuit diagram illustrating an example in which the resistor of FIG. 5 is configured in the form of a thin film transistor.

FIG. 8 illustrates an example in which the resistor R of FIG. 5 is configured as a thin film transistor in which a source electrode and a gate electrode are connected to function as a diode. The formation method can be formed in the same process as the formation method of the pixel transistor or the sensing transistor of FIGS. 5 to 7 so that the source electrode and the gate electrode are in contact with each other under the same conditions.

FIG. 9 is a graph illustrating a change in charge amount and a change in voltage of a readout wiring at the node 'A' according to the change in the capacitance of the sensing capacitor.

As shown in FIG. 9, as the cell gap is reduced at the touch point, the capacitance observed at the node A increases, thereby increasing the voltage value of the lead-out wiring side. That is, in the graph, the amount of charge in the right ordinate is the capacitance value observed at node A, and in this case, the sensing capacitor capacitance with respect to the capacitance value Cst2 of the second storage capacitor having a constant value observed in the abscissa. It can be seen that Csen / Cst2 representing the value Csen increases linearly in proportion to the increase in the amount of charge Qa. In addition, the left vertical coordinate represents the voltage value of the lead-out wire, and the voltage value observed in the lead-out wire also increases linearly as the Csen / Cs increases. .

That is, when a touch is generated at a predetermined site, the cell gap thickness of the corresponding site is reduced and accordingly Csen is increased, and this increase in Csen is represented by an increase in the voltage value observed in the lead-out wiring. The touch position may be sensed by the change in the voltage value measured by the unit 300.

Hereinafter, a liquid crystal display according to a second exemplary embodiment of the present invention will be described.

10 is a circuit diagram illustrating a liquid crystal display according to a second embodiment of the present invention, and FIG. 11 is a plan view illustrating a liquid crystal display according to a second embodiment of the present invention.

In the liquid crystal display according to the second exemplary embodiment of the present invention illustrated in FIGS. 10 and 11, a first substrate (not shown) and a second substrate (not shown) opposed to each other and intersect each other on the first substrate. A plurality of gate lines 401 and data lines 402 defining a plurality of pixel regions, and pixel transistors Vpixels 411 formed at intersections of the plurality of gate lines 401 and data lines 402. And a plurality of pixel electrodes 403 formed in each pixel area, a common electrode Vcom formed on the entire surface of the second substrate, a common line 421 parallel to the gate line 401, and the first, A liquid crystal layer (not shown) filled between a second substrate, a liquid crystal capacitor Clc formed between each pixel electrode 403 and a common electrode Vcom, each pixel electrode 403 on the first substrate, A first storage capacitor formed between the first storage electrodes (equivalent to the shield pattern) 421a A second storage capacitor (Cst2) 414 and a sensing capacitor (Vsen) 415 formed in series between the data center Cst1, the common line 421 (Vcom1), and the common electrode Vcom, and m A drain electrode is provided at a node A between the lead-out wiring 418 (RIOC) parallel to the data line 402 and the second storage capacitor Cst2 and the sensing capacitor Csen, and a source electrode is connected to the readout wiring. The sensing transistor Tsw includes a gate electrode 401a connected to the n-th gate line 401.

In the liquid crystal display according to the second exemplary embodiment of the present invention, compared to the circuit diagram of the first exemplary embodiment described above, a point where one electrode of the second storage capacitor 414 (Cst2) is connected to a common line instead of a gate line is described. Have a difference.

In addition, as shown in FIG. 11, the shield connects the sensing capacitor Csen 415 and the pixel electrode pattern 423 for forming the second storage capacitor Cst2 to the common line 421 of the lower pixel region. It forms so that it may overlap with the pattern extended from the pattern 421a.

In this case, the bottom gate line Gn 401 of FIG. 11 is the current gate line Gn, and the second voltage line L2 formed of the same layer as the gate line Gn 401 passing through the center. At this time, the line passing in the horizontal line adjacent to the second voltage line L2 upper side corresponds to the front gate line (Gn-1) 401 '. That is, the second power supply voltage line L2 is provided below the front gate line Gn-1 401 'and corresponds to an A node serving as a drain electrode of the sensing transistor Tsw by such a position shift. The structure was changed such that the second metal wiring pattern 422 did not pass through the opening as much as possible. The pixel electrode pattern 423 and the contact portion 408c may be provided at the lower portion of the second metal wiring pattern 422.

Through this structure change, in the second embodiment of the present invention, in the first embodiment, the loss ratio of the opening ratio is prevented at the portion where the second metal wiring pattern 422 passes through the opening in a vertical line adjacent to the lead-out wiring, Compared to the first embodiment, the aperture ratio can be improved and the same touch sensing effect can be obtained.

In the above-described liquid crystal display of the present invention, the configuration of the touch sensing unit and the lead-out wiring is optimized, and the parasitic capacitance level is lowered to increase the SN ratio of the panel, which is advantageous for touch sensing.

On the other hand, the present invention described above is not limited to the above-described embodiment and the accompanying drawings, it is possible that various substitutions, modifications and changes within the scope without departing from the technical spirit of the present invention. It will be apparent to those of ordinary skill in Esau.

1 is a schematic circuit diagram showing a conventional capacitance method

FIG. 2 is a circuit diagram illustrating the capacitive sensor and driving method thereof of FIG. 1.

3 is a circuit diagram illustrating a liquid crystal display according to a first embodiment of the present invention.

4 is a graph showing a charge change with time in the A node of FIG.

FIG. 5 is a plan view showing a liquid crystal display device corresponding to the circuit diagram of FIG.

FIG. 6 is a plan view illustrating the sensing transistor Tsw of FIG. 3 in detail.

7A and 7B are cross-sectional views taken along lines II ′ and II ′ II ′ of FIGS. 5 and 6, respectively.

8 is a circuit diagram illustrating an example in which the resistor of FIG. 5 is configured in the form of a thin film transistor.

9 is a graph showing a change in charge amount and a change in voltage of the readout wiring at the 'A' node according to the change in the capacitance of the sensing capacitor.

10 is a circuit diagram illustrating a liquid crystal display according to a second exemplary embodiment of the present invention.

11 is a plan view illustrating a liquid crystal display according to a second exemplary embodiment of the present invention.

* Description of the symbols for the main parts of the drawings *

101: gate line 101a: gate electrode

102: data line 102a: source electrode

102b: drain electrode 103: pixel electrode

105: semiconductor layer 121: common line

121a: shield pattern: 123: transparent electrode pattern

122: second metal pattern 122c: first protrusion

142: second protrusion L2: second power supply voltage line

R1: Resistor 132: Lead-out wiring

111: pixel transistor 112: liquid crystal capacitor

113: first storage capacitor 114: second storage capacitor

115: sensing capacitor 115: sensing transistor

117: resistance

Claims (9)

A first substrate and a second substrate facing each other; A plurality of gate lines and data lines defining a plurality of pixel regions crossing each other on the first substrate; Pixel transistors formed at intersections of the plurality of gate lines and data lines, and a plurality of pixel electrodes formed in the pixel areas; A common electrode formed on an entire surface of the second substrate; A liquid crystal layer filled between the first and second substrates; A liquid crystal capacitor formed between the pixel electrode and the common electrode; A first storage capacitor formed between each pixel electrode and a first storage electrode on the first substrate; A second storage capacitor and a sensing capacitor formed in series between an nth (n is a natural number of two or more) gate lines and a common electrode; A lead-out wiring parallel to the mth (m is at least one natural number) data line; And a sensing transistor having a drain electrode connected to the first node between the second storage capacitor and the sensing capacitor, a source electrode connected to the readout wiring, and a gate electrode connected to the n-1 gate line. Display device. A first substrate and a second substrate facing each other; A plurality of gate lines and data lines defining a plurality of pixel regions crossing each other on the first substrate; Pixel transistors formed at intersections of the plurality of gate lines and data lines, and a plurality of pixel electrodes formed in the pixel areas; A common electrode formed on an entire surface of the second substrate; A common line parallel to the gate line; A liquid crystal layer filled between the first and second substrates; A liquid crystal capacitor formed between the pixel electrode and the common electrode; A first storage capacitor formed between each pixel electrode and a first storage electrode on the first substrate; A second storage capacitor and a sensing capacitor formed in series between the common line and the common electrode; Lead-out wiring parallel to the mth data line (m is one or more natural numbers); And And a sensing transistor having a drain electrode connected to a first node between the second storage capacitor and the sensing capacitor, a source electrode connected to the readout wiring, and a gate electrode connected to an n-1 (n is a natural number of 2 or more) gate line. Liquid crystal display device characterized in that the made. The method according to claim 1 or 2, The sensing capacitor, A liquid crystal display device characterized in that it varies according to a capacitance which is significant for a change in thickness of the liquid crystal layer at a touch point. The method according to claim 1 or 2, And the first node is connected to a power supply voltage line. The method of claim 4, wherein And a resistance is further formed between the power supply voltage line and the first node. The method of claim 4, wherein The first storage capacitor is defined by the pixel electrode and the first storage electrode overlapping the pixel electrode. And the second storage capacitor is defined by a second storage electrode overlapping the gate line and the gate line and connected to the first node. The method of claim 5, The time constant defined by the resistance value of the resistor and the capacitance values of the second storage capacitor, the sensing capacitor, and the sensing transistor is less than one frame time, and the on time of the gate high signal applied to the gate line ( liquid crystal display, characterized in that greater than the on-time period. The method of claim 5, The resistor is a liquid crystal display comprising a semiconductor layer. The method of claim 5, And the resistor has a diode structure.

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