KR20090112578A - Information processing apparatus and signal transmission method - Google Patents

Abstract

PURPOSE: An information processing apparatus and a signal transmitting method are provided to enable a PLL circuit to generate and transmit an unnecessary code during clock reproduction without including a DC component. CONSTITUTION: An information processing apparatus includes an encoding unit and a transmitting unit. The encoding unit expresses the first bit value by the first amplitude values and the second bit value by the second amplitude value different from the first amplitude value. The encoding unit encodes to invert polarity of an amplitude value at every period without continuously obtaining the same amplitude value. The transmitting unit transmits a signal encoded by the encoding unit through a transmission line.

Description

Information processing device and signal transmission method {INFORMATION PROCESSING APPARATUS AND SIGNAL TRANSMISSION METHOD}

The present invention relates to an information processing apparatus and a signal transmission method.

BACKGROUND OF THE INVENTION In a portable terminal typified by a mobile phone or the like, an operation portion operated by a user and a connection portion to which a display portion for displaying information is connected are often constituted by movable members. For example, the opening and closing structure of a folding cellular phone is a typical movable member. In addition, recent mobile phones are equipped with a video viewing function, an imaging function, and the like, in addition to a telephone call function and a mail function, and the above-described connection part is required to operate in a complicated manner according to the user's use. For example, in the case of using the video viewing function, the user may think that the display portion is directed toward himself and that the operation portion unnecessary for viewing is discarded. Thus, when using a mobile telephone as a normal telephone, using as a digital camera, using as a television receiver, etc., the structure which can simply change the direction or position of a display part according to the use is calculated | required.

By the way, many signal lines and power lines are wired in the connection part between an operation part and a display part. For example, dozens of wirings are connected in parallel to the display portion (see FIG. 1). Therefore, when the movable member which can perform a complicated movement as mentioned above is used for a connection part, the reliability etc. of this wiring will fall remarkably. For this reason, the technique is shifted from the parallel transmission method to the serial transmission method (refer to FIG. 2) in order to reduce the signal line of the connection part. Of course, the technical shift for the same reason is not limited to the world of mobile phones, but also to the world of various electronic devices requiring complicated wiring. In addition to the reasons described above, the reason for the serialization is also the purpose of reducing the emission electromagnetic noise (EMI).

In the serial transmission method, transmission data is transmitted after being encoded in a predetermined method. As the encoding method, for example, a Non Return to Zero (NRZ) coding method, a Manchester coding method, an Alternate Mark Inversion (AMI) coding method, or the like is used. For example, Patent Document 1 below discloses a technique for transmitting data using an AMI code that is a representative example of a bipolar code. Further, the above document discloses a technique in which a data clock is expressed as an intermediate value of a signal level and transmitted, and a data clock is reproduced on the receiving side based on the signal level.

[Patent Document 1] Japanese Patent Application Laid-Open No. 3-109843

Among the coding schemes described above, the signal of the NRZ code scheme includes a DC component. Therefore, it is difficult to transmit an NRZ code signal together with a DC component such as a power supply. On the other hand, the signal of the Manchester code system or the AMI code system does not include a DC component. Therefore, it can transmit with DC components, such as a power supply. However, in the Manchester code system and the AMI code system, it is necessary to set up a phase-locked loop (PLL) circuit in order to reproduce the data clock of the signal at the receiving side. Therefore, since the PLL circuit is provided on the receiving side, the amount of current consumption increases. In addition, in the Manchester code system, since data is transmitted due to an increase or decrease in amplitude, it is necessary to transmit data at a clock twice the data rate. As a result, high clock operation results in an increase in current consumption.

Accordingly, the present invention has been made in view of the above problems, and includes new and improved information capable of reducing current consumption by generating and transmitting a code that does not include a DC component and unnecessary by the PLL circuit during clock reproduction. It is desirable to provide a processing apparatus and a signal transmission method.

In order to solve the above problems, according to an embodiment of the present invention, for the input data including different first and second bit values, the first bit value is represented by a plurality of first amplitude values, An encoding unit for expressing the second bit value as a second amplitude value different from the first amplitude value and encoding such that the polarity of the amplitude value is reversed every cycle without taking the same amplitude value continuously; There is provided an information processing apparatus comprising a transmission unit for transmitting a signal encoded by the encoding unit via a transmission line.

In this manner, the above-described information processing apparatus expresses the first bit value as a plurality of first amplitude values with respect to input data including different first and second bit values by an encoding unit. The two bit values are represented by a second amplitude value different from the first amplitude value, and are encoded such that the polarity of the amplitude value is inverted every cycle without taking the same amplitude value continuously. The information processing apparatus then transmits, by the transmission unit, the signal encoded by the encoding unit via a predetermined transmission line. Such a configuration makes it possible to detect the clock component of the signal by detecting the polarity inversion period of the encoded signal. As a result, since there is no need to provide a phase locked loop (PLL) circuit on the receiving side, power consumption of the information processing apparatus is reduced.

In addition, the coding unit has a transmission rate Fb where the first bit value is represented by an amplitude value of 0, and the second bit value is represented by repetition of amplitude values A and -A (A is any real number). A data encoding unit encoding the input data with an encoded signal X, and a clock signal having an amplitude value n * A (n> 1) and a frequency Fb / 2 are added to the encoded signal X encoded by the data encoding unit. It may be configured to include a clock adder.

The code X may be a bipolar code. The code X may be an AMI (Alternate Mark Inversion) code having a duty of 100%. Alternatively, the code X may be a code of a partial response method.

The information processing apparatus further determines whether the amplitude value of the coded signal transmitted through the predetermined transmission line is the first amplitude value or the second amplitude value, and the first bit in accordance with the determination result. And a bit value identification section for identifying a value or the second bit value, and a clock detection section for detecting an inversion period of the polarity of the amplitude value of the coded signal and detecting a clock of the coded signal based on the inversion period. You may do it.

The information processing apparatus further includes a signal superimposing unit which generates an overlapping signal by superimposing the coded signal outputted from the coding unit onto a power supply, and transmits the superimposed signal to a power supply line; A signal separation unit may be further provided which is separated by a power source and inputs the encoded signal to the bit value identification unit and the clock detection unit. In this case, the power supply line is used as the predetermined transmission line.

Further, in order to solve the above problem, according to another embodiment of the present invention, for the input data including different first and second bit values, the first bit value is represented by a plurality of first amplitude values And the second bit value is represented by a second amplitude value different from the first amplitude value, and is encoded such that the polarity of the amplitude value is inverted every cycle without taking the same amplitude value continuously. The encoding step to be determined, the determination step to determine whether the amplitude value of the encoded signal transmitted through the predetermined transmission line is the first amplitude value or the second amplitude value, and the determination result in the determination step. An identification step in which the first bit value or the second bit value is identified, a polarity detection step in which a polarity inversion period of the amplitude value of the coded signal is detected, and the polarity detection step. Based on the detected reversal period including the clock detection step it detects that the clock of the encoded signal is provided, a signal transmission method.

As described above, in the above-described signal transmission method, in the encoding step, the first bit value is represented by a plurality of first amplitude values with respect to input data including different first and second bit values, and the second The bit value is represented by a second amplitude value different from the first amplitude value, and is coded so that the polarity of the amplitude value is inverted every cycle without taking the same amplitude value continuously, and an encoded signal is generated. Further, in the bit value determining step, it is determined whether the amplitude value of the coded signal transmitted through the predetermined transmission line is the first amplitude value or the second amplitude value. In the polarity detection step, the polarity inversion period of the amplitude value of the coded signal is detected. In the clock detection step, the clock of the coded signal is detected based on the inversion period detected in the polarity detection step.

In addition, in order to solve the above problem, according to another embodiment of the present invention, a program for realizing a function of the above-described information processing apparatus to a computer can be provided. Also, a recording medium on which this program is recorded can be provided.

As described above, according to the embodiment of the present invention, it is possible to reduce the current consumption by not generating a DC component and generating and transmitting an unnecessary code by the PLL circuit during clock reproduction. In addition, data can be transmitted together with a DC component such as a power supply.

EMBODIMENT OF THE INVENTION Preferred embodiment of this invention is described in detail, referring an accompanying drawing below. In addition, in this specification and drawing, duplication description is abbreviate | omitted by attaching | subjecting the same code | symbol about the component which has substantially the same function and structure.

[Organization of tasks]

First, before describing the technology according to the embodiment of the present invention in detail, the problem to be solved by the embodiment is briefly summarized.

<Parallel Transmission Method>

First, with reference to FIG. 1, the structural example of the portable terminal 100 which employ | adopted the parallel transmission system is demonstrated briefly. 1 is an explanatory diagram showing a configuration example of a portable terminal 100 employing a parallel transmission method. In addition, FIG. 1 schematically illustrates a mobile phone as an example of the mobile terminal 100. However, the technique according to the following description is not limited to the mobile telephone.

As shown in FIG. 1, the portable terminal 100 mainly includes a display unit 102, a liquid crystal unit 104 (LCD; liquid crystal display), a connection unit 106, an operation unit 108, and a base. A band processor 110 (BBP) and a parallel signal line 112 are configured. In addition, the display part 102 may be called a display side, and the operation part 108 may be called a main body side. In the following description, the case where the video signal is transmitted from the main body side to the display side will be described as an example. Of course, the following description is not limited to this.

As shown in FIG. 1, the liquid crystal portion 104 is formed in the display portion 102. The liquid crystal unit 104 displays a video signal transmitted through the parallel signal line 112. In addition, the connection part 106 is a member which connects the display part 102 and the operation part 108. The connection member which forms this connection part 106 has a structure which can rotate the display part 102 180 degrees in the Z-Y plane, for example. In addition, the connecting member has a structure in which the display portion 102 is rotatably formed in the X-Y plane and can fold the portable terminal 100. Moreover, this connection member may have a structure which makes the display part 102 movable in a free direction.

The baseband processor 110 is an arithmetic processing unit that provides a communication control of the portable terminal 100 and an execution function of an application. The parallel signal output from the baseband processor 110 is transmitted to the liquid crystal unit 104 of the display unit 102 via the parallel signal line 112. A plurality of signal lines are wired to the parallel signal line 112. For example, in the case of a mobile phone, there are about 50 signal players n. The transmission speed of the video signal is about 200 Mbps when the resolution of the liquid crystal unit 104 is QVGA. And the parallel signal line 112 is wired through the connection part 106.

That is, many signal lines which form the parallel signal line 112 are wired in the connection part 106. As mentioned above, when the movable range of the connection part 106 is extended, the risk of damage to the parallel signal line 112 increases with the movement. As a result, the reliability of the parallel signal line 112 is impaired. On the other hand, if the reliability of the parallel signal line 112 is to be maintained, the movable range of the connecting portion 106 is greatly restricted. For this reason, a serial transmission scheme is often employed in the portable terminal 100 for the purpose of achieving both the flexibility of the movable member forming the connection portion 106 and the reliability of the parallel signal line 112. In addition, serialization of transmission lines is also progressing from the viewpoint of radiated electromagnetic noise (EMI).

<Serial Transmission Method>

Therefore, with reference to FIG. 2, the structural example of the portable terminal 200 which employ | adopted the serial transmission system is demonstrated briefly. 2 is an explanatory diagram showing a configuration example of a portable terminal 200 employing a serial transmission method. 2 schematically illustrates a mobile telephone as an example of the mobile terminal 200. However, the technique according to the following description is not limited to the mobile telephone. In addition, detailed description is abbreviate | omitted by attaching | subjecting the same code | symbol about the component which has a function substantially the same as the portable terminal 100 of the parallel transmission system shown in FIG.

As shown in FIG. 2, the portable terminal 200 mainly includes a display unit 102, a liquid crystal unit 104 (LCD), a connection unit 106, an operation unit 108, and a baseband processor 110. BBP, parallel signal lines 202 and 210, serializer 204, serial signal line 206, and deserializer 208.

Unlike the portable terminal 100 described above, the portable terminal 200 transmits a video signal by a serial transmission method through the serial signal line 206 wired to the connection unit 106. Therefore, the operation unit 108 is provided with a serializer 204 for serializing the parallel signals output from the baseband processor 110. On the other hand, the display unit 102 is provided with a deserializer 208 for parallelizing serial signals transmitted through the serial signal line 206.

The serializer 204 is output from the baseband processor 110 and converts the parallel signal input through the parallel signal line 202 into a serial signal. The serial signal converted by the serializer 204 is input to the deserializer 208 via the serial signal line 206. The deserializer 208 restores the input serial signal to the original parallel signal and inputs it to the liquid crystal unit 104 through the parallel signal line 210.

In the serial signal line 206, for example, a data signal encoded by the NRZ code system is transmitted alone, or a data signal and a clock signal are transmitted together. The wiring number k of the serial signal line 206 is considerably smaller than the wiring number n of the parallel signal line 112 of the portable terminal 100 of FIG. 1 (k << n). For example, the number of wirings k can be reduced to several. Therefore, the flexibility regarding the movable range of the connection part 106 to which the serial signal line 206 is wired can be said to be very large compared with the connection part 106 to which the parallel signal line 112 is wired. At the same time, it can be said that the reliability of the serial signal line 206 is also high. In addition, a differential signal such as a low voltage differential signal (LVDS) is usually used for the serial signal flowing through the serial signal line 206.

<Feature configuration>

Here, with reference to FIG. 3, the functional structure of the portable terminal 200 which employs the serial transmission system is demonstrated. 3 is an explanatory diagram showing an example of a functional configuration of a portable terminal 200 employing a serial transmission method. 3 is explanatory drawing centering on the functional structure of the serializer 204 and the deserializer 208, and abbreviate | omits description about other components.

Serializer 204

As shown in FIG. 3, the serializer 204 includes a P / S converter 232, an encoder 234, an LVDS driver 236, a PLL unit 238, and a timing controller 240. It is composed by.

As shown in FIG. 3, the parallelizer P-DATA and the parallel signal clock P-CLK are input to the serializer 204 from the baseband processor 110. The parallel signal input to the serializer 204 is converted into a serial signal by the P / S converter 232. The serial signal converted by the P / S converter 232 is input to the encoder 234. The encoder 234 adds a header or the like to the serial signal and inputs the serial signal to the LVDS driver 236. The LVDS driver 236 transmits the input serial signal to the deserializer 208 in a differential transmission method by LVDS.

On the other hand, the parallel signal clock input to the serializer 204 is input to the PLL unit 238. The PLL unit 238 generates a serial signal clock from the parallel signal clock, and inputs the serial signal clock to the P / S converter 232 and the timing controller 240. The timing control part 240 controls the transmission timing of the serial signal by the encoder 234 based on the input serial signal clock.

<Deserializer 208>

As shown in FIG. 3, the deserializer 208 mainly includes an LVDS receiver 252, a decoder 254, an S / P converter 256, a clock reproducing unit 258, and a PLL unit ( 260 and the timing controller 262.

As shown in Fig. 3, the deserializer 208 transmits a serial signal from the serializer 204 in a differential transmission scheme by LVDS. This serial signal is received by the LVDS receiver 252. The serial signal received by the LVDS receiver 252 is input to the decoder 254 and the clock reproducing unit 258. The decoder 254 refers to the header of the input serial signal, detects the head part of the data, and inputs the serial signal to the S / P converter 256. The S / P converter 256 converts the input serial signal into a parallel signal P-DATA. The parallel signal converted by the S / P converter 256 is output to the liquid crystal unit 104.

On the other hand, the clock regeneration unit 258 refers to a reference clock input from the outside, and reproduces the parallel signal clock from the serial signal clock by using the built-in PLL unit 260. The parallel signal clock reproduced by the clock reproducing section 258 is input to the decoder 254 and the timing control section 262. The timing controller 262 controls the reception timing based on the parallel signal clock input from the clock regeneration unit 258. In addition, the parallel signal clock P-CLK input to the timing controller 262 is output to the liquid crystal unit 104.

In this manner, the parallel signal P-DATA and the parallel signal clock P-CLK input from the baseband processor 110 to the serializer 204 are converted into serial signals and transmitted to the deserializer 208. The input serial signal is restored by the deserializer 208 to the original parallel signal and the clock for the parallel signal, and output to the liquid crystal unit 104.

Like the portable terminal 200 described above, the transmission line is serialized by converting and converting the parallel signal into a serial signal. As a result, the movable range of the part where the serial signal line is arranged is expanded, and the flexibility regarding arrangement of the display portion 102 is improved. Therefore, for example, when watching television broadcasting or the like using the portable terminal 200, the portable terminal 200 can be deformed so that the arrangement of the display unit 102 becomes longer horizontally when the user sees it. . With the improvement of such flexibility, the use of the portable terminal 200 has been expanded, and various forms of use, such as watching video and music, have been generated in addition to various functions as a communication terminal.

Among such backgrounds, the liquid crystal unit 104 of the mobile terminal 200 is densified in order to enable finer display, and a lot of information is displayed in fine characters and images. By the way, such a minute character and a video are difficult for a user to see. Therefore, there is a desire of a user to output a character or an image displayed on the liquid crystal unit 104 of the portable terminal 200 to a large screen such as a television receiver or a display device installed externally. In response to this request, an output form such as the portable terminals 300, 500, and 600 shown in Fig. 4A has been proposed. This output form is briefly described below.

Application Example 1 External Output Method Using Electron Coupling

First, reference is made to FIG. 4A. 4A is an explanatory diagram showing an example of the configuration of a portable terminal device 300 capable of transmitting data such as an image to an external output device using electromagnetic coupling. Examples of the external output device include a car navigation system 10 and a television receiver 20. In addition, a display device of a personal computer, a projector that projects an image on a screen, and the like are examples of external output devices.

In order to transfer data such as an image to these external output devices, for example, a signal reading device 400 as shown in Fig. 4A is used. The signal reading device 400 is connected to, for example, the car navigation system 10, the television receiver 20, or the like, or is incorporated in these devices. Between the mobile terminal 300 and the signal reading device 400, a signal is transmitted using an electromagnetic coupling. For that purpose, the coil 302 is provided in the portable terminal 300. In addition, the coil 402 is provided in the signal reading device 400.

For example, consider an operation when the video signal is transmitted from the portable terminal 300 to the television receiver 20. First, the mobile terminal 300 generates parallel signals for parallel transmission of video signals by the baseband processor 110. This parallel signal is transmitted to the serializer 204 via the parallel signal line 202. The serializer 204 converts the transmitted parallel signal into a serial signal and transmits the serial signal to the serial signal line 206. At this time, a current signal corresponding to the serial signal is applied to the coil 302, and an electromagnetic field is generated from the coil 302. Induced by this electromagnetic field, a current is generated in the coil 402 of the signal reading device 400, and the serial signal is demodulated by this current.

As such, the serial signal corresponding to the image signal is transmitted by using the electromagnetic coupling between the portable terminal 300 and the signal reading device 400. Of course, this serial signal is encoded by a predetermined coding scheme, modulated by a predetermined modulation scheme such as ASK (Amplitude Shift Keying), and transmitted. However, since the signal encoded by the NRZ code system includes a direct current component, it is not suitable for signal transmission using electromagnetic coupling. For this reason, a Manchester code system or the like in which the encoded signal does not include a DC component is used for signal transmission by electromagnetic coupling.

Referring to the example of FIG. 4A, the serializer 204 encodes a serial signal by the Manchester code system and transmits it using electromagnetic coupling. In this case, the signal reading device 400 also naturally supports decoding by the Manchester code system. Therefore, the signal reading device 400 receives the encoded signal, decodes it into a serial signal, converts the serial signal into a parallel signal, and outputs the serial signal to the television receiver 20 or the like. In the Manchester code, since "1" is transmitted as "10" and "0" is transmitted as "01", the transmission speed is twice as high as that in which "1" and "0" are simply transmitted. However, since the Manchester code does not contain a direct current component and the clock can be easily extracted, it is suitable for signal transmission using electromagnetic coupling.

By the way, when the portable terminal 300 and the signal reading device 400 are close to each other as shown in Fig. 4B, signal transmission is realized. The communication by such a form may be called contactless communication in some cases. In the example of FIG. 4B, although the display part 102 of the portable terminal 300 is arrange | positioned in the open state, the display part 102 may be arrange | positioned in the closed state. Usually, when the display part 102 of the portable terminal 300 is closed, since electricity supply to the liquid crystal part 104 is often turned off, it is power saving. At this time, even when the portable terminal 300 is closed, a mode in which data can be transmitted to an external output is set.

<Configuration of Functions: Mobile Terminal 300>

Here, the functional configuration of the portable terminal 300 will be briefly described with reference to FIG. 5. 5 is an explanatory diagram showing an example of a functional configuration of the portable terminal 300. 5 is explanatory drawing centering on the functional structure of the serializer 204 and the deserializer 208, and abbreviate | omits description about other components. In addition, detailed description is abbreviate | omitted by attaching | subjecting the same code | symbol about the component which has the function structure substantially the same as the portable terminal 200 demonstrated previously among each component which the portable terminal 300 has.

Serializer 204

As shown in FIG. 5, the serializer 204 includes a P / S converter 232, an encoder 234, an LVDS driver 236, a PLL unit 238, and a timing controller 240. And the driver 332.

As shown in FIG. 5, the serializer 204 receives the parallel signal P-DATA and the parallel signal clock P-CLK from the baseband processor 110. The parallel signal input to the serializer 204 is converted into a serial signal by the P / S converter 232. The serial signal converted by the P / S converter 232 is input to the encoder 234. The encoder 234 adds a header or the like to the serial signal, encodes the serial signal by the Manchester code method, and inputs the serial signal to the LVDS driver 236 and the driver 332. The LVDS driver 236 transmits the input serial signal to the deserializer 208 by the differential transmission method by LVDS. On the other hand, the driver 332 transmits the input serial signal to the signal reading device 400 by using electromagnetic coupling by the coil 302.

On the other hand, the parallel signal clock input to the serializer 204 is input to the PLL unit 238. The PLL unit 238 generates a serial signal clock from the parallel signal clock, and inputs the serial signal clock to the P / S converter 232 and the timing controller 240. The timing control part 240 controls the transmission timing of the serial signal by the encoder 234 based on the input serial signal clock.

<Deserializer 208>

As shown in FIG. 5, the deserializer 208 mainly includes an LVDS receiver 252, a decoder 254, an S / P converter 256, a clock reproducing unit 258, and a PLL unit ( 260 and the timing controller 262.

As shown in Fig. 5, a serial signal is transmitted to the deserializer 208 from the serializer 204 by a differential transmission method by LVDS. This serial signal is received by the LVDS receiver 252. The serial signal received by the LVDS receiver 252 is input to the decoder 254 and the clock reproducing unit 258. The decoder 254 detects the head of the data by referring to the header of the input serial signal, decodes the serial signal encoded by the Manchester code system, and inputs the serial signal to the S / P converter 256. The S / P converter 256 converts the input serial signal into a parallel signal P-DATA. The parallel signal converted by the S / P conversion unit 256 is output to the liquid crystal unit 104.

On the other hand, the clock reproducing unit 258 refers to a reference clock input from the outside, and reproduces the parallel signal clock from the serial signal clock using the built-in PLL unit 260. The parallel signal clock reproduced by the clock reproducing section 258 is input to the decoder 254 and the timing control section 262. The timing controller 262 controls the reception timing based on the parallel signal clock input from the clock regeneration unit 258. In addition, the parallel signal clock P-CLK input to the timing controller 262 is output to the liquid crystal unit 104.

In this manner, the parallel signal P-DATA and the parallel signal clock P-CLK input from the baseband processor 110 to the serializer 204 are converted into serial signals and transmitted to the deserializer 208. The input serial signal is restored by the deserializer 208 to the original parallel signal and the clock for the parallel signal, and output to the liquid crystal unit 104.

<Configuration of Functions: Signal Reading Apparatus 400>

Next, the functional configuration of the signal reading device 400 will be briefly described with reference to FIG. 6. 6 is an explanatory diagram showing an example of a functional configuration of the signal reading device 400.

As shown in FIG. 6, the signal reading device 400 mainly includes a coil 402, a differential receiver 432, an amplifier 434, a decoder 436, and an S / P converter 438. ), An interface 440, a clock reproducing unit 442, a PLL unit 444, and a timing control unit 446.

As described above, the serial signal is transmitted from the portable terminal 300 to the signal reading device 400 using the electromagnetic coupling. This serial signal is received by the differential receiver 432 using the coil 402. The differential receiver 432 inputs the received serial signal to the amplifier 434. The amplifier 434 is provided to amplify the signal level of the serial signal lowered by the signal transmission by electromagnetic coupling. The serial signal amplified by the amplifier 434 is input to the decoder 436 and the clock reproducing unit 442.

The decoder 436 detects the head of the data by referring to the header of the input serial signal, decodes the serial signal encoded by the Manchester code system, and inputs the serial signal to the S / P converter 438. . The S / P converter 438 converts the input serial signal into a parallel signal P-DATA. The parallel signal converted by the S / P converter 438 is input to the interface 440.

On the other hand, the clock reproducing unit 442 refers to the reference clock input from the outside, and reproduces the parallel signal clock from the serial signal clock by using the built-in PLL unit 444. The parallel signal clock reproduced by the clock reproducing section 442 is input to the decoder 436 and the timing control section 446. The timing controller 446 controls the reception timing based on the parallel signal clock input from the clock regenerator 442. In addition, the parallel signal clock P-CLK input to the timing controller 446 is input to the interface 440.

The interface 440 converts the input parallel signal and the parallel signal clock into a signal suitable for an external output device and outputs the converted signal. For example, the interface 440 converts the input parallel signal into an analog RGB signal or a DVI (Digital Visual Interface signal) and outputs it to the car navigation system 10, the television receiver 20, or the like.

In the above, the functional structure of the portable terminal 300 and the signal reading apparatus 400 was demonstrated. By such a function, the user can simply output an image or the like to the external display device by simply placing the portable terminal 300 on the signal reading device 400. Therefore, it becomes possible to output the video etc. of the portable terminal 300 on a large screen. As a result, in addition to the use of the portable terminal 300 as a simple personal communication device or the like, for example, the portable terminal 300 can be functioned as a video telephone used by a large number of people.

<Application Example 2: Data Transmission Method Using a Power Line>

The portable terminal 300 uses the Manchester coding method that does not include a DC component as the coding method. In this way, the coded signal containing no direct current component can be transmitted by being superimposed on a power supply. Therefore, the technique of applying this power line transmission method to the portable terminal 300 will be described. The portable terminal 500 is a structural example using this technique.

<Feature configuration>

First, with reference to FIG. 7A, the functional structure of the portable terminal 500 which can transmit data using a power supply line is demonstrated. 7A is an explanatory diagram showing an example of a functional configuration of a portable terminal 500 capable of data transfer using a power supply line. However, FIG. 7A is explanatory drawing centering on the functional structure of the serializer 204 and the deserializer 208, and abbreviate | omits description about other components. In addition, detailed description is abbreviate | omitted by attaching | subjecting the same code | symbol about the component which has the function structure substantially the same as the portable terminal 300 demonstrated previously among each component which the portable terminal 500 has.

Serializer 204

As shown in FIG. 7A, the serializer 204 includes a P / S converter 232, an encoder 234, an LVDS driver 236, a PLL unit 238, and a timing controller 240. And a driver 332 and an overlapping portion 532. The superimposition part 532 is an example of a signal superimposition part.

As shown in FIG. 7A, the parallelizer P-DATA and the parallel signal clock P-CLK are input to the serializer 204 from the baseband processor 110. The parallel signal input to the serializer 204 is converted into a serial signal by the P / S converter 232. The serial signal converted by the P / S converter 232 is input to the encoder 234. The encoder 234 adds a header or the like to the serial signal, encodes the input in the LVDS driver 236 and the driver 332 in a manner without (or less) DC components such as the Manchester code system.

The LVDS driver 236 converts the input serial signal into LVDS and then inputs the LVDS to the overlapping unit 532. The superimposition unit 532 superimposes the signal input from the LVDS driver 236 on the power supply line and transmits the signal to the deserializer 208. For example, the overlapping portion 532 couples the signals by the capacitor and couples the power supply to the choke coil. In addition, a coaxial cable is used for a power supply line as a transmission line, for example. This power supply line is a line provided for supplying power to the display unit 102 from the operation unit 108. On the other hand, the driver 332 transmits the input serial signal to the signal reading device 400 by using electromagnetic coupling by the coil 302.

By the way, the parallel signal clock input to the serializer 204 is input to the PLL unit 238. The PLL unit 238 generates a serial signal clock from the parallel signal clock and inputs it to the P / S converter 232 and the timing controller 240. The timing control part 240 controls the transmission timing of the serial signal by the encoder 234 based on the input serial signal clock.

<Deserializer 208>

As shown in FIG. 7A, the deserializer 208 mainly includes an LVDS receiver 252, a decoder 254, an S / P converter 256, a clock reproducing unit 258, and a PLL unit ( 260, the timing controller 262, and the separator 552. The separating section 552 is an example of the signal separating section.

As shown in FIG. 7A, a signal in which a power supply and a serial signal are superimposed is transmitted to the deserializer 208 through a power supply line (coaxial cable). The frequency spectrum of this superimposed signal is as shown in FIG. 7B. As shown in Fig. 7B, since the frequency spectrum of the Manchester code does not have a direct current component, it is found that it is transmitted together with the power supply DC.

This will be described again with reference to FIG. 7A. The superimposed signal is separated into a serial signal and a power supply by the separating unit 552. For example, the separating unit 552 cuts the DC component by the capacitor to extract the serial signal, and cuts the high frequency component by the choke coil to extract the power. The serial signal separated by the separating unit 552 is received by the LVDS receiver 252.

 The serial signal received by the LVDS receiver 252 is input to the decoder 254 and the clock reproducing unit 258. The decoder 254 detects the head of the data by referring to the header of the input serial signal, decodes the serial signal encoded by the Manchester code system or the like, and inputs the serial signal to the S / P converter 256. . The S / P converter 256 converts the input serial signal into a parallel signal P-DATA. The parallel signal converted by the S / P conversion unit 256 is output to the liquid crystal unit 104.

On the other hand, the clock reproducing unit 258 refers to a reference clock input from the outside, and reproduces the parallel signal clock from the serial signal clock using the built-in PLL unit 260. The parallel signal clock reproduced by the clock reproducing section 258 is input to the decoder 254 and the timing control section 262. The timing controller 262 controls the reception timing based on the parallel signal clock input from the clock regeneration unit 258. In addition, the parallel signal clock P-CLK input to the timing controller 262 is output to the liquid crystal unit 104.

In this way, the portable terminal 500 can transmit a power supply and a serial signal (video signal) by one coaxial cable. Therefore, there is only one wiring connecting the operation unit 108 and the display unit 102, so that the mobility of the display unit 102 is improved, and the portable terminal 500 can be deformed into a complicated shape. do. As a result, the use of the portable terminal 500 is expanded, and user convenience is improved.

<Organization of tasks>

As described above, the parallel transmission method is inconvenient to freely change the relative positional relationship between the operation unit 108 and the display unit 102. Thus, by providing the serializer 204 and the deserializer 208 like the portable terminal 200 described above, serial transmission of a video signal or the like is enabled, and the movable range of the display unit 102 is expanded. In addition, on the problem that the user's convenience is deteriorated due to the small size of characters or images displayed on the liquid crystal unit 104, the external large screen output can be made possible by using an electronic coupling as in the mobile terminal 300. This problem was solved. In addition, by utilizing the characteristics of the coding scheme used in the portable terminal 300, the mobility of the display unit 102 is further improved by using a scheme in which a signal is superimposed on a power supply line and transmitted.

3, 5, 6, and 7A, the portable terminal 200, 300, 500 and the signal reading device 400, in order to reproduce the clock of the received serial signal, use the PLL unit ( 260, 444) (hereinafter, PLL) have been used. This PLL is necessary for extracting a clock from a signal encoded by the Manchester code system or the like. However, since the power consumption of the PLL itself is not small, the power consumption of the portable terminals 200, 300, 500 and the signal reading device 400 increases only by providing the PLL. Such increase in power consumption is a very big problem in terminal devices such as mobile phones. Against this background, there is a need for a technique for completing the deserializer 208 and the signal reading device 400 without installing a PLL. Therefore, the embodiment described below proposes an encoding technique that does not use PLL for clock reproduction.

<Example>

An embodiment of the present invention will be described. This embodiment is ��� with respect to an encoding method that does not include a DC component and can reproduce a clock without using a PLL. Therefore, after briefly explaining the Alternate Mark Inversion (AMI) code, which is a basic description of the encoding scheme, the functional configuration and encoding scheme of the mobile terminal 600 according to the present embodiment will be described.

<Signal waveform of AMI code>

First, with reference to FIG. 8, the signal waveform of an AMI code and its characteristic are demonstrated briefly. 8 is an explanatory diagram showing an example of a signal waveform of an AMI code. However, in the following description, A shall be arbitrary positive number.

An AMI code | symbol is a code | symbol which expresses data 0 by potential 0, and data 1 by potential A or -A. However, the potential A and the potential -A are alternately repeated. That is, after the potential A is represented by the data 1, and then data 1 appears, the data 1 is represented by the potential -A. As described above, since data is represented by repeating polarity inversion, the AMI code does not include a DC component. As a code having the same kind of characteristics as the AMI code, for example, there is a partial response method represented by PR (1, -1). The transmission code using such polarity reversal is called a bipolar code. Also, a dicode mode or the like can be used. Here, the explanation will be given taking an AMI code having a duty of 100% as an example.

8 shows bit intervals T1, T2,... , AMI code of T14 is typically described. In FIG. 8, data 1 is represented by bit intervals T2, T4, T5, T10, T11, T12, and T14. In the case of the potential A in the bit interval T2, the potential -A becomes the in the bit interval T4. Further, at the bit interval T5, the potential A is obtained. In this way, the amplitude corresponding to data 1 is inverted plus and minus alternately. This is the polarity reversal described above.

On the other hand, the data 0 is all represented by the potential zero. In this manner, although the AMI code does not include a direct current component, the bit intervals T6,. , The potential 0 may be continuous as shown in T9. Thus, when the potential 0 is continuous, there is a problem that it is difficult to extract the clock component from this signal waveform without using the PLL. Therefore, this embodiment proposes a technique for including a clock component in an AMI code (and a code having equivalent characteristics).

[Function Configuration of Mobile Terminal 600]

First, a functional configuration of the portable terminal 600 according to the present embodiment will be described with reference to FIG. 9. 9 is an explanatory diagram showing an example of a functional configuration of the mobile terminal 600 according to the present embodiment. 9 is explanatory drawing centering on the functional structure of the serializer 204 and the deserializer 208, and abbreviate | omits description about other components. In addition, detailed description is abbreviate | omitted by attaching | subjecting the same code | symbol about the component which has the function structure substantially the same as the portable terminal 300 demonstrated previously among each component which the portable terminal 600 has.

Serializer 204

As shown in FIG. 9, the serializer 204 includes a P / S converter 232, an LVDS driver 236, a PLL unit 238, a timing controller 240, and a driver 332. And the encoder 632. The main difference with the portable terminal 300 is the function of the encoder 632. This encoder 632 is an example of an encoder and a transmitter.

As shown in FIG. 9, the parallelizer P-DATA and the parallel signal clock P-CLK are input to the serializer 204 from the baseband processor 110. The parallel signal input to the serializer 204 is converted into a serial signal by the P / S converter 232. The serial signal converted by the P / S converter 232 is input to the encoder 632. The encoder 632 adds a header or the like to the serial signal and encodes the serial signal by a predetermined encoding method.

Here, with reference to FIG. 10, the generation method of the coded signal in the encoder 632 is demonstrated. 10 is an explanatory diagram showing an example of a coding method according to the present embodiment. In addition, although the generation method of the code based on AMI code | symbol is described in FIG. 10, this embodiment is not limited to this, It applies also to the code which has the same characteristic as AMI code | symbol. For example, the present invention can also be applied to a bipolar code, a PR (1, -1) code, or the like.

The signal shown in (C) of FIG. 10 is a signal encoded by the encoding method according to the present embodiment. This signal represents data 1 as a plurality of potentials A1 (-1, -3, 1, 3) and data 0 as a plurality of potentials A2 (-2, 2) different from the potential A1. However, this signal is configured to be inverted in polarity and is configured not to be at the same potential in succession. For example, the bit interval T6,... If the reference is made to the section where data 0 continues at T9, the potentials are -2, 2, -2, and 2. By using such a code, even if the same data values appear continuously, it is possible to detect the rising and falling edges and reproduce the clock component.

By the way, the encoder 632 is provided with the adder ADD in order to generate | generate the code | symbol as mentioned above. This adder ADD is an example of a clock adder. As shown in FIG. 10, the encoder 632 encodes the input serial signal into AMI code (A), for example, and inputs an AMI code into the adder ADD. In addition, the encoder 632 generates a clock B having a frequency (2 / Fb) of half the transmission rate Fb of the AMI code, and inputs it to the adder ADD. However, the amplitude of the clock is N times the AMI code (N> 1; N = 2 in the example of FIG. 10). The encoder 632 adds the AMI code and the clock by the adder ADD to generate the code (C). At this time, the AMI code and the clock are calculated and added according to the edge.

This will be described with reference to FIG. 9 again. The serial signal encoded by the encoder 632 is input to the LVDS driver 236 and the driver 332. The LVDS driver 236 transmits the input serial signal to the deserializer 208 by the differential transmission method by LVDS. On the other hand, the driver 332 transmits the input serial signal to the signal reading device 400 by using electromagnetic coupling by the coil 302.

On the other hand, the parallel signal clock input to the serializer 204 is input to the PLL unit 238. The PLL unit 238 generates a serial signal clock from the parallel signal clock, and inputs the serial signal clock to the P / S converter 232 and the timing controller 240. The timing controller 240 controls the transmission timing of the serial signal by the encoder 632 based on the input serial signal clock.

<Deserializer 208>

As shown in FIG. 9, the deserializer 208 mainly includes an LVDS receiver 252, an S / P converter 256, a PLL unit 260, a timing controller 262, and a clock detector ( 652 and a decoder 654. The main difference from the above-described portable terminal 300 is that a clock detector 652 having no PLL is included. The decoder 654 is an example of a bit value identification unit.

As shown in Fig. 9, a serial signal is transmitted to the deserializer 208 from the serializer 204 in a differential transmission method by LVDS. This serial signal is received by the LVDS receiver 252. The serial signal received by the LVDS receiver 252 is input to the decoder 654 and the clock detector 652. The decoder 654 detects the head part of the data with reference to the input serial signal header, and decodes the serial signal encoded according to the encoding method used by the encoder 632.

Here, the decoding method by the decoder 654 is demonstrated, referring FIG. As described above, the serial signal is encoded by the encoder 632 in the format shown in Fig. 10C. Therefore, the decoder 654 can decode the original serial signal by determining whether the amplitude of this signal is A1 or A2.

In order to determine the amplitude A1 (-1, -3, 1, 3) corresponding to data 1 and the amplitude A2 (-2, 2) corresponding to data 0, the four thresholds shown in FIG. Values L1, L2, L3, L4 are used. Of course, if the value returned to the negative side or the positive side is determined using the absolute value circuit, it can be determined by the two threshold values. Therefore, the decoder 654 compares the amplitude of the input signal with the above four thresholds, determines whether the amplitude is A1 or A2, and decodes the original serial signal.

This will be described again with reference to FIG. 9. The serial signal decoded by the decoder 654 is input to the S / P converter 256. The S / P converter 256 converts the input serial signal into a parallel signal P-DATA. The parallel signal converted by the S / P conversion unit 256 is output to the liquid crystal unit 104.

On the other hand, the clock detector 652 refers to a reference clock input from the outside and detects a clock component from the input signal. As already explained, by using the sign shown in Fig. 10C, the clock component compares the amplitude and the threshold L0 (potential 0) to determine the polarity of the amplitude, and based on the cycle of polarity inversion, The component can be detected. Therefore, the clock detector 652 can detect the clock component of the signal without using the PLL. As a result, it becomes possible to reduce the power consumption of the deserializer 208.

This will be described again with reference to FIG. 9. The clock detected by the clock detector 652 is input to the decoder 654 and the timing controller 262. The timing controller 262 controls the reception timing based on the clock input from the clock detector 652. In addition, the clock P-CLK input to the timing controller 262 is output to the liquid crystal unit 104.

Thus, by using the code according to the present embodiment which does not include the DC component (see FIG. 11) and can reproduce the clock component from the polarity inversion cycle, the clock is detected without using the PLL, It is possible to greatly reduce power consumption. In addition, the frequency spectrum of the code | symbol which concerns on a present Example becomes a shape as shown in FIG. 11, for example. The line spectrum appears at the frequency Fb / 2 of the clock added by the adder ADD of the encoder 632, and the broad frequency spectrum of the AMI code is shown. In this frequency spectrum, the frequencies Fb, 2Fb, 3Fb,... A null point exists at.

By the way, this technique is applicable to the above-mentioned portable terminals 200, 300, 500 and the signal reading apparatus 400. As shown in FIG. That is, the present invention can also be applied to an electronic device that supports a power line transmission method or a signal transmission method by electronic coupling. Applying the technique of this embodiment to such a device, it is possible to omit the PLL from the deserializer 208 mounted in each device. Therefore, a configuration diagram in which a part of the components of the portable terminal 200, 300, 500 or the signal reading device 400 is combined with the portable terminal 600 according to the present embodiment is within the technical scope of the present embodiment. Of course.

[Hardware Configuration (Information Processing Unit)]

The function of each component of the terminal can be realized by, for example, an information processing apparatus having a hardware configuration shown in FIG. It is explanatory drawing which shows the hardware structure of the information processing apparatus which can implement the function which each component of the said apparatus has.

As shown in Fig. 12, the information processing apparatus mainly includes a CPU (Central Processing Unit) 902, a ROM (Read Only Memory) 904, a RAM (Random Access Memory) 906, The host bus 908, the bridge 910, the external bus 912, the interface 914, the input unit 916, the output unit 918, the storage unit 920, and the drive 922. And a connection port 924 and a communication unit 926.

The CPU 902 functions as, for example, an arithmetic processing unit or a control unit, and is based on various programs recorded in the ROM 904, the RAM 906, the storage unit 920, or the removable recording medium 928. To control all or part of the operation of each component. The ROM 904 stores, for example, a program to be loaded into the CPU 902, data to be used for calculation, and the like. The RAM 906 temporarily or permanently stores, for example, a program loaded on the CPU 902, various parameters that are appropriately changed when the program is executed. These components are connected to each other by, for example, a host bus 908 capable of high-speed data transfer. In addition, the host bus 908 is connected to, for example, an external bus 912 having a relatively low data transfer rate via the bridge 910.

The input unit 916 is operation means such as a mouse, a keyboard, a touch panel, a button, a switch or a lever, for example. The input unit 916 may be remote control means (so-called remote control) capable of transmitting a control signal using infrared rays or other radio waves. Moreover, the input part 916 is comprised by the input control circuit etc. for transmitting the information input using said operation means to the CPU 902 as an input signal.

The output unit 918 may be, for example, a display device such as a cathode ray tube (CRT), a liquid crystal display (LCD), a plasma display panel (PDP), or an electro-luminescence display (ELD), speakers, headphones, or the like. It is a device capable of visually or audibly notifying a user of acquired information, such as an audio output apparatus, a printer, a mobile telephone, or a facsimile.

The storage unit 920 is a device for storing various data. For example, the storage unit 920 is a magnetic memory device such as a hard disk drive (HDD), a semiconductor memory device, an optical memory device, an optical magnetic memory device, or the like. It is composed by.

The drive 922 reads information recorded on the removable recording medium 928 such as a magnetic disk, an optical disk, a magneto-optical disk, or a semiconductor memory, or writes information to the removable recording medium 928. It is a device to write. The removable recording medium 928 may be, for example, DVD media, Blu-ray media, HD-DVD media, CompactFlash (CF), Memory Stick, or SD Memory Card (Secure Digital Memory Card). ) And so on. Of course, the removable recording medium 928 may be, for example, an integrated circuit card or an electronic device equipped with a non-contact type IC chip.

The connection port 924 connects an external connection device 930 such as, for example, a universal serial bus (USB) port, an IEEE1394 port, a small computer system interface (SCSI), an RS-232C port, or an optical audio terminal. Is a port. The external connection device 930 is, for example, a printer, a portable music player, a digital camera, a digital video camera or an IC recorder.

The communication unit 926 is a communication device for connecting to the network 932. For example, a communication card for wired or wireless LAN (Local Area Network), Bluetooth (registered trademark), or WUSB (Wireless USB), a router for optical communication, a router for Asymmetric Digital Subscriber Line (ADSL), or various communications Modems and the like are used. In addition, the network 932 connected to the communication unit 926 is configured by a network connected by wire or wirelessly. For example, the Internet, home LAN, infrared communication, broadcasting, or satellite communication is used.

Those skilled in the art will appreciate that various changes, combinations, subcombinations and modifications may be made, depending upon the design and other factors, as long as they fall within the scope of the appended claims or their equivalents.

For example, in the above embodiment, the AMI code is taken as an example as the code input to the adder ADD, but the technique of the present invention is not limited thereto. As already explained, various bipolar codes and PR (1, -1) codes of partial response methods are used. In this way, a code format using polarity inversion is preferably used, but from the beginning, generating such a code by bit shift or the like can also be considered. Thus, some modifications can be considered with respect to the generation method of the code.

The present invention includes the technical contents related to Japanese Patent Application JP 2008-112793 filed with Japan Patent Office on April 23, 2008, the entire contents of which are referred to below.

1 is an explanatory diagram showing a configuration example of a mobile terminal;

2 is an explanatory diagram showing a configuration example of a mobile terminal;

3 is an explanatory diagram showing a functional configuration example of a portable terminal according to serial transmission;

4A is an explanatory diagram showing a configuration example of a mobile terminal;

4B is an explanatory diagram showing a contact state between a portable terminal and a signal reading device;

5 is an explanatory diagram showing a functional configuration example of a portable terminal according to serial transmission;

6 is an explanatory diagram showing a functional configuration example of a signal reading device according to serial transmission;

Fig. 7A is an explanatory diagram showing a functional configuration example of a portable terminal according to serial transmission.

7B is an explanatory diagram showing an example of a frequency spectrum of a Manchester code.

8 is an explanatory diagram showing an example of a signal waveform of an AMI code;

9 is an explanatory diagram showing a functional configuration example of a portable terminal according to an embodiment of the present invention;

10 is an explanatory diagram showing a signal generation method according to an embodiment of the present invention.

11 is an explanatory diagram showing an example of a frequency spectrum of a signal according to an embodiment of the present invention.

12 is an explanatory diagram showing a hardware configuration example of an information processing apparatus such as a portable terminal.

<Explanation of symbols for the main parts of the drawings>

100, 200, 300, 500, 600: Mobile terminal

102: display unit

104: liquid crystal part

106: connection

108: control panel

110: baseband processor

112, 202, and 210: parallel signal lines

204: serializer

206: serial signal line

208: Deserializer

232: P / S converter

234, 632: encoder

236: LVDS driver

238, 260, 444: PLL section

240: timing controller

252: LVDS Receiver

254, 436, 654: decoder

256, 438: S / P converter

258, 442: clock reproducing unit

262, 446: timing controller

332: driver

302, 402: coil

400: signal reading device

432: differential receiver

434: amplifier

440: interface

532: overlap

552: separator

652: clock detection unit

ADD: adder

Claims (8)

Regarding input data including different first and second bit values, the first bit value is represented by a plurality of first amplitude values, and the second bit value is a second amplitude different from the first amplitude value. An encoding unit which is expressed as a value and encodes such that the polarity of the amplitude value is reversed every cycle without taking the same amplitude value continuously; Transmitter for transmitting the signal encoded by the encoder through a predetermined transmission line Information processing apparatus comprising a. The method of claim 1, The encoder, The first bit value is represented by an amplitude value of 0, and the second bit value is encoded by the encoded signal X at a transmission rate Fb represented by repetition of amplitude values A and -A (A is any real number). A data encoding unit to perform, A clock adder for adding a clock signal having an amplitude value n * A (n> 1) and a frequency Fb / 2 to the coded signal X encoded by the data encoder Information processing apparatus comprising a. The method of claim 2, The coded signal X is a bipolar code. The method of claim 3, The coded signal X is an information processing apparatus having an AMI (Alternate Mark Inversion) code having a duty of 100%. The method of claim 3, The coded signal X is an information processing apparatus which is a code of a partial response method. The method according to claim 1 or 2, It is determined whether the amplitude value of the coded signal transmitted through the predetermined transmission line is the first amplitude value or the second amplitude value, and according to the determination result, the first bit value or the second bit value is determined. A bit value identification unit to identify, A clock detector which detects the inversion period of the polarity of the amplitude value of the coded signal and detects the clock of the coded signal based on the inversion period Information processing device further comprising. The method of claim 6, A signal superimposing unit for generating an overlapping signal by superimposing the coded signal outputted from the encoding unit on a power source and passing the overlapping signal to a power line; A signal separation unit for separating the superimposed signal obtained from the power supply line into the coded signal and the power source, and inputting the coded signal to the bit value identification unit and the clock detection unit. Further provided, An information processing apparatus using the power supply line as the predetermined transmission line. For input data including different first and second bit values, the first bit value is represented by a plurality of first amplitude values, and the second bit value is a second amplitude different from the first amplitude value. An encoding step that is expressed as a value and is encoded such that the polarity of the amplitude value is inverted every cycle without taking the same amplitude value continuously, and generates an encoded signal, A determination step of determining whether an amplitude value of the coded signal transmitted through a predetermined transmission line is the first amplitude value or the second amplitude value; An identification step of identifying the first bit value or the second bit value based on a determination result in the determination step, A polarity detection step of detecting a period of inversion of the polarity of the amplitude value of the coded signal; A clock detecting step of detecting a clock of an encoded signal based on an inversion period detected in the polarity detecting step; Signal transmission method comprising a.

Images