KR20090106421A - Memory system - Google Patents

Abstract

A memory system includes a management-information restoring unit. The management-information restoring unit determines whether a short break has occurred referring to a pre-log or a post-log in a NAND memory. The management-information restoring unit determines that a short break has occurred when the pre-log or the post-log is present in the NAND memory. In that case, the management-information restoring unit determines timing of occurrence of the short break, and, after selecting a pre-log or a post-log used for restoration, performs restoration of the management information reflecting these logs on a snapshot. Thereafter, the management-information restoring unit applies recovery processing to all write-once blocks in the NAND memory, takes the snapshot again, and opens the snapshot and the logs in the past.

Description

Memory system

The present invention relates to a memory system employing a nonvolatile semiconductor storage device.

Some personal computers (PCs) employ hard disk devices as secondary storage devices. In such PCs, a technique for backing up data stored in a hard disk device is known to prevent invalidation due to some failure. For example, when an action to change data in a hard disk device is detected, it takes a snapshot, which is a backup copy of the data before the change, and generates a log of changes made to the data. Subsequently, the process of taking a new snapshot, invalidating a log previously taken before a new snapshot is taken, and generating a new log is repeated every predetermined time (for example, US Patent Application Publication No. 2006-0224636 Reference). If data is invalidated for some reason, the data can be recovered by referring to the snapshot and log.

Recently, the capacity of NAND flash memory, which is a nonvolatile semiconductor storage device, has increased rapidly. As a result, a PC including a memory system having a NAND flash memory as a secondary storage device has been put into practical use. However, the technique disclosed in US Patent Publication No. 2006-0224636, a personal computer having a NAND flash memory as such secondary storage device as in the case of the backup of data stored in a personal computer having a hard disk device as a secondary storage device. It cannot be applied to backup of data stored in. This is because a multi-value memory technology capable of storing a plurality of data (multi-value data) of two or more bits in one memory cell is employed to increase the capacity of the NAND flash memory.

In the memory cell constituting the multi-value, a plurality of threshold voltages may be set according to the number of electrons in which the gate insulating film, the floating gate electrode, the inter-gate insulating film, and the control gate electrode are sequentially stacked on the channel region and accumulated in the floating gate electrode. And a field effect transistor structure having a stacked gate structure. To perform multivalued storage based on a plurality of threshold voltages, it is necessary to narrow the distribution of threshold voltages corresponding to one data very narrowly.

For example, a multi-value memory capable of storing four values, which includes a lower order page and a higher order page in one memory cell, and writes one bit of data to each page. There is a multivalued memory that stores bits (four values). In the method of writing data in such a multi-value memory, after data is written to the lower page of the first memory cell, the data is written to the lower page of the memory cell (second memory cell) adjacent to the first memory cell. After the data is written to such adjacent memory cells, the data is written to the upper page of the first memory cell (see, for example, Japanese Patent Laid-Open No. 2004-192789).

However, in such multi-value memory, the threshold voltage of the first memory cell to which data is written first varies because of the threshold voltage of the second memory cell to which data is written later and adjacent to the first memory cell. Therefore, in the multi-value memory, if the writing is suspended due to abnormal separation of the power supply, for example, while data is being written to the upper page of the predetermined memory cell, lower page destruction may occur, and the data is written first. The lower page data is also destroyed.

Thus, in a personal computer employing a NAND flash memory, for example, the presence of log destruction when the memory system is reset from abnormal disconnection of the power supply or the like, by distinguishing the timing of suspending, or when writing is suspended during writing of the log. Alternatively, it is necessary to reset the memory system to the state prior to the occurrence of abnormal detachment, by identifying the absence and selecting the log unaffected by the suspension and reflecting it in the snapshot. However, even if this recovery process is performed, the destroyed log still exists. Therefore, there is a problem that the possibility of accidentally reading the destroyed log after the reset operation cannot be eliminated and the reliability of the memory system is not guaranteed.

In a memory system having a NAND flash memory, when data is stored, for example, it is necessary to erase a write area once in a unit called a block and then perform a write in a unit called a page. On the other hand, when data is stored, for example, it is necessary to erase the write area once in a unit called a block and then write in a unit called a page. On the other hand, as the erase count for a block performed before such data writing increases, there is a problem that the deterioration of the memory cells constituting the block increases. In other words, there is a limit on the rewritable number of blocks. Thus, suppression of the erase count of blocks is essential for extending the endurance life of the memory system. As a countermeasure to this problem, for example, a process called wear leveling is performed which distributes the update portions of data as evenly as possible so that the erase counts of all the blocks of the memory system are approximately equal.

When a standby, sleep, or reset signal is generated in a personal computer or the like, in the conventional method of storing snapshots and logs, a snapshot is taken before the memory system is switched to the designated state. For example, when a wait signal is received, management information about the memory system is stored by taking a snapshot again. Subsequently, the memory system enters a standby state. After the memory system is reset from the standby state, the management information is recovered by using the stored snapshot. The memory system is restored to the state before the transition to the standby state based on this management information.

When a method of taking a snapshot again whenever a standby signal or the like is received is applied to a memory system having a NAND flash memory, there is a problem that the endurance life of the memory system is reduced as the number of snapshots is acquired. This is because when a snapshot is taken, a block, which is a storage area of management information, is first erased and then management information is written to the block, thereby deteriorating the memory cell by block erasing. If a memory cell goes to standby after a standby signal or the like is received and the snapshot is taken again, the memory cell takes a long time to take a snapshot, so that the waiting time for switching to the standby state, etc. is long. have.

According to an aspect of the present invention, there is provided a memory system, comprising: a nonvolatile second storage unit comprising a volatile first storage unit, a memory cell capable of storing multi-value data, and a first storage unit; Perform data transfer between the host device and the second storage unit, store management information including a storage location of data stored in the second storage unit during a startup operation of the memory system, in the first storage unit, and store the stored management information. And a controller that performs data management of the first storage unit and the second storage unit based on the management information stored while updating the data. When the predetermined condition is satisfied, the controller stores the management information stored in the first storage unit as a snapshot in the second storage unit, and stores a log as update difference information of the management information in the second storage unit. If the management information storage unit to be stored and the log exist in the second storage unit when starting the startup operation, recover the management information in the first storage unit based on the snapshot and the log and take the snapshot again to restore the management information. And a management information recovery unit for storing in the two storage units.

According to another aspect of the invention, there is provided a memory system, the memory system comprising: a volatile first storage unit, a nonvolatile second storage unit including a memory cell capable of storing multi-value data, and a first storage unit To perform data transfer between the host device and the second storage unit, and to store and store management information including a storage location of data stored in the second storage unit during the startup operation of the memory system in the first storage unit. And a controller that performs data management of the first storage unit and the second storage unit based on the management information stored while updating the information. When the predetermined condition is satisfied, the controller stores management information stored in the first storage unit as a snapshot in the second storage unit, and stores the log as update difference information of management information in the second storage unit. Recovers management information in the first storage unit based on the snapshot and the log when the log is present in the second storage unit when starting the start operation and the information storage unit; And a management information recovery unit for recovering management information in the first storage unit based on the snapshot if not present in the storage unit. When the management information storage unit receives one of the wait signal, the sleep signal, and the reset signal, the management information storage unit determines whether to take a snapshot again before switching to the designated state designated by any of these signals.

1 is a block diagram of an example of a configuration of a memory system according to an embodiment of the present invention.

2 is a circuit diagram of an example of a configuration of any block of a NAND memory.

3A is a schematic diagram of the functional configuration of a DRAM and FIG. 3B is a schematic diagram of the functional configuration of a NAND memory.

4 is a diagram of an example of a layer structure for managing data stored in a memory system.

5 is a diagram of an example of a cache management information table.

6 is a diagram of an example of a logical NAND management information table.

7 is a diagram of an example of an intra-NAND logical-physical translation information table.

8 is a schematic diagram of an example of the contents of management information storage information stored in the management information storage area.

9 shows an example of a log.

10 is a block diagram of an example of a functional configuration of the drive control unit shown in FIG. 1.

FIG. 11 is a block diagram of an example of a functional configuration of the data management unit shown in FIG. 10.

12 is a flowchart of an example of a storage processing procedure for management information of a memory system.

13 is a diagram for explaining storage processing for the prelog and postlog.

14 is a flowchart of an example of a recovery processing procedure for management information of a memory system.

15A-15D are diagrams of examples of the relationship between the data of a memory cell and the threshold voltage of the memory cell and the writing order of the NAND memory.

16A to 16D are diagrams (1) for explaining a method of selecting a log used for recovery of management information.

17E to 17G are diagrams (2) for explaining a method of selecting a log used for recovery of management information.

18 is a schematic diagram of another example of the contents of management information storage information stored in the management information storage area.

19A and 19B show time transitions to the standby state without taking a snapshot again, and when the standby signal is received, transitions to the standby state after taking the snapshot again.

20 is a diagram in which logs are stored in log units in log units.

21 is a flowchart for explaining the operation of the management information storage unit shown in FIG. 11 during standby, sleep, or reset.

DETAILED DESCRIPTION An exemplary embodiment of a memory system according to the present invention will be described in detail with reference to the accompanying drawings. The present invention is not limited to this embodiment.

First embodiment

The memory system according to the first embodiment of the present invention includes a nonvolatile semiconductor storage device and is used as a secondary storage device (SSD) of a host apparatus such as a personal computer. The memory system has a function of storing data requested to be written by the host device, reading data requested to be read by the host device, and outputting the data to the host device. 1 is a block diagram of an example of a configuration of a memory system 10 according to the first embodiment of the present invention. The memory system 10 includes a DRAM 11 as a first storage unit, a NAND flash memory 12 (hereinafter referred to as a NAND memory) as a second storage unit, a power supply circuit 13, and a drive control unit ( 14)

The DRAM 11 is used as a storage unit for data transfer, management information recording, or a work area. In particular, when the DRAM 11 is used as a storage unit for data transfer, the DRAM 11 is used to temporarily store data requested to be written by the host device before the data is written to the NAND memory 12, The DRAM 11 is used to read data requested to be read by the host device from the NAND memory 12 and to temporarily store the read data. When the DRAM 11 is used as a storage unit for recording management information, the DRAM 11 is used to store management information for managing storage positions of data stored in the DRAM 11 and the NAND memory 12. . When the DRAM 11 is used as a storage unit for the work area, the DRAM 11 is used during the expansion of the prelog and post log (pre update log and post update log), for example, used when management information is recovered. do.

The NAND memory 12 is used as a storage unit for storing data therein. In particular, the NAND memory 12 stores therein the data designated by the host device therein, and stores therein management information managed by the DRAM 11 for backup. In FIG. 1, an NAND memory 12 including four channels 120A to 120D is illustrated as an example. Each of the channels 120A through 120D includes two packages 121, each containing eight chips 122 having a storage capacity of a predetermined size (eg, 2 GB). Channels 120A through 120D are connected via drive control unit 14 and buses 15A through 15D.

The power supply circuit 13 receives an external power supply and generates a plurality of internal power supplies to be supplied to each unit of the memory system 10 from the external power supply. The power supply circuit 13 detects the state, rising edge or falling edge of the external power supply, generates a power-on reset signal based on the detected state, and outputs the power-on reset signal to the drive control unit 14.

The drive control unit 14 controls the DRAM 11 and the NAND memory 12. As described later in detail, for example, the drive control unit 14 performs recovery processing for management information and storage processing for management information in accordance with a power-on reset signal from the power supply circuit 13. The drive control unit 14 transmits and receives data to and from the host device through the ATA interface (I / F) and data to and from the debugging device through the RS232C I / F. In addition, the drive control unit 14 outputs a control signal for controlling the on / off of the status display LED provided on the outside of the memory system 10.

Hereinafter, the configuration of the NAND memory 12 will be described in detail. The NAND memory 12 is configured by arranging a plurality of blocks (erasing unit regions) that are data erasing units on a substrate. 2 is a circuit diagram of an example of a configuration of any block of the NAND memory 12. In Fig. 2, the left and right directions are set in the X direction and the direction perpendicular to the X direction is set in the Y direction.

Each block BLK of the NAND memory 12 includes (m + 1) (m is an integer of 0 or more) NAND strings NS arranged in order along the X direction. Each NAND string NS has (n + 1) (n is an integer greater than or equal to 0) memory cells sharing a diffusion region (source region or drain region) between memory cell transistors MT adjacent to each other in the Y direction. Transistors MT0 to MTn. In addition, the memory cell transistors MT0 to MTn are connected in series in the Y direction. In addition, the selection transistors ST1 and ST2 are disposed across one row of the (n + 1) memory transistors MT0 to MTn.

Each of the memory cell transistors MT0 to MTn is a MOSFET (metal oxide semiconductor field effect transistor) having a stacked gate structure formed on a semiconductor substrate. The stacked gate structure includes a charge accumulation layer (floating gate electrode) formed on the semiconductor substrate through the gate insulating film and a control gate electrode formed on the charge accumulation layer through the inter-gate insulating film. In addition, the memory cell transistors MT0 to MTn are multi-value memories in which a threshold voltage is changed according to the number of electrons accumulated in the floating gate electrode, and two or more bits of data may be stored according to a difference in the threshold voltage. In the first embodiment, it is assumed that the memory cell transistor MT is a multivalued memory.

The word lines WL0 to WLn are connected to control gate electrodes of the memory cell transistors MT0 to MTn of each NAND string NS, respectively. Memory cell transistors MTi (i = 0 through n) in each of the NAND strings NS are commonly connected by the same word lines i = 0 through n. In other words, the control gate electrodes of the memory cell transistors MTi that exist on the same row in the block BLK are connected to the same word line WLi. A group of (m + 1) memory cell transistors MTi connected to the same word line WLi is a unit for forming one page. In the NAND memory 12, writing and reading of data are performed in units of these pages.

The bit lines BL0 to BLm are respectively connected to drains of the (m + 1) select transistors ST1 in one block BLK. The select gate line SGD is commonly connected to gates of the select transistors ST1 of each NAND string NS. Sources of the selection transistors ST1 are connected to drains of the memory cell transistors MT0. Similarly, the source line SL is commonly connected to the sources of the (m + 1) select transistors ST2 in one block BLK. The select gate line SGS is connected to the gates of the select transistors ST2 of each NAND string NS in common. Drains of the selection transistors ST2 are connected to sources of the memory cell transistors MTn.

Although not shown in the drawing, the bit lines B j (j = 0 to m) in one block BLK may drain the select transistors ST1 between the bit lines B j of the other blocks BLK. Connect them in common. In other words, the NAND strings NS in the same column of the blocks BLK are connected by the same bit line BLj.

Next, the functional configurations of the DRAM 11 and the NAND memory 12 will be described. 3A is a schematic diagram of the functional configuration of the DRAM 11, and FIG. 3B is a schematic diagram of the functional configuration of the NAND memory 12. As shown in Fig. 3A, the DRAM 11 includes a write cache area WC in which data requested to be written by the host device is stored, and a read cache area in which data requested to be read by the host device is stored ( RC), temporary storage area 111 in which management information for managing a storage location of data stored in DRAM 11 and NAND memory 12 is stored, and work area 112 used when management information is recovered. It includes.

As shown in FIG. 3B, the NAND memory 12 includes a data storage area 125 in which data requested to be written by the host device is stored, and a management managed in the temporary storage area 111 of the DRAM 11. And a management information storage area 126 in which information is stored. In this example, data writing and reading units in the NAND memory 12 are set as page size units. The erase unit is set as a block size unit. Therefore, the area for storing each block of the NAND memory 12 managed in block size units is further divided into areas in page size units.

Hereinafter, management information managed in the temporary storage area 111 of the DRAM 11 will be described. 4 is an example of a layer structure for managing data stored in the memory system 10. Here, assume that this data is data requested to be written or read by the host apparatus. In the memory system 10, data management is performed by a three-layer structure, which is a DRAM management layer 31, a logical NAND management layer 32, and a physical NAND management layer 33. The DRAM management layer 31 performs data management in the DRAM 11 serving as a cache. The logical NAND management layer 32 performs logical data management in the NAND memory 12. The physical NAND management layer 33 performs physical data management of the NAND memory 12, life extension processing for the NAND memory 12, and the like.

In the write cache area WC and the read cache area RC of the DRAM 11, data designated by a logical address (hereinafter referred to as LBA (logical block address)) managed by the address management method of the host device is It is stored at a physical address within a predetermined range on the DRAM 11 (hereinafter referred to as an intra-DRAM physical address). The data in the DRAM management layer 31 includes cache management information 41 including a correspondence between the LBA of the data to be stored and a physical address in the DRAM and a sector flag indicating whether the data exists in units of sector sizes in the page. Managed by

5 shows an example of the cache management information 41 in the form of a table. The cache management information 41 is one entry for one area of one page size of the DRAM 11. The number of entries is equal to or less than the number of pages corresponding to the write cache area WC and the read cache area RC. In each of the entries, an LBA of page sized data, a physical address in the DRAM, and a sector flag indicating the location of valid data in each of the regions obtained by dividing this page by the sector size are associated.

In the NAND memory 12, the data from the DRAM 11 is stored at a physical address (hereinafter referred to as a physical address in the NAND) within a predetermined range on the NAND memory 12. In the NAND memory 12 formed by the multi-value memory, since the number of rewritables is limited, the number of rewrites for the blocks constituting the NAND memory 12 is controlled to be equalized by the drive control unit 14. . In other words, when updating of data written to a physical address in a predetermined NAND of the NAND memory 12 is performed, the drive control unit 14 determines the number of rewrites for the blocks constituting the NAND memory 12. Control to equalize is performed to write data reflecting a part of the update request in the block containing the data to be updated to a block different from the initial block, and invalidate the initial block.

As described above, in the NAND memory 12, processing units are different in writing and reading processing for data and erasing processing for data. In the update process for data, the position (block) of the data before update differs from the position (block) of the data after update. Therefore, in the first embodiment, logical addresses in the NAND (hereinafter referred to as logical addresses in the NAND) used independently in the NAND memory 12 are provided in addition to the physical addresses in the NAND.

Therefore, the data of the logical NAND management layer 32 is between the LBA of the page size unit data received from the DRAM 11 and the logical address in the NAND indicating the logical page position of the NAND memory 12 in which the received data is stored. Is managed by logical NAND management information 42 including relations indicative of < RTI ID = 0.0 > and < / RTI > A set of a plurality of logical blocks can be set as one logical block. The data of the physical NAND management layer 33 includes logical address-physical address translation information (hereinafter, logical-physical translation information) in the NAND memory 12 including a correspondence between the logical address in the NAND and the physical address in the NAND. It is managed by).

6 illustrates an example of logical NAND management information 42 in the form of a table. 7 shows an example of logical-physical conversion information 43 in a NAND in the form of a table. As shown in Fig. 6, the logical NAND management information 42 includes logical page management information 42a and logical block management information 42b. The logical page management information 42a has one entry for one logical area of one page size. Each of the entries has an LBA of data of one page size, a logical address in the NAND, and a page flag indicating whether this page is valid. The logical block management information 42b includes a physical address in the NAND set for one block size area of the NAND memory 12. As shown in Fig. 7, in the NAND logical-physical translation information 43, the physical address in the NAND and the logical address in the NAND of the NAND memory 12 are associated.

By using this kind of management information, it is possible to establish correspondence between the LBA used in the host device, the logical address in the NAND used in the NAND memory, and the physical address in the NAND used in the NAND memory 12. This makes it possible to exchange data between the host device and the memory system 10.

The management information managed by the DRAM management layer 31 is lost due to power off or the like, and thus this management information may be referred to as a volatile table. On the contrary, if management information managed by the logical NAND management layer 32 and the physical NAND management layer 33 is lost due to power off or the like, the lost management information prevents successful startup of the memory system 10 and thus powers off. In such cases, measures should be taken to ensure that management information is stored. Therefore, this management information can be referred to as a nonvolatile table.

This nonvolatile table manages data stored in the NAND memory 12. If the nonvolatile table does not exist, the information stored in the NAND memory 12 cannot be accessed or the data stored in the area is erased. Therefore, the nonvolatile table needs to be stored as the latest information in preparation for a sudden power off. Therefore, in the first embodiment, management information including at least a nonvolatile table is stored in the latest state in the management information storage area 126 of the NAND memory 12. Hereinafter, management information storage information stored in the management information storage area 126 of the NAND memory 12 will be described. In the following description, it is assumed that only the nonvolatile table is stored in the management information storage area 126.

8 is a schematic diagram of an example of the contents of management information storage information stored in the management information storage area 126. The following items are stored in the management information storage area 126. That is, management information storage information including the snapshot 210 as the contents of the nonvolatile table at a predetermined moment, update difference information of the contents of the nonvolatile table before the next snapshot is taken, and a pre-update log 220A obtained before the update. (Hereinafter referred to as prelog), post update log 220B (hereinafter referred to as postlog) which is log information having the same contents as the contents of the prelog 220A and stored after the update, and the location of the block 210 (block) ), A second pointer 230 pointing to the location (block) of the free log 220A obtained for the snapshot 210, the location (block) of the post log 220B obtained from the snapshot 210, and The root pointer 240 that indicates the location (block) in which the second pointer 230 is stored is stored. The snapshot 210 is information obtained by storing management information including at least a nonvolatile table at a predetermined moment among management information stored in the temporary storage area 111 of the DRAM 11.

The snapshot 210, the free log 220A, the post log 220B, the second pointer 230, and the root pointer 240 are stored in different blocks. The size of these blocks is the erase unit, equal to the size of the physical block. Snapshot 210 is stored in a snapshot storage block. The snapshot 210 includes logical NAND management information 42 and intra-NAND logical-physical conversion information 43 in the management information storage area 126 of the NAND memory 12 as a nonvolatile table. When a new snapshot 210 is stored, the snapshot 210 is stored in a different block than the previously stored block of snapshot 210.

The free log 220A and the post log 220B are used to change the contents of the snapshot 210 (or the snapshot 210 and previously generated logs) and the contents of the nonvolatile table corresponding to the data writing process or the like. Difference information between nonvolatile tables after the contents are changed. In particular, after taking the snapshot 210, the first prelog 220A and the first post log 220B are difference information between the nonvolatile table and the snapshot 210. The second or subsequent free log 220A after taking the snapshot 210 is the difference information between the pre-generated free log 220A and the snapshot 210 and the non-volatile table. The second or subsequent post log 220B after taking the snapshot 210 is the difference information between the pre-generated post log 220B and the snapshot 210 combination and non-volatile table.

The free log 220A is information generated before the management information is actually updated. Therefore, before the management information is actually updated by execution of data writing process or the like, the prelog 220A is generated based on an update schedule on how the management information is updated.

The post log 220B is information generated after the management information is actually updated. Therefore, the post log 220B is generated by using the actual management information after the management information is actually updated in accordance with execution of the data writing process or the like.

The pre log 220A and the post log 220B are stored in log storage blocks, respectively. The pre log 220A and the post log 220B are written to the same log storage blocks in a write-once manner even if the snapshot is changed.

9 shows an example of a log. Since the pre log 220A and the post log 220B have the same information, the pre log 220A will be described as an example of the log. The pre-log 220A includes target information which is management information of the change target, target entry which is the entry of the change target in the target information, target item which is the item of the change target in the target entry, and change contents that are the contents changed in the target item. Include. The free log 220A and the post log 220B are reformed according to the storage of the new snapshot 210 since they are update difference information for the snapshot 210.

The second pointer 230 is stored in the second pointer storage block. The second pointer 230 may be a pointer indicating a top address of a block indicating storage positions of the snapshot 210, the prelog 220A, and the post log 220B. The second pointer 230 is updated when the snapshot 210 is newly stored or when the snapshot storage block or log storage block is changed. The pointers of the free log 220A and the post log 220B may be stored in the snapshot 210 instead of the second pointer storage block.

The second pointer 230 includes snapshot access information for accessing the snapshot storage block, log access information for accessing the log storage blocks for the free log 220A and the post log 220B, and the next second. Contains the next pointer to the page location where the pointer is stored. The second pointer 230 is changed into information of the list system linked by this next pointer. The latest second pointer 230 can be reached by tracking the next pointer from the top page of the second pointer storage block designated by root pointer 240. Instead of a linked list system, the second pointer 230 may be stored in a write-once fashion in order from the top page of the second pointer storage area.

The root pointer 240 is stored in the first root pointer storage block. The root pointer 240 is information for accessing the second pointer storage block in which the second pointer 230 is stored, and is information that is first read in a process for recovering management information when the memory system 10 is activated. . The root pointer 240 changes when the second pointer storage block changes. The root pointer 240 is stored in the root pointer storage block in a write-once manner in order from the top page of the block. In this case, the page immediately preceding the unwritten page in the root pointer storage block has the latest information. Therefore, the latest root pointer can be retrieved by searching the top page of an unwritten page. As in the case of the second pointer 230, a linked list may be used.

The root pointer 240 is stored in the fixed area 1261 of the NAND memory 12. The snapshot 210, the free log 220A, the post log 220B, and the second pointer 230 are stored in the variable area 1262 of the NAND memory 12. The fixed area 1261 is a protection area in which the relationship between the logical block managed by the logical NAND management layer 32 and the physical block managed by the physical NAND management layer 33 is fixed in the NAND memory 12, It is an area in which information is stored at a low update frequency, which is required for executing the memory system 10 and hardly causes rewriting and writing to occur.

The variable region 1262 has a NAND memory 12 in which a relationship between a logical block managed by the logical NAND management layer 32 and a physical block managed by the physical NAND management layer 33 excludes the fixed region 1261. ) Is a variable area, and is a target of wear equalization.

The functions of the drive control unit 14 will be described below. 10 is a block diagram of an example of a functional configuration of the drive control unit 14. The drive control unit 14 includes the data management unit 141, the ATA command processing unit 142, the security management unit 143, the boot loader 144, the initialization management unit 145, and the debug support unit 146. Include. The data management unit 141 performs data transfer between the DRAM 11 and the NAND memory 12, and control of various functions related to the NAND memory 12. The ATA command processing unit 142 cooperates with the data management unit 141 to perform data transfer processing based on the command received from the ATA interface. The security management unit 143 cooperates with the data management unit 141 and the ATA command processing unit 142 to manage various kinds of security information. The boot loader 144 loads various management programs (firmware) from the NAND memory 12 into a memory (eg, SRAM), not shown, during power-on. The initialization management unit 145 performs initialization of the controllers and circuits of the drive control unit 14. The debug support circuit 146 processes debug data supplied from the outside through the RS232C interface.

11 is a block diagram of an example of a functional configuration of the data management unit 141. The data management unit 141 includes a data transfer processing unit 151, a management information management unit 152, and a management information recovery unit 155. The data transfer processing unit 151 performs data transfer between the DRAM 11 and the NAND memory 12. The management information management unit 152 performs the change and storage of the management information in accordance with the change of the data stored in the DRAM 11 and the NAND memory 12. The management information recovery unit 155 restores the latest management information based on the management information stored during power-on or the like.

The management information management unit 152 includes a management information writing unit 153 and a management information storage unit 154. The management information writing unit 153 is stored in the DRAM 11 when the management information is required to be updated in accordance with the change processing on the data stored in the DRAM 11 or the NAND memory 12 by the data transfer processing unit 151. Update management information.

When the memory system 10 satisfies a predetermined condition, the management information storage unit 154 may update the management information as a snapshot in the management information storage area 126 of the NAND memory 12 in the management information. The information updated as the pre-log 220A and the information updated in the management information are stored as the post log 220B. When the writing position of the second pointer 230 changes in accordance with the storage of the snapshot 210, the free log 220A, or the post log 220B, the management information storage unit 154 performs an update process on the second pointer ( 230).

The snapshot 210 is stored by the management information storage unit 154 when a predetermined condition regarding the memory system 10 is met. The snapshot 210 has a log storage area provided for storing logs 220 (pre-log 220A and post log 220B) in the management information storage area 126 of the NAND memory 12, for example. If it is full (that is, this area is completely filled with data), it is stored.

The log 220 (pre-log 220A and post log 220B) is stored on the NAND memory 12 including the update of management information (non-volatile table) stored in the DRAM 11 (NAND memory 12). Is required by the management information storage unit 154 while the data is updated.

The timing at which the management information storage unit 154 stores the pre log 220A and the post log 220B is such that updating of the management information (nonvolatile table) stored in the DRAM 11 is performed by the management information writing unit 153. It is time to be. In particular, the prelog 220A and the post log 220B are stored before and after the process of performing data writing or the like.

When the power supply of the memory system 10 is turned on, the management information recovery unit 155 performs a recovery process of the management information based on the management information storage information stored in the management information storage area 126 of the NAND memory 12. In particular, the management information recovery unit 155 sequentially processes the root pointer 240 of the fixed area 1261 and the snapshot 210, the free log 220A, and the post log 220B of the variable area 1262. It tracks and determines whether there is a pre log 220A and a post log 220B corresponding to the latest snapshot 210. If the free log 220A and the post log 220B do not exist, the management information recovery unit 155 restores the snapshot 210 of the snapshot storage block in the DRAM 11 as management information. If there is a prelog 220A and a post log 220B, this means that an abnormal termination such as a program error or a short break (abnormal disconnection of the power supply) has occurred, and the management information recovery unit 155 takes a snapshot. Take a snapshot 210 from a storage block, obtain a prelog 220A and a post log 220B from a log storage block, and take a snapshot of the prelog 220A and post log 220B on the DRAM 11. Reflected in 210, the management information (nonvolatile table) is recovered.

Hereinafter, the storage processing of the management information of the memory system 10 by the management information management unit 152 will be described. 12 is a flowchart of an example of a storage processing procedure for management information of the memory system 10. 13 is a diagram for explaining storage processing for the prelog and postlog. The memory system 10 is connected to the host device and operates as a secondary storage device of the host device, the host device (memory system 10) is in a startup state, and the snapshot 210 is a memory system 10 before this startup state. Assume that it is stored before the stop.

First, the host device (memory system 10) is in the activated state based on the snapshot 210 stored at the end of the host device (memory system 10) (step S11). Thereafter, reading or writing of data from the host device to the NAND memory 12 is performed as necessary. The management information management unit 152 determines whether a predetermined snapshot storage condition (for example, a condition that the log storage area is full (condition that the log storage area is filled with log data)) is satisfied (step S12). If the snapshot storage condition is not satisfied (NO in step S12), the management information management unit 152 determines whether or not an instruction about updating management information (command to write data in the NAND memory) is received (step S13). ). If no instruction regarding the update of the management information is received (NO in step S13), the management information management unit 152 returns to step S12.

When an instruction about updating management information is received (YES in step S13), the management information management unit 152 determines an update schedule indicating how the management information is updated by performing the command (step S14). The management information management unit 152 stores the update schedule as the pre-log 220A in the log storage block of the management information storage area 126 of the NAND memory 12 (step S15). If the free log 220A is not stored in the log storage block, the update schedule (log) is the difference information between the non-volatile table when the management information is updated and the snapshot 210 stored in the snapshot storage block. If the log 220 (hereinafter referred to as the past free log 220A) is already stored in the log storage block, the update schedule (log) is stored in the nonvolatile table and snapshot 210 when the management information is updated. Difference information between combinations of past prelogs 220A. In particular, as shown in Fig. 13, before the data write (X), which is the write process for the X-th data, is performed, the prelog X corresponding to the data write (X) is pre-logged in the NAND memory 12. Stored as 220A. At this time, for example, the information y1 is stored as the free log 220A. The prelog 220A is stored in the management information storage area 126 of the NAND memory 12 after the prelog 220A (update schedule) is recorded in the DRAM 11, for example.

Subsequently, the logical NAND management layer 32 executes the instruction (for example, a process for writing (X) user data into the data storage area 125 of the NAND memory 12) received in step S13 ( Step S16).

Thereafter, the management information stored in the DRAM 11 is updated in accordance with the executed process. The management information storage unit 154 stores the information updated in the management information in the management information storage area 126 of the NAND memory 12 as the post log 220B. If the post log 220B is not stored in the log storage block, the post log 220B is the difference information between the snapshot 210 stored in the current nonvolatile table and the snapshot storage block. If post log 220B (hereinafter, referred to as past post log 220B) is already stored in the log storage block, post log 220B is used to determine the current nonvolatile table and snapshot 210 and the past post log. Difference information between combinations.

The post log 220B (X) corresponding to the data write X is stored in the NAND memory 12 as the post log 220B. At this time, for example, the information y1 is stored as the post log 220B. The information y1 stored as the post log 220B is the same as the information y1 stored as the free log 220A (step S17). Thereafter, the management information management unit 152 returns to step S12.

If the snapshot storage condition is not satisfied (NO in step S12) and an instruction regarding updating of management information is received (YES in step S13), the processing of steps S14 to S17 is performed. In other words, the write process for the (X + 1) -th data is performed in the same manner as the write process for the X-th data. Before the data write (X + 1) is performed as write processing for the (X + 1) -th data, the prelog (X + 1) corresponding to the data write (X + 1) is prelogged in the NAND memory 12. Stored as 220A. At this time, for example, the information y2 is stored as the free log 220A. Data writing (X + 1) is performed in the data storage area 125 of the NAND memory 12. FIG. The post log X + 1 corresponding to the data write (X + 1) is stored in the NAND memory 12 as the post log 220B. At this time, for example, the information y2 is stored as the post log 220B. The information y2 stored as the post log 220B is the same as the information y2 stored as the free log 220A.

If the snapshot storage condition is satisfied in step S12 (YES in step S12), the management information management unit 152 includes management information including at least a nonvolatile table in the temporary storage area 111 of the DRAM 11. Is stored as a snapshot 210 in the management information storage area 126 of the NAND memory 12 (step S18). The management information management unit 152 determines whether or not the end of the memory system 10 has been instructed (step S19). If it is not instructed to end the memory system 10, the management information management unit 152 returns to step S12. When instructed to terminate the memory system 10, the process ends.

Hereinafter, the recovery process of the management information of the memory system 10 performed by the management information recovery unit 155 will be described. 14 is a flowchart of an example of a recovery processing procedure of management information of the memory system 10. As described above, the memory system 10 is connected to the host device and operates as a second storage device of the host device.

First, the power supply of the host apparatus is turned on, for example, because of recovery from a step, and a start command is issued to the memory system 10 (step S31). The management information recovery unit 155 sequentially reads the root pointer 240 and the second pointer 230 in the management information storage area 126 of the NAND memory 12 (step S32), and the snapshot 210. And the addresses of the blocks in which the prelog 220A and the post log 220B are stored (step S33), and a snapshot 210 is obtained (step S34).

Thereafter, the management information recovery unit 155 refers to the prelog 220A and the post log 220B of the NAND memory 12 to determine whether or not stepping has occurred (step S35). For example, if the pre log 220A and the post log 220B exist in the NAND memory 12, the management information recovery unit 155 determines that stepping has occurred. Determination of whether the step is generated may be performed by comparing the pre-log 220A and the post log 220B, for example. In the first embodiment, the pre log 220A and the post log 220B store the same information. Thus, for example, if the number of pages stored as the free log 220A and the number of pages stored as the post log 220B do not coincide with each other, this means that stepping has occurred. The abrupt occurrence may be determined based on the presence or absence of an ECC error, the data of the page stored as the free log 220A, and the data of the page stored as the post log 220B.

If stepping has occurred (YES in step S35), the management information recovery unit 155 checks the timing at which stepping has occurred, based on the latest free log 220A and the latest post log 220B of the NAND memory 12. (Step S36).

The management information recovery unit 155 also checks the timing at which the step is generated, based on the latest prelog 220A and the latest post log 220B of the NAND memory 12 (step S36). The management information recovery unit 155 determines whether or not the timing at which the step is generated is during the storage of the post log 220B (step S37). For example, if the last page of post log 220B is being written, this last page cannot be read. Thus, it is determined that patience occurred during the storage of postlog 220B. In addition, since stepping occurred during the storage of the post log 220B, the stepping may cause the data of the lower page in the post log 220B to be destroyed. If the last page of the free log 220A is being written, this last page cannot be read. Thus, it is determined that patience occurred during the storage of prelog 220A. In addition, since the step is generated during the storage of the free log 220A, the data of the lower page may be destroyed in the free log 220A due to the step. If the log is written to the last page of the free log 220A and the log is not written to the past page of the post log 220B, it is determined that stepping occurred during the writing of the data.

If the management information recovery unit 155 determines that the timing at which the step is generated is during the storage of the post log 220B (YES in step S37), the management information recovery unit 155 selects the latest free log 220A (step S38). On the other hand, if the management information recovery unit 155 determines that the timing at which the step is generated is not during the storage of the post log 220B (NO in step S37), the management information recovery unit 155 is completed for storage. The latest post log 220B is selected (step S39). In other words, if the last page of the free log 220A is being written or if the log is written to the last page of the free log 220A and the log is not written to the last page of the post log 220B, then the latest post log 220B is Is selected.

Thereafter, the management information recovery unit 155 obtains the selected log (pre-log 220A or post log 220B) from the log storage block, and expands the log in the work area 112 of the DRAM 11. (Step S40). The management information recovery unit 155 restores the management information (non-volatile table) by applying the logs to the snapshot 210 in order from the oldest log (step S41). Subsequently, the management information recovery unit 155 applies the recovery processing to the write-once block (log storage block) of the NAND memory 12 (step S42). The effect of the suspended process is eliminated by determining the presence or absence of destruction of the write-once block of the NAND memory 12 and performing the repair process. The presence or absence of the destruction is determined by comparing the contents of the management information and the write-once state with the write-once block. At the end of the recovery and recovery process of the management information, the management information recovery unit 155 takes the snapshot 210 again and stores it in the management information storage area 126 (step S43). The management information recovery unit 155 changes past snapshots and logs (opening or discarding the snapshots and logs) to empty the blocks, and the recovery processing of the management information is completed. A free block is a block in which the application has not yet been allocated. When an application is assigned to an empty block, the empty block is used after erasing.

On the other hand, if no step has occurred (NO in step S35), the management information recovery unit 155 restores the management information to the temporary storage area 111 of the DRAM 11 (step S44), and the management information recovery process is performed. It ends.

The management information recovery unit 155 can select one of the free log 220A and the post log 220B, regardless of the presence or absence of the logs destroyed by the step, and of the pages stored as the free log 220A. The management information can be recovered based on the number and the number of pages stored as the post log 220B. For example, if the number of pages stored as the free log 220A and the number of pages stored as the post log 220B are the same, the management information recovery unit 155 selects the free log 220A and restores the management information. If the number of pages stored as the free log 220A is greater than the number of pages stored as the post log 220B, the management information recovery unit 155 selects the post log 220B and restores the management information.

15A-15D are diagrams of examples of the relationship between the data of a memory cell and the threshold voltage of the memory cell and the writing order in the NAND memory. First, data of a memory cell is set to zero when an erase operation is performed. Subsequently, as shown in Fig. 15A, when writing to the lower page, the data of the memory cell is changed to data " 0 " and data " 2 ". As shown in Fig. 15B, before writing to the upper page, data below the threshold voltage of the actual data is written to the adjacent cell. The distribution of the threshold voltage of data "2" is then expanded by the data written in the cell. Subsequently, when the data of the upper page is written, the data of the memory cell is changed to data "0" to "3" having initial threshold voltages as shown in Fig. 15C. In the first embodiment, the data of the memory cell is defined from the low threshold voltage to the high threshold voltage.

The write process of the NAND memory 12 will be described. As shown in Fig. 15D, a write operation is performed for each of the pages from the memory cells close to the source line of the block. In FIG. 15D, four word lines are shown for convenience of explanation.

In the first write (indicated by the original numeral 1), one bit of data is written into the lower page of the memory cell 1. In the second write (indicated by the original numeral 2), one-bit data is written in the lower page of the memory cell 2 adjacent to the memory cell 1 in the word direction. In the third write (indicated by the original numeral 3), one-bit data is written in the lower page of the memory cell 3 adjacent to the memory cell 1 in the bit direction. In the fourth write (indicated by the original numeral 4), one-bit data is written to the lower page of the memory cell 4 diagonally adjacent to the memory cell 1.

In the fifth write (indicated by the original numeral 5), one bit of data is written into the upper page of the memory cell 1. In the sixth write (indicated by the original numeral 6), one-bit data is written in the upper page of the memory cell 2 adjacent to the memory cell 1 in the word direction. In the seventh write (indicated by the original numeral 7), one-bit data is written in the lower page of the memory cell 5 adjacent to the memory cell 3 in the bit direction. In the eighth write (indicated by the original numeral 8), one-bit data is written in the lower page of the memory cell 6 diagonally adjacent to the memory cell 3.

In the ninth writing (indicated by the original numeral 9), one bit of data is written into the upper page of the memory cell 3. In the tenth writing (indicated by the original numeral 10), one-bit data is written in the upper page of the memory cell 4 adjacent to the memory cell 3 in the word direction. In the eleventh writing (indicated by the original numeral 11), one bit of data is written in the lower page of the memory cell 7 adjacent to the memory cell 5 in the bit direction. In the twelfth writing (indicated by the original numeral 12), one-bit data is written to the lower page of the memory cell 8 diagonally adjacent to the memory cell 5.

In the thirteenth writing (indicated by the original numeral 13), one bit of data is written into the upper page of the memory cell 5. In the fourteenth write (indicated by the original numeral 14), one-bit data is written in the upper page of the memory cell 6 adjacent to the memory cell 5 in the word direction. In the fifteenth writing (indicated by the original numeral 15), one-bit data is written to the upper page of the memory cell 7 in the word direction. In the sixteenth writing (indicated by the original numeral 16), one bit of data is written in the upper page of the memory cell 8 adjacent to the memory cell 7 in the word direction.

A specific example of how to select a log used for recovery of management information will be described. 16A to 17G are diagrams for explaining a method of selecting a log used for recovery of management information. In Figures 16A-17G, the prelog and postlog are stored for each of the pages of a block for prelog (left block in each view) and a block for postlog (right block in each view). One page in one physical block in FIGS. 16A-17G corresponds to FIGS. 15A-15D. In other words, the pages 1 to 4, 7, 8, 11, and 12 are lower pages shown in Figs. 15A to 15D. The pages 5, 6, 9, 10, 13 to 16 are the upper pages shown in Figs. 15A to 15D. In the block for the free log and the block for the post log, each of the rows of these blocks corresponds to one page. 16A to 17G, pages are divided into lower pages and upper pages for convenience of description. One physical block is formed by a combination of lower pages and upper pages.

In Figs. 16A to 17G, normally stored logs are indicated by log x1, logs destroyed due to stepping are denoted by log y1, and logs currently being written are indicated by log z1. Since stepping occurred during the writing of log z1 and log y1 was destroyed, the memory cell corresponding to the page of log z1 and the memory cell corresponding to the page of log y1 are the same. The page of log y1 is the page of the lower side (lower page), and the page of log z1 is the page of the upper side (upper page). Of the logs (pages) of each of the blocks, the circled logs are the logs selected as the logs used for recovery of management information.

16A is a diagram of pre-log and post-log at normal time (when power supply is turned off without abnormal disconnection of power source). 16B to 16D and 17E to 17G are diagrams of prelog and postlog in the case where stepping occurs.

16A shows the prelog and postlog stored in NAND memory 12 when power to memory system 10 is turned off without storing snapshot 210. In the case of Fig. 16A, since data is written only to the lower pages (pages 1 to 4), even if the step occurs during the writing of the lower page, no data destruction of the lower page occurs. As shown in Fig. 16A, in the first embodiment, the prelog and postlog are stored in the same page of different blocks. Therefore, when the power is turned off at the normal time, the last page of the prelog and the last page of the postlog are at the same page position. Therefore, in this case, management information is recovered by using the free log. At the normal time shown in Fig. 16A, the management information may be recovered using the post log instead of the free log.

In Fig. 16B, stepping occurs while log writing 1 is performed as a free log. As shown in Fig. 16B, if stepping occurs during the writing of the upper page (page 6) of the free log, the data of the lower page is destroyed in the lower page (page 2 of the free log) corresponding to the upper page being written. . In other words, in the case of Fig. 16B, since stepping occurs during storage of the prelog, log y1 is generated in the block on the prelog side. In this case, the log z1 (the log currently stored) corresponding to the log write 1 is stored in the block on the free log side. On the other hand, the post log corresponding to the log write 1 is not stored in the block on the post log side. Thus, the last page of the prelog and the last page of the postlog contain different information. In this case, management information is recovered by using a post log.

In Fig. 16C, stepping occurs while log writing 1 is performed as a post log. As shown in Fig. 16C, when stepping occurs during writing of the upper page (page 6) of the post log, the data of the lower page is destroyed in the lower page (page 2 of the post log) corresponding to the upper page being written. . In other words, in the case of Fig. 16C, since stepping occurs during storage of the post log, log y1 is generated in the block on the post log side. In this case, the log z1 corresponding to the log write 1 is stored in the block on the post log side. The prelog corresponding to the log write 1 is already stored in the block on the prelog side. Therefore, the last page of the prelog and the last page of the postlog are the same. In this case, the management information is recovered by using the free log.

In Fig. 16D, after log writing 1 is performed as a free log, an error occurs during data writing corresponding to the free log. Stepping occurs while log writing 2 is performed as a free log corresponding to the rewriting process of data writing. As shown in Fig. 16D, when stepping occurs during the writing of the upper page (page 6) of the free log, the data of the lower page is destroyed in the lower page (page 2 of the free log) corresponding to the upper page being written. . In other words, in the case of Fig. 16D, since stepping occurs during the storage of the prelog, log y1 is generated in the block on the prelog side. In this case, the log x1 corresponding to the log write 1 and the log z1 corresponding to the log write 2 are stored in a block on the free log side. On the other hand, the post log corresponding to the log write 1 and the post log corresponding to the log write 2 are not stored in the block on the post log side. Therefore, the last page of the free log and the last page of the post log are different. In this case, management information is recovered by using a post log.

In Fig. 17E, after log writing 1 is performed as a free log, an error occurs during data writing corresponding to the free log, and log writing 2 is performed as a free log corresponding to the rewriting process of data writing. . In addition, in Fig. 17E, after the log write 2 is performed as the post log corresponding to the rewrite process of the data write, a step is generated while the log write 1 is performed as the post log corresponding to the first data write. do. As shown in Fig. 17E, if stepping occurs during writing of the upper page (page 6) of the post log, the data of the lower page is destroyed in the lower page (page 2 of the post log) corresponding to the upper page being written. . In other words, in the case of Fig. 17E, since stepping occurs during the storage of the post log, log y1 is generated in the block on the post log side. In this case, the log x1 corresponding to the log write 1 and the x1 corresponding to the log write 2 are stored in the block on the free log side. On the other hand, the log x1 corresponding to the log write 2 and the log z1 corresponding to the log write 1 are stored in a block on the post log side. Therefore, the last page of the prelog and the last page of the postlog are the same. Management information is recovered by using the free log.

In Fig. 17F, stepping occurs while log writing 1 is performed as a free log over two pages. As shown in Fig. 17F, when stepping occurs during the writing of the upper pages (pages 5 and 6) of the free log, the lower pages (pages 1 and 2 of the post log) corresponding to the upper pages being written are displayed. The data is destroyed. In other words, in the case of Fig. 17F, since stepping occurs during storage of the prelog, log y1 (e.g., page 2) is generated in the block on the prelog side. In this case, log x1 (page in the previous step) and log z1 (page in the next step) corresponding to the log write 1 are stored in the block on the free log side. On the other hand, the post log corresponding to the log write 1 is not stored in the block on the post log side. Therefore, the last page of the free log and the last page of the post log are different. Management information is recovered by using a post log.

In Fig. 17G, stepping occurs while log writing 1 is performed as a post log over two pages. As shown in Fig. 17G, if stepping occurs during writing of the upper pages (pages 6 and 7) of the post log, the lower pages corresponding to the upper pages being written (pages 1 and 2 of the post log) are lower pages. Data is destroyed. In other words, in the case of Fig. 17G, since stepping occurs during the storage of the post log, log y1 (e.g., page 2) is generated in the block on the post log side. In this case, the log x1 and log z1 corresponding to the log write 1 are stored in a block on the post log side. The post log corresponding to the log write 1 is already stored over two pages in the block on the free log side. Thus, the last page of the prelog and the last page of the postlog are the same. Management information is recovered by using the free log.

In the first embodiment, if the memory system 10 is reset after abnormal separation of power supply or the like, the management information recovery unit 155 takes the snapshot again, and the snapshot at the stage where the recovery and recovery processing of the management information is completed. Save it. As a result, since the log of the past is open, the log that is destroyed by the influence of stepping or the like is not maintained. The reliability of the memory system 10 may be improved.

2nd Example

18 is a schematic diagram of an example of the contents of management information storage information stored in the management information storage area 126. The management information storage information stored in the management information storage area 126 is the snapshot 210 which is the contents of the nonvolatile table at a predetermined moment, and the update difference information of the contents of the nonvolatile table until the next time the snapshot is taken. Log 220, the location of the first log 220 obtained with respect to this snapshot 210, a second pointer 230 pointing to the snapshot 210, and a location (block) where the root pointer 240 is stored. A root pointer 240 pointing. The snapshot 210 is information obtained by storing management information including at least a nonvolatile table at a predetermined moment among types of management information stored in the temporary storage area 111 of the DRAM 11.

The snapshot 210, the log 220, the second pointer 230, and the root pointer 240 are stored in different blocks, respectively. The size of these blocks is equal to the size of the physical block that is the erase unit. Snapshot 210 is stored in a snapshot storage block. Snapshot 210 includes logical NAND management information 42 and intra-NAND logical physical conversion information 43 as a non-volatile table of management information storage area 126 of NAND memory 12. When a new snapshot 210 is stored, the snapshot 210 is stored in a different block than the previously stored block of snapshot 210.

The log 220 is stored in a log storage block. If the contents of the non-volatile table are changed, the log 220 shows the difference information between the non-volatile table and the snapshot 210 after the contents are changed (when the log is first generated after the acquisition of the snapshot 210), Or difference information between the nonvolatile table and the snapshot 210 after the contents are changed. The log 220 is written in page units in a write-once manner to the log storage unit whenever the log 220 is obtained as difference information. 9 illustrates an example of a log 220. The log 220 may include target information, which is management information of a change target, target entry, which is an entry for a change target in the target information, target item, which is an item for a change target in the target entry, and changes that are changed in the target item. Include. Since the log 220 is update difference information for the snapshot 210, it is reconstructed according to the storage of the new snapshot 210. In the second embodiment, the pre log and the post log are described as logs without distinction. This also applies to the case where prelog and postlog are obtained as in the first embodiment.

The second pointer 230 is stored in the second pointer storage block. The second pointer 230 may be a pointer indicating top addresses of blocks indicating storage positions of the snapshot 210 and the log 220. The second pointer 230 is updated when the snapshot 210 is newly stored or when the snapshot storage block and the log storage block are changed.

The second pointer 230 includes snapshot access information for accessing the snapshot storage block, log access information for accessing the log storage block, and a next pointer indicating a page location where the next second pointer is stored. The second pointer 230 is changed by the next pointer into information in the linked list system. The latest second pointer can be reached by tracking the next pointer from the top page of the second pointer storage block designated by root pointer 240. Instead of a linked list system, the second pointer 230 may be stored in a write-once fashion in order from the top page of the second pointer storage area. A pointer to the top address of log 220 may be stored in snapshot 210. The second pointer 230 may include only a pointer indicating the top address of the snapshot 210.

The root pointer 240 is stored in a root pointer storage block. The root pointer 240 is information for accessing the second pointer storage block in which the second pointer 230 is stored as the first pointer. The root pointer 240 is first used for processing for recovering management information when the memory system 10 is activated. Information to be read. The first root pointer 240 is changed when the second pointer storage block is changed. The root pointer 240 is stored in the root pointer storage block in a write-once manner, for example, in order from the top page of the root pointer storage block. In this case, the page immediately preceding the unwritten page of the root pointer storage block has the latest information. Therefore, the latest first root pointer 240 can be searched by searching the top page of the unwritten page. As in the case of the second pointer 230, a linked list may be used.

The root pointer 240 is stored in the fixed area 1261 of the NAND memory 12. The snapshot 210, the log 220, and the second pointer 230 are stored in the variable region 1262 of the NAND memory 12. The fixed area 1261 is a protection area in which the relationship between the logical block managed by the logical NAND management layer 32 and the physical block managed by the physical NAND management layer 33 is fixed in the NAND memory 12, This is an area where information necessary for executing the memory system 10 having a low update frequency in which rewriting and writing hardly occurs is stored.

On the other hand, in the variable area 1262, the relationship between the logical block managed by the logical NAND management layer 32 and the physical block managed by the physical NAND management layer 33 differs from the NAND memory except for the fixed area 1261. It is a variable area in the area of (12). The variable region 1262 is a target region of wear equalization.

The functions of the drive control unit 14, the functional configuration of the data management unit 141, and the like are the same as those in the first embodiment (see FIGS. 10 and 11). The management information management unit 152 includes a management information writing unit 153 and a management information storage unit 154. The management information writing unit 153 is stored in the DRAM 11 when it is necessary to update management information in accordance with a change process for data stored in the DRAM 11 or the NAND memory 12 by the data transfer processing unit 151. Update management information.

When the memory system 10 satisfies a predetermined condition, the management information storage unit 154 stores the management information as the snapshot 210 and the management information in the management information storage area 126 of the NAND memory 12. Stores the information to be updated as a log 220. The management information storage unit 154 also performs a pointer update process required in accordance with the storage of the snapshot 210 or the log 220.

The storage of the snapshot 210 is performed by the management information storage unit 154 when, for example, any of the following snapshot storage conditions is met as described below.

(1) Standby (command to minimize power consumption of the main body of the memory system 10), sleep (command to stop the device when there is no access for a predetermined time), or reset (restart the memory system 10) Command)

(2) The log storage area provided for storing the log 220 in the management information storage area 126 of the NAND memory 12 is filled with data.

The timing at which the management information storage unit 154 stores the log 220 is that updating of management information (non-volatile table) stored in the DRAM 11 (when data writing is necessary in the NAND memory 12) writes management information. When it is performed by unit 153.

When the power of the memory system 10 is turned on, the management information recovery unit 155 performs a recovery process for the management information based on the management information storage information stored in the management information storage area 126 of the NAND memory 12. . In particular, the management information recovery unit 155 tracks the root pointer 240, the second pointer 230, the snapshot 210, and the log 220 in order, and logs corresponding to the latest snapshot 210 ( 220) is determined to exist. If the log 220 does not exist, the management information recovery unit 155 restores the snapshot 210 of the snapshot storage block as management information to the DRAM 11. If the log 220 exists, the management information recovery unit 155 acquires the snapshot 210 from the snapshot storage block, obtains the log 220 from the log storage block, and stores the log 220 in the DRAM ( 11) The management information (non-volatile table) is restored to reflect the snapshot 210 on the screen. At this time, since there is a possibility that the memory system 10 may be abnormally terminated without being normally terminated due to stepping or the like, the management information recovery unit 155 appropriately recovers the management information including the termination decision of the memory system 10. To perform.

As described in (1) of the snapshot storage conditions, the memory system 10 uses the management information storage unit 154 to snap when the memory system 10 receives the standby signal, the sleep signal, or the reset signal. It can be set to save the shot 210. In other words, the memory system 10, when the memory system 10 transitions to a designated state (standby state, sleep state, or reset state) after receiving the standby signal, the sleep signal, or the reset signal, the snapshot ( 210 may be set to take again. When the memory system 10 is set up in this manner, management information can be recovered based only on the snapshot 210 during restart and there is no need to refer to the log 220. Therefore, the startup time can be reduced.

On the other hand, if the snapshot 210 is taken again every time the standby signal, the sleep signal, or the reset signal is received, for example, if the standby signal is received immediately after the snapshot 210 is stored at a predetermined moment, A situation where the log length (size) of the stored log 220 during the signal reception is very short occurs. In this case, the snapshot 210 is taken again, regardless of the fact that the stored snapshot 210 changes small before reception of the wait signal or the like. Thus, writing of the snapshot 210 is performed regardless of the fact that the contents are slightly updated and the writing efficiency is lowered. Since the snapshot 210 is the contents of the nonvolatile table, the size of the snapshot 210 is large. Thus, writing the snapshot 210 takes time and takes a long time to switch to the designated state. The size of the snapshot is 8MB, for example, while the size of the log obtained as the difference information is the page size (4KB).

In addition, if the snapshot 210 is always taken again every time a wait signal, sleep signal, or reset signal is received, the NAND memory 12 is further degraded due to the erasing of the block performed prior to writing. In this manner, in the memory system 10 employing the NAND memory 12, since the snapshot 210 is taken again every time a waiting signal or the like is received, the waiting time until switching to the designated state is long. In addition to the characteristics, there is a problem due to the characteristics of the NAND memory 12 that the durability life of the memory system 10 is reduced.

Thus, in the second embodiment, upon receiving the wait signal, the sleep signal, or the reset signal, the user may select to take the snapshot 210 again and switch to the designated state or to the designated state without taking the snapshot 210 again. can do. In particular, the management information storage unit 154 receives a wait signal or the like, for example, depending on whether the log 220 is stored in the management information storage area 126 and if the log 220 is stored, the log. Switching to any of the conversion types according to the log length (size) of 220.

FIG. 19A is a time diagram of switching to the standby state without taking the snapshot again, and FIG. 19B is a time diagram of switching to the standby state after taking the snapshot again when a wait signal is received. 19A and 19B, the wait signal is shown as an example. However, the same applies to the sleep signal and the reset signal.

In the situation shown in Fig. 19A, since condition (2) of the snapshot storage conditions is satisfied, the snapshot 210 is taken, and subsequently the logs 51-1 to 51-n; where n is one or more; Is an integer) is obtained sequentially in accordance with the update of the contents of the non-volatile table. The logs 51-1 to 51-n are sequentially written to the log storage block in a write-once manner on a page basis and stored as the log 220. 20 is a state diagram in which logs are stored in a log storage block in page units. In FIG. 20, of the components illustrated in FIG. 18, only the second pointer, the snapshot 210, and the log 220 are illustrated for convenience. The log 220 includes logs 51-1 through 51-n sequentially written in a write-once manner from a top page to n pages in a log storage block.

Further, following the storage of the log 51-n, a wait signal is generated, but the management information storage unit 154 is switched to the standby state (waiting occurrence) without taking a snapshot again. When the standby is released, the memory system 10 is started up from the standby state. The management information recovery unit 155 acquires the snapshot 210 from the snapshot storage block of the management information storage area 126, obtains the log 220 from the log storage block of the management information storage area 126, The log 220 is reflected in the snapshot 210 on the DRAM 11 to recover the management information (nonvolatile table).

In FIG. 19B, the generation of the store and wait signals of the snapshot 210 and the logs 51-1 to 51-n are the same as the case shown in FIG. 19A. However, the management information storage unit 154 takes the snapshot 55 again after generation of the wait signal. Once the snapshot 55 is stored, the second pointer is updated. The second pointer 230 points to the top address of the snapshot 55 and points to the top address of the log storage block for the newly secured snapshot 55. When the management information storage unit 154 takes the snapshot 55 again, the management information storage unit 154 is immediately switched to the standby state (waiting occurrence). Thus, the log is not stored in the log storage block for the snapshot 55. When the standby is released, the memory system 10 is started up from the standby state. The management information recovery unit 155 acquires the snapshot 55 from the snapshot storage block of the management information storage area 126, and manages the information (nonvolatile table) based on the snapshot 55 on the DRAM 11. To recover.

In the second embodiment, the management information storage unit 154 performs switching according to, for example, the log length (size) of the log 220 stored in the management information storage area 126. If the log length (size) is equal to or larger than a predetermined size, the management information storage unit 154 takes a snapshot again (Fig. 19B). If the log length (size) is smaller than the predetermined size, the management information storage unit 154 does not take a snapshot again (Fig. 19A). 19A, 19B, and 20, the log length (size) of log 220 is the sum of the sizes of logs 51-1 through 51-n and the size for n pages. Thus, the management information storage unit 154 can switch between taking the snapshot again and not taking the snapshot again by comparing n with the number of switching reference pages (nth).

The number (nth) of the switching reference pages may be determined, for example, according to a method described later. In Fig. 19A, since the snapshot is not taken again after generation of the standby signal, the transition time to the standby state is short. On the other hand, during the recovery of management information after queuing, it is necessary to read the logs 51-1 to 51-n in addition to the snapshot 210. If n is an integer, recovery takes longer. Conversely, if n is very small, recovering management information based on snapshot 55 and time for restoring management information based on snapshot 210 and logs 51-1 through 51-n. The difference between the times for is small. Therefore, selecting the case shown in Fig. 19A is beneficial when n is small.

In general, the startup time of the memory system 10 depends on the specification of the memory system. Therefore, if n is large and recovery takes time and the startup time exceeds the specification of the memory system, the case as shown in Fig. 19A cannot be selected. In other words, the number (nth) of the reference pages is a value in which the startup time in the case shown in Fig. 19A satisfies the specification of the memory system, where n is smaller than this value.

In Fig. 19B, the snapshot 55 is taken again after generation of the wait signal. Therefore, in addition to the fact that the transition time to the standby state is long because of the write time for the snapshot 55, if n is small, the write efficiency is lowered. Therefore, selecting the case shown in FIG. 19B can be said to be beneficial when n is larger. Therefore, in consideration of the case shown in Fig. 19A, it is preferable to select the case shown in Fig. 19B when n is equal to or larger than the number (nth) of the reference pages.

21 is a flowchart for explaining the operation of the management information storage unit 154 during standby, sleep, or reset.

The management information storage unit 154 determines the presence or absence of any of the wait signal, the sleep signal, or the reset signal (step S21). If none of the wait signal, the sleep signal, or the reset signal is input (NO in step S21), the management information storage unit 154 performs another processing (step S22) and returns to step S21. If it is determined in step S21 that any of the wait signal, the sleep signal, or the reset signal is input (YES in step S21), the management information storage unit 154 determines whether or not the log length is equal to or greater than a predetermined size (step S23). If it is determined that the log length is equal to or larger than a predetermined size (YES in step S23), the management information storage unit 154 takes a new snapshot (step S14) and ends the processing. If it is determined that the log length is smaller than the predetermined size (NO in step S23), the management information storage unit 154 ends the processing without taking a new snapshot. Thereafter, the memory system 10 is changed to a state corresponding to the standby signal, the sleep signal, or the reset signal.

According to the second embodiment, upon receiving the wait signal, the sleep signal, or the reset signal, the management information storage unit 154 determines whether the log length is equal to or larger than a predetermined size, takes a snapshot again, and returns to a designated state. Decide to switch to the specified state without switching or taking the snapshot again. Therefore, since it is unnecessary to retake the snapshot every time the standby signal, the sleep signal, or the reset signal is received, the number of times of writing of the NAND memory 12 is reduced and the durability of the NAND memory 12 is reduced. can do. There is also an effect that the recovery time of the management information by the management information recovery unit 155 can be reduced.

As described above, the data management unit in the DRAM 11 is a page size unit, the data writing and reading unit in the NAND memory 12 is a page size unit, and the erase unit and the management unit are block size units. However, this does not mean that data management units, data writing and reading units, erasing units, and management units are limited to units of this size. Arbitrary units can be used as a data management unit, a data writing and reading unit, an erasing unit, and a management unit.

The charge accumulation layer is not limited to a floating gate type and may be a charge trapping type including a silicon nitride film, such as including a MONOS (metal-oxide-nitride-oxide-semiconductor) structure and other systems.

As described above, according to the present invention, it is possible to eliminate the possibility that the log is destroyed after the reset from abnormal disconnection of the power supply, and there is an effect of improving the reliability of the management information.

According to the present invention, when a wait signal, a sleep signal, or a reset signal is received, it is possible to switch to the designated state without taking a snapshot again and then to the state before switching. Therefore, it is not necessary to take a snapshot every time a standby signal, a sleep signal, or a reset signal is received, it is possible to reduce the number of writes of a memory cell in which multi-value data can be stored, and suppress the reduction in the endurance life of the memory cell. It can work.

Additional advantages and modifications are easy to those skilled in the art. Accordingly, the invention is not limited to the specific details and representative embodiments shown and described herein in its broader aspects. Accordingly, various modifications can be made without departing from the spirit or scope of the invention as defined by the claims and the equivalents of the claims.

Claims (20)

As a memory system, A volatile first storage unit, A nonvolatile second storage unit including a memory cell capable of storing multi-value data; Performing data transfer between the host device and the second storage unit via the first storage unit, wherein the management information includes a storage location of data stored in the second storage unit during a startup operation of the memory system; A controller configured to perform data management of the first storage unit and the second storage unit based on the stored management information while storing in the storage unit and updating the stored management information; The controller, When a predetermined condition is satisfied, the management information stored in the first storage unit is stored as a snapshot in the second storage unit, and a log is updated in the second storage unit. A management information storage unit for storing as information, If the log exists in the second storage unit when starting the startup operation, the snapshot is taken again after restoring the management information in the first storage unit based on the snapshot and the log; And a management information recovery unit for storing in the two storage units. The method of claim 1, The log comprises a pre-log obtained before a change occurs in the management information and a post-log obtained after a change occurs in the management information. The method of claim 2, And the management information recovery unit takes the snapshot again and stores it in the second storage unit when the memory system is reset from abnormal isolation of power. The method of claim 2, The second storage unit, A snapshot storage area for storing the snapshot; A prelog storage area for storing the prelog; A post log storage area for storing the post log; And a pointer storage area for storing pointers indicating storage positions of the snapshot storage area, the prelog storage area, and the post log storage area. The method of claim 4, wherein Each of the snapshot storage area, the prelog storage area, the post log storage area, and the pointer storage area includes a block that is a data erasing unit. The method of claim 5, Each of the prelog and the postlog is a write-once method in pages in the prelog storage area and the postlog storage area whenever the prelog and the postlog are acquired as difference information. And each page unit is smaller than the size of the block. The method of claim 6, If abnormal separation of power occurs while writing a free log on a higher order page of the free log storage area, the management information recovery unit is configured to perform the management information based on a post log and a snapshot during the startup operation. To perform recovery of memory system. The method of claim 6, If abnormal separation of power occurs while writing a post log to an upper page of the post log storage area, the management information recovery unit performs recovery of the management information based on a free log and a snapshot during the startup operation. , Memory system. The method of claim 6, If an error occurs during the writing of the data corresponding to the prelog after writing the prelog to the upper page of the prelog storage area and abnormal separation of the power occurs during the writing of the prelog corresponding to the data rewriting process, And the management information recovery unit performs recovery of the management information based on a post log and a snapshot during the startup operation. The method of claim 6, An error occurs during data writing corresponding to the prelog after writing of the prelog to an upper page of the prelog storage area, and subsequently writing of the prelog corresponding to the data rewriting process is performed. The management information recovery unit if an abnormal separation of the power supply occurs during the writing of the post log corresponding to the first data writing after the writing of the post log corresponding to the data rewriting process is performed to the upper page of the post log storage area; Performs recovery of the management information based on a free log and a snapshot during the startup operation. The method of claim 6, If abnormal separation of power occurs while writing the prelog over two upper pages of the prelog storage area, the management information recovery unit restores the management information based on the post log and the snapshot during the startup operation. To do that, a memory system. The method of claim 6, If abnormal detachment of power occurs while writing a post log across two upper pages of the post log storage area, the management information recovery unit recovers the management information based on a prelog and a snapshot during the startup operation. To do that, a memory system. The method of claim 1, And the first storage unit is a DRAM and the second storage unit is a NAND flash memory. As a memory system, A volatile first storage unit, A nonvolatile second storage unit including a memory cell capable of storing multi-value data; Performing data transfer between the host device and the second storage unit via the first storage unit, and storing management information including a storage location of data stored in the second storage unit during a startup operation of the memory system. A controller configured to perform data management of the first storage unit and the second storage unit based on the stored management information while storing the stored management information in the first storage unit; The controller, When a predetermined condition is satisfied, the management information stored in the first storage unit is stored as a snapshot in the second storage unit, and a log is stored in the second storage unit as update difference information of the management information. A management information storage unit, Restore the management information in the first storage unit based on the snapshot and the log when the log exists in the second storage unit when starting the startup operation; A management information recovery unit for recovering the management information in the first storage unit based on the snapshot when not present in the second storage unit, The management information storage unit, upon receiving one of the wait signal, the sleep signal, and the reset signal, determines whether to take the snapshot again before switching to the designated state designated by the one signal. , Memory system. The method of claim 14, The management information storage unit, when the one signal is received, retakes the snapshot if the log length of the prelog corresponding to the snapshot stored in the second storage unit is greater than or equal to a predetermined size, and the log length. Does not take a snapshot if is less than the predetermined size. The method of claim 15, The predetermined size is such that, when the log length of the log is smaller than the predetermined size, a startup time for starting the memory system from a standby state, a sleep state, or a reset state exceeds a time set by the standard of the memory system. A memory system, determined by its size not to. The method of claim 14, The second storage unit, A snapshot storage area for storing the snapshot; A log storage unit for storing the log; And a pointer storage area for storing pointers pointing to the snapshot storage area and storage locations of the log storage unit. The method of claim 17, Each of the snapshot storage area, the log storage area, and the pointer storage area includes a block that is a data erasing unit. The method of claim 18, The log is written in a write-once manner in units of pages in the log storage area whenever the log is obtained as difference information, and the pages are smaller than the size of the block. The method of claim 14, And the first storage unit is a DRAM and the second storage unit is a NAND flash memory.

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