KR20090105229A - Parallel operation of interleaved switching converter circuit - Google Patents

Abstract

PURPOSE: A parallel connected switching converter using charge sharing is provided to operate all parallel connected converters with a DCM(Discontinuous Conduction Mode). CONSTITUTION: A parallel connected switching converter includes a first switching control part(140), a synchronization signal generating part, and a second switching control part(240). The first switching control part generates a first switching control signal for controlling turn-on/turn-off of a first converter(100). The synchronization signal generating part includes a first capacitor and a second capacitor. The synchronization signal generating part conducts the first capacitor and the second capacitor according to the first switching control signal of the first switching control part. The synchronization signal generating part controls a voltage of the first capacitor through charge sharing between the first capacitor and the second capacitor. The synchronization signal generating part generates a synchronization signal having a fixed phase difference synchronized with the first switching control signal through the voltage of the first capacitor. The second switching control part generates a second switching control signal according to the synchronization signal generated in the synchronization signal generating part. The second switching control part controls turn-on/turn-off of a second converter.

Description

Parallel Connection Switching Converter Using Charge Sharing {PARALLEL OPERATION OF INTERLEAVED SWITCHING CONVERTER CIRCUIT}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a switching converter, and in particular, by using a charge sharing method, continuous conduction is controlled by controlling the paralleled converters to operate in a discontinuous conduction mode (DCM) while maintaining a constant phase difference between the paralleled converters. The present invention relates to a parallel-connected switching converter suitable for solving a problem in which switching loss and switching noise increase due to a reverse recovery phenomenon when operating in a mode).

Converters are generally known as step-up converters, step-down converters or inverse converters. These converters can be classified as Buck converters, Boost converters, Buck-Boost converters, etc., and are used for boost converters and single-ended primary inductance converters (SEPICs). Topologies are generally known in pulsed power supplies.

When a converter with a large power is constructed using such a topology, it is difficult to easily find a suitable device due to an increase in the rating of the devices constituting the converter, and there is an increase in losses and design difficulties. Converters are often designed and used to connect large numbers of them in parallel to provide large power.

On the other hand, when driving the parallel-connected converter as described above, it is necessary to reduce the size of the input filter and the output filter by reducing the ripple of the input current and the output current, as a way to switch control signal of the converter connected in parallel Has been widely used to control the phase difference. However, if the switching frequency is fixed, it is not technically difficult to generate a control signal having a constant phase difference, but when the switching frequency is variable, the switching period is changed, so it is easy to generate a signal having a constant phase difference. Not.

In this regard, known techniques prior to the present invention include US Patent US 5,905,369. According to the pre-registered patent, the switch of boost2 is turned on at 180 degrees after the boost1 switch is turned on by using the charge / discharge circuit. Thus, when L1 and L2 are the same, both boost1 and boost2 operate in discontinuous conduction mode (DCM) while maintaining a 180 degree phase difference.

However, according to the above-described US patent, when the value of L2 is greater than the value of L1, the current of L2 may rise again before entering zero (0), and enter into continuous conduction mode (CCM), in which case D2 There is a problem that the loss of the switch increases and the noise increases due to reverse recovery.

Accordingly, it can be said that a circuit for controlling the switch to be turned on after the L2 current becomes zero while synchronizing with Boost1 is required. Accordingly, the present invention provides a charge / discharge circuit as compared to the synchronization signal generator of US 5,905,369. In addition, it is possible to simplify the circuit implementation by reducing the number and to provide a method of maintaining the phase difference while maintaining DCM even when L1 and L2 values are different.

Hereinafter, the configuration and operation of the above-described US Pat. No. 5,905,369 will be described in more detail to help understand the problems shown in US Pat. No. 5,905,369 and the present invention described below.

Figure 1 is a block diagram of a conventional interleaved switching converter, showing the configuration of US 5,905,369. As shown in FIG. 1, the above-described US 5,905,369 invention corresponds to an interleaved switching converter having a variable switching frequency. The first driving signal having a predetermined duty ratio with the first switching means SW1 and 12 is provided. A first switching converter (10) having an output and a first control driver (14) for driving said first switching means (SW1, 12); Outputting a second driving signal having a predetermined on-period and second switching means (SW2, 22) connected in parallel with the first switching converter (10), and driving the second switching means (SW2, 22). A second switching converter 20 having a second control driver 24; First and second capacitors (not shown); The second capacitor is discharged when the first capacitor is charged and discharged while the first capacitor is charged and discharged by the activation of the first driving signal, and the second capacitor is charged when the first capacitor is discharged. It is composed of a charge and discharge circuit (not shown in the drawing), the output of the second drive signal of the second control driver 24 compares the voltages of the first and second capacitors to the inversion of the positive voltage difference And an interleaved switching converter provided with means for discharging to near zero voltage or near zero voltage within a period from the detection of inversion of the positive voltage difference to the start of charge when discharging the first and second capacitors.

Here, DC (1) is an input voltage, Co (2) is an output capacitor, Load (3) is a load, and Voltage detector 4 is a voltage detector. In addition, L1, L2 and L3 (11 and 21) are inductors made of choke coils, SW1 and SW2 (12 and 22) are switches made of transistors, and D1 and D2 (12 and 22) are diodes and CS1 and CS2. 15 and 25 are current detection units.

2 is a detailed configuration diagram of the second control driver in FIG. 1, wherein reference numeral 24-1 is a D flip-flop, 24-2 is an inverter, 24-3, 24-4 is a transistor, and 24-5 is a Logical AND, 24-6 is a transistor, 24-7 is an inverter, 24-8 is a negative logic device, 24-9, 24-10, 24-11 is a transistor, 24-12 is a comparator, 24-13 is an inverter, 24-14 is an EX_NOR device, 24-15 is a comparator, and 24-16 is an RS flip-flop.

Referring to the basic switching control method of the switching converter of US 5,905,369 having the above configuration, Boost 1, the first switching converter 10, switches on when the L1 current becomes zero and detects the SW1 current. When the voltage Vi1 is equal to the control voltage Ve of the voltage detector 4, the control signal Vdr1 is turned off. In addition, Boost 2, which is the second switching converter 20, receives SW1 control signal Vdr1 of Boost 1 and turns on SW2 by 180 degrees out of phase with Vdr1 using a charge / discharge circuit. Generate a control signal Vdr2 to turn off.

Figure 3 is a waveform diagram showing the operation of each part in Figures 1 and 2, Figure 4 is an operational waveform diagram showing a problem of the conventional interleaved switching converter. 3 and 4, (1) Vdr1 is a waveform of the first drive signal output from the first control driver 14, (2) Vc1 and (3) Vc2 are waveforms showing charge and discharge, and (4) Vdr2 is The waveform of the second drive signal output from the second control driver 24, (5) Ii1 is the waveform of the input current input to the first control driver 14, (6) Ii2 is the waveform of the second control driver 24 This is the waveform of the input current.

Referring to the control method of the US 5,905,369 switching converter with reference to FIGS. 3 and 4 together with FIGS. 1 and 2, the control driver # 2, the second control driver 24, receives a Vdr1 signal and receives a current source. C1 and C2 are charged and discharged using I1, I2, I3, and I4 to generate a Vdr2 signal that turns on SW2 at the point where Vc1 and Vc2 are equal. Therefore, according to the aforementioned US 5,905,369, when two converters are connected in parallel, when I1, I2, I3, and I4 are the same and C1 and C2 are the same, Vdr1 and Vdr2 are 180 degrees as shown in the waveform diagram shown in FIG. The phase difference can be maintained.

However, in accordance with the pre-registered patent as described above, Boost2 does not detect the point where the current of L2 becomes zero unlike Boost1. If the device value of L2 is larger than L1, the slope of the current is lowered so that L2 SW2 is turned on before the current reaches zero, and it operates as CCM as shown in the waveform diagram of FIG. 4. In this case, the switching loss and switching noise of SW2 increases due to the reverse recovery of D2. Will be.

Therefore, boost2 also needs a circuit that detects the point where the L2 current becomes zero. If SW2 is turned on at the point where L2 current becomes zero even under conditions where L1 and L2 are not equal, the period of boost1 and boost2 will not match. Therefore, a problem arises in that the ripple of the input current and the output current increases, and a circuit for controlling the period and phase of Vdr1 and Vdr2 is required to be the same.

Accordingly, the present invention has been proposed to solve the above-mentioned general problems. Specifically, the present invention is a charge sharing method using both of the parallel connected converters while maintaining a constant phase difference of the parallel connected converter DCM (discontinuous conduction mode) The main technical problem is to provide a parallel-connected switching converter that can solve the problem that switching loss and switching noise increase due to reverse recovery phenomenon when operating in continuous conduction mode (CCM) by controlling to operate at the same time. .

In order to achieve the above technical problem, in the parallel-connected switching converter provided in the present invention, a plurality of converters including a first converter and a second converter are connected in parallel to a power input terminal, and turn on and turn on the plurality of converters. 1. A parallel-connected switching converter that adjusts off to maintain a constant phase difference between converters, comprising: a first switching controller for generating a first switching control signal for controlling the turn-on and turn-off of the first converter; A first capacitor and a second capacitor, and conducting charge sharing between the first capacitor and the second capacitor by conducting the first capacitor and the second capacitor according to the first switching control signal of the first switching controller. A synchronization signal generator configured to adjust a voltage of the first capacitor through the first capacitor and generate a synchronization signal having a predetermined phase difference while synchronizing with the first switching control signal using the voltage of the first capacitor; And a second switching controller for generating a second switching control signal according to the synchronization signal generated by the synchronization signal generator and controlling the turn-on and turn-off of the second converter. do.

In the parallel-connected switching converter of the present invention as described above, the synchronization signal generator is more specifically, a first capacitor; A second capacitor connected to the first capacitor through a switch element and connected to enable charge sharing with the first capacitor by being closed (ON) of the switch element; A comparator configured to generate a synchronization signal by comparing the voltage of the first capacitor with a reference voltage; And a charge / discharge unit connected to the first capacitor to charge or discharge the first capacitor by the synchronization signal and the first switching control signal. More preferably, the synchronization signal is generated. The unit may further include a short pulse generator for receiving the first switching control signal and converting the short switching pulse into a short pulse having a shorter HIGH period than the first switching control signal.

In addition, the present invention as described above may further include a technical configuration for matching the period of the synchronization signal and the second switching control signal generated as described above, for this purpose, the second switching control unit, the second switching control A phase comparator for receiving a feedback signal and comparing a phase of the sync signal generated by the sync signal generator with a phase of the second switching control signal to output a phase error according to a phase difference; A control voltage adjusting unit which generates a driving control voltage by adjusting a reference control voltage according to the phase error output from the phase comparing unit; And a switching control signal generator for generating a second switching control signal using the driving control voltage generated by the control voltage regulator. At this time, the reference control voltage used in the control voltage adjusting unit as described above, it is preferable to use a voltage adjusted so that the detected voltage is equal to the reference voltage based on the voltage detected by the voltage detector installed in the output terminal.

In addition, in generating the second switching control signal in the switching control signal generator as described above, for example, a current mode pulse width modulation (PWM) method for controlling the converter switching time by detecting a current flowing through the converter or using a reference voltage source The voltage mode PWM method of controlling the switching time point by comparing the driving control voltage can be used. That is, in the present invention, the switching control signal generation unit compares the driving control voltage generated by the control voltage generation unit with the voltage applied to the switching sensing resistor by the current passing through the converter switch included in the second converter. 2 applies a current mode PWM method for generating a switching control signal, or further includes a ramp generator for generating a ramp waveform, and compares the driving control voltage generated by the control voltage generator with the ramp voltage to generate a second switching control signal. It is also possible to apply a voltage mode PWM method to generate.

Further, in relation to a time point for turning on the plurality of converters, according to a more preferred configuration of the present invention, the first zero current detector for detecting whether the current flowing into the first converter is zero; And a second zero current detector for detecting whether the current flowing into the second converter becomes zero, wherein the first and second switching controllers respectively supply inflow currents from the first and second zero current detectors. When it is detected as zero, it can be configured to generate a turn-on control signal. According to the present invention configured as described above, it is preferable that not only the first converter but also all the converters below the second converter and the third converter connected in parallel operate in the threshold current mode. It becomes possible.

According to the parallel-connected switching converter of the present invention configured as described above, by using a charge sharing method, the parallel-connected converters are controlled to operate in a discontinuous conduction mode (CCM) while maintaining the phase difference of the parallel-connected converters constant. It is possible to solve the problem that the switching loss and the switching noise are increased by the reverse recovery phenomenon that occurs when operating in the).

Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings. On the other hand, in the present specification, in the case of the same component having the same function in the various embodiments shown in each drawing, the same name using the same name without using separate reference numerals or names to avoid confusion of understanding. Reference numerals are indicated.

Example 1

5 to 13 show a first embodiment of the parallel-connected switching converter of the present invention, which is supplied with DC power as the converter input voltage, uses current mode PWM, An example of using a converter is shown.

FIG. 5 is a block diagram of a parallel-connected switching converter using a current mode PWM according to an embodiment of the present invention. As shown in FIG. 5, the parallel-connected switching converter provided by the present invention is basically a power input 101. It can be seen that a plurality of converters including the first converter 100 and the second converter 200 are connected in parallel.

Herein, the converter exemplifies a boost converter which is a kind of a switching mode power supply (SMPS) having a boost circuit so as to obtain a large output voltage compared to an input voltage. Other types of converters can be applied without particular limitations.

According to the embodiment shown in FIG. 5, the first converter 100 and the second converter 200 are basically inductors L1 and L2, diodes D1 and D2, switches 120 and 220, and filter capacitors. (C0) 102, which includes a first switching controller 140 and a second switching controller 240 for controlling the opening and closing of the switches 120 and 220. In this case, MOSFETs may be most preferably used as the switch 120 and 220 elements. In addition, other types of transistor elements such as BJT and IGBT may be used in some cases.

On the other hand, the present invention relates to a technique for reducing the ripple of the input current and the output current by allowing a plurality of converters connected in parallel as described above to have a switching operation with a constant phase difference, the present invention as described above In maintaining the phase difference between the connected converters, the most important technical feature is to apply a method of charge sharing to generate a control signal having a constant phase difference even when the switching frequency is varied.

To this end, the present invention includes a synchronization signal generator 244 which generates a synchronization signal having a predetermined phase difference while synchronizing with the first switching control signal Vdr1 of the first converter by charge sharing. The generating unit 244 basically includes a first capacitor C1 and a second capacitor C2, and the first capacitor C1 and the first capacitor C1 according to the first switching signal Vdr1 of the first switching controller 140. The second capacitor C2 conducts to regulate the voltage of the first capacitor through charge sharing between the first capacitor and the second capacitor, and the voltage Vc1 of the adjusted first capacitor C1 is adjusted as described above. Is synchronized with the first switching control signal Vdr1 to generate a synchronization signal having a constant phase difference.

9 is a view showing a preferred configuration of the synchronization signal generator of the present invention as described above, in the present invention, as shown in FIG. 9, the synchronization signal generator 244 is a first capacitor connected in parallel Charge and discharge unit (244-10) connected to (C1) and the second capacitor (C2), the first capacitor (C1) to charge / discharge the first capacitor (C1) and / or the second capacitor (C2), And a comparator 244-1 generating the synchronization signal Sync by comparing the voltage of the first capacitor C1 with a reference voltage.

Here, the first capacitor (C1) and the second capacitor (C2) is configured to be selectively connected by an external control signal by being connected through the switch element 244-6 as shown, wherein the first The switch element 244-6 connecting the first capacitor C1 and the second capacitor C2 is constantly turned on / off by the first switching control signal Vdr1 of the first control driver 110. It is possible to adjust the voltage of the first capacitor C1 by sharing charge for a time.

Further, according to a more preferred configuration of the present invention, as a control signal for controlling the on / off operation of the switch element 244-6 as described above, the first switching control signal of the first control driver 110 as described above. Although Vdr1 may be used as it is, as shown in the example shown in FIG. 9, the short pulse generator 244-2 adjusts the duty ratio of the first switching control signal Vdr1 to high. It is more preferable in terms of phase difference control because it is possible to arbitrarily control the charging time and the amount of charge of the second capacitor C2 when converting to a short pulse SP having a short duration of HIGH.

In addition, according to the first embodiment, in generating the synchronization signal Sync by the synchronization signal generator 244, the voltage Vc1 applied to the first capacitor C1 and the predetermined reference voltage Vref are applied. Is compared through the comparator 244-1 to generate a synchronization signal Sync when the signal level becomes HIGH when the two voltages are the same, and outputs it as a signal for adjusting the second switching control signal Vdr2. The sync signal Sync generated as described above may be input to the charge / discharge unit 244-10 to be used as a signal for controlling charge / discharge operations of the capacitors C1 and C2.

9, the charge / discharge unit 244-10 is connected to one end of the first capacitor C1 in the synchronization signal generator 244 of the present invention as shown in FIG. It is a component to charge and discharge the charge in the two capacitors (C2). Here, the charging and discharging unit 244-10 may operate, for example, as the charging current power source I1 and the discharging current power source I2 and the charging and discharging current power sources I1 and I2 as in the illustrated embodiment. And an RS flip-flop 244-3 for controlling the charge / discharge unit 244-10. The charge / discharge unit 244-10 is converted into a sync signal and a short pulse generated by the comparator 244-1. The charging / discharging operation can be controlled by the first switching control signal SP.

Meanwhile, in the illustrated embodiment, the synchronization signal generator 244 is illustrated in a form included in a circuit of the second switching controller 240 without separately configuring a circuit for simplifying the circuit. It is also possible to implement as a circuit separate from the two switching control unit 240 separately.

Hereinafter, an operation process of the parallel-connected switching converter of the present invention configured as described above will be described in more detail.

Referring to FIG. 5, in the present invention, when controlling the turn-on and turn-off of the second converter 200, the second converter 200 also detects a time when the current Ii2 flowing in the second inductor L2 becomes zero. And a second zero current detector 210 for turning on and then turning on after the inflow current becomes zero, so that the second converter 200 performs DCM operation similarly to the first converter 100. There is a primary characteristic of.

In more detail, first, the first switching controller 140 included in the first converter 100 electromagnetically couples the first inductor L1 element generally provided at the power input terminal of the boost circuit. The first induction coil L3 is further provided to constitute a first zero current detector 110 capable of detecting an inflow current by the voltage Vzcd1 induced in the first induction coil L3. Accordingly, as shown in FIG. 6, the first switching controller 140 receives the Vzcd1 signal, compares it with a predetermined reference voltage Vth, and at the moment when the Vzcd1 signal falls below the reference voltage Vth. The converter switch is turned on by determining that the inflow current is zero and making the first switching control signal (hereinafter, Vdr1 signal) high.

In addition, the first switching controller 140 outputs the voltage Vi1 applied to the switching sensing resistor CS1 by the turn-on of the converter switch and the voltage detector 104 installed at the power output terminal. The converter switch is turned off by making the Vdr1 signal low when the Vi1 voltage rises above the Ve voltage in response to the reference control voltage Ve. At this time, the voltage detector 104 detects the output voltage V0 using the resistor dividers R1 and R2 as shown in FIG. 7, and the reference control voltage Ve so that the detected voltage becomes the reference voltage Vo_Ref. The feedback is supplied to the first switching controller 140 and the second switching controller 240 by adjusting.

Next, as shown in FIGS. 5 and 8, in the second switching controller 240, the voltage is induced by the second induction coil L4 of the second zero current detector 210. As soon as the Vzcd2 signal is received and the Vzcd2 voltage drops below the reference voltage Vth, the second switching control signal (hereinafter referred to as the 'Vdr2 signal') is made HIGH and the switch sensing voltage Vi2 caused by the current passing through the converter switch is higher than the drive control voltage Vc. As soon as it goes up, the Vdr2 signal goes low.

That is, according to the present invention as described above, when turning on the second converter, unlike the conventional parallel-connected switching converter detects the time when the current becomes zero in the second converter 200 as well as the first converter 100. When the zero current is detected, the converter switch is turned on so that both the first converter and the second converter operate as DCM. Also, in the present invention, when the current of the second converter becomes zero, the first switching control signal Vdr1 controls the operation of the first converter 100 in the case where the periods between the converters are not matched by turning on the switch. ) And a separate synchronization signal generator 244 for generating a synchronization signal (Sync) having a predetermined phase difference, and the second switching controller 240 adjusts the Vdr2 signal based on the synchronization signal (Sync) By controlling the conduction time of the second converter switch 220, the Vdr2 signal is controlled to be synchronized with the Vdr1 signal.

As described above, an operation process of controlling the second converter by the synchronization signal generator 244 and the synchronization signal generated by the synchronization signal generator 244 is the most characteristic configuration of the present invention. Referring to 10 in more detail as follows.

First, referring to FIG. 9, the synchronization signal generator 244 receives a Vdr1 signal and converts it into a short pulse SP having a short HIGH period through the short pulse generator 244-2. The Vdr1 signal (that is, the SP signal) converted into the short pulse as described above turns on the switch 244-6 connecting the first capacitor C1 and the second capacitor C2, and at the same time, the RS flip-flop S44-. 3) the charging switch 244-4 connected to the reset terminal of the charging current source I1 and the first capacitor C1 is turned on, and the switch 244-5 connected to the discharge current source I2 is turned off. .

At this time, when the switch 244-6 is turned on by the SP signal as described above, when the device values of C1 and C2 are the same, the charges charged in the two capacitors are uniformly divided by the charge sharing phenomenon. Accordingly, the voltage Vc1 applied to C1 and the voltage Vc2 applied to C2 become equal by the ON of the switch 244-6 as described above. ('A' point in the waveform diagram of Fig. 10)

In addition, as described above, since the charge switch 244-4 and the capacitor switch 244-6 are turned on in the period where the SP is HIGH, since the charging current source I1 charges C1 and C2 simultaneously, the first capacitor voltage Vc1 and the second capacitor voltage Vc2 are constant. Ascending with the slope. (Section 'a' in the waveform diagram of FIG. 10)

When SP goes from HIGH to LOW, capacitor switch 244-6 goes OFF and switch 244-4 remains ON because the output of RS flip-flop 244-3 does not change. Therefore, in this state, the charging current source I1 continuously charges only the first capacitor C1, so that the voltage Vc1 applied to the first capacitor C1 continues to rise, and the second capacitor C2 stops charging by turning off the capacitor switch 244-6. The final voltage at the moment the switch is broken is maintained. (Section 'b' in the waveform diagram of Fig. 10)

As described above, when the voltage Vc1 increases due to the charging of the first capacitor C1 and becomes equal to the predetermined reference voltage Vref, the comparator CMP1 signal becomes HIGH and the synchronization signal (hereinafter referred to as a 'sync signal') is made high. The Sync signal generated as described above is output to the phase comparator 245 to be described later and input to the SET terminal of the flip-flop 244-3. Accordingly, the charge switch 244-4 is turned off and the discharge switch 244-5 is turned off. Will light up. As described above, when the discharge switch 244-5 is turned on, the discharge current source I2 discharges C1. As a result, the Vc1 voltage continuously decreases and the Sync signal falls back to LOW. ('C' section in the waveform diagram of Figure 10)

As described above, when the Vdr1 signal comes HIGH again after the Vc1 voltage drops to a certain level by the discharge of the first capacitor, the same operation as described above is repeated. That is, the switch 244-6 is turned on by the SP signal, and charge sharing is performed by the conduction of the first capacitor C1 and the second capacitor C2, thereby immediately recovering the average value of the first capacitor voltage Vc1 to the second capacitor voltage Vc2. (The charge sharing time during short between capacitors is extremely short and can be ignored.) It is possible to secure a constant initial voltage value. ('A' point in the waveform diagram of Fig. 10)

On the other hand, in the above circuit, if I1 and I2 are the same and C1 and C2 are the same, Vdr1 and Sync have a phase difference of 180 degrees, and if I1 and I2, C1 and C2 are adjusted, the phase difference can be freely adjusted to an arbitrary value. .

단자와

단자가 바뀜으로써 Sync 신호에 의해 충전 스위치 244-4가 ON 되어 제1커패시터 C1에 대한 충전이 개시되고, 단펄스 SP에 의해서 방전 스위치 244-5가 ON 되어 C1에 대한 방전이 이루어진다는 점을 제외하고는 앞서 설명한 예와 동일하다.FIG. 11 illustrates another implementation manner of the synchronization signal generator 244 of the present invention as described above. As shown in FIG. Of the RS flip-flop

With terminals

Except for the fact that the charge switch 244-4 is turned on by the sync signal to start charging to the first capacitor C1, and the discharge switch 244-5 is turned on by the short pulse SP to discharge the C1. Is the same as the example described above.

FIG. 11B shows signal waveforms for the respective parts of the parallel-connected switching converter shown in FIG. 11A, and each waveform shown in FIG. 11B is shown in FIG. In comparison with, it can be seen that the waveforms of (1) Vc2, (2) Vc1 and (3) Vref are inverted only up and down in the waveform of FIG.

As described above, the sync signal generated by the sync signal generator 244 has a phase difference of 180 degrees with the switching control signal Vdr1 of the first converter, and once such a sync signal (Sync) is secured, the second sync signal is used. Controlling the switching control signal Vdr2 of the converter to generate a signal having a constant phase difference from Vdr1 can be relatively easily implemented at the level of those skilled in the art. In the present invention, a circuit for synchronizing the period of Vdr2 to the Sync signal using phase comparison will be described as an example of the circuit for controlling the Sync signal and Vdr2 to be synchronized.

As described above, the sync signal generated by the sync signal generator 244 is input to the phase comparator 245 to control the Vdr2 signal to be synchronized with the sync signal. That is, the phase comparator 245 receives the second switching control signal Vdr2 as a feedback input as shown in FIG. 8, and compares the phases of the sync signal and the Vdr2 signal input from the sync signal generator 244 to Vdr2. Phase error signal is generated and output depending on whether the signal is in phase lag or phase lead. Here, the phase comparison unit functions similar to the 74HC4046 phase lock loop (PLL).

The phase error generated by the phase comparator 245 is input to the control voltage controller 246, and the control voltage controller 246 is supplied from the phase comparator 245 to match the phase of Vdr2 and Sync. Based on the input phase error, the predetermined reference control voltage Ve is adjusted to generate a new driving control voltage Vc.

That is, when the phase error signal is a phase lag, the control voltage controller 246 lowers the Vc voltage by adjusting the Ve voltage in response to the phase delay signal in order to increase the frequency. In the case of a phase lead, the Vc voltage is increased by adjusting the Ve voltage to decrease the frequency. (See the waveform diagram in FIG. 10)

Meanwhile, the reference control voltage Ve used in the control voltage adjusting unit 246 may preferably be a voltage output from the voltage detecting unit 104 connected to the power output terminal. Referring to FIG. Since the above description has been made, repeated descriptions will be omitted.

Next, in the switching control signal generation unit 247 of FIG. 8, the second switching control for driving the switch of the second converter 200 based on the driving control voltage Vc generated by the control voltage adjusting unit 246 as described above. Generate the signal Vdr2. In this case, as shown in FIG. 8, the switching control signal generator 247 compares the driving control voltage Vc input from the control voltage adjusting unit 246 with a predetermined turn-off reference voltage Vi2 to generate an RS flip-flop 243. ) To turn off the second converter switch SW2 by making the Vdr2 signal low.

That is, according to the present invention, in determining the time of turning off the second converter switch SW2 as described above, Vdr2 is compared to the Sync signal by phase comparison between the Sync signal following the Vdr1 signal and the second switching control signal Vdr2. In the case of lowering the Vc voltage due to the late phase, the period of V2 rises as soon as the same as Vc, resulting in a shorter period of Vdr2. Conversely, if the voltage of Vc is higher because Vdr2 is faster in phase than the Sync signal, The point at which Vc becomes equal to Vc is delayed, and the period of Vdr2 becomes longer, thereby automatically synchronizing with Vdr1.

Example 2

On the other hand, the foregoing implementation method has been described in the case of using the current mode pulse width modulation (PWM) for detecting the switch current of the converter to determine when to turn off the switch compared to the output voltage Ve of the voltage detector 104 has been described. In the case of voltage mode PWM which determines when to turn off the switch by comparing the lamp signal and Ve, instead of the information of the switch current, the phase difference between the converters is constant by using the same method as described above. I can keep it.

12 to 14 show an example of using a voltage mode PWM instead of a current mode PWM as compared to the first embodiment described above. Referring to FIGS. 12 to 14, the first switching controller 140 may provide a ramp signal. It is provided with a ramp generator 144 that generates, and compares the output voltage Vr signal of the ramp generator 144 and the voltage detector voltage Ve instead of the switching sensing voltage Vi1 to determine the time to make the Vdr1 signal from HIGH to LOW Able to know.

In addition, as shown in FIG. 14, the second switching controller 240 compares the output voltage Vr signal of the ramp generator 248 with the driving control voltage Vc instead of Vi2 to determine a time point at which the Vdr2 signal is made from HIGH to LOW. . The other parts operate as in the case of Figs. 5 to 11 using the current mode PWM, and the repetitive description thereof will be omitted.

Example 3

In the above description, a case where two converters are connected in parallel has been described as an example. However, the present invention is not limited thereto, and in the case where three or more converters are connected in parallel, the phase difference between the converters can be controlled in a similar manner. 15 to 18 show an example using three or more converters 100 to 300 as compared with the first embodiment described above. Meanwhile, in the exemplary embodiments illustrated in FIGS. 15 to 18, the second switching controller 240 is not configured as a separate circuit to simplify the circuit in configuring the second synchronization signal generator and the third synchronization signal generator. And an example configured to be included in a circuit of the third switching controller 340. In the embodiments shown in FIGS. 15 to 18, the second synchronous signal generator and the third synchronous signal generator are shown in the drawings. Not shown separately.

15 and 16, an example of three converters connected in parallel is shown. Here, the basic circuits of the second switching controller 240 and the second synchronous signal generator are two converters as described above. Is the same as when connected in parallel, and in the same circuit as shown in FIG. 10 in the synchronizing signal generation unit (included in the second switching control unit), if I1 is doubled to I2, the second converter as shown in the waveform of FIG. Is operated while maintaining a 120 degree phase difference with the first converter.

In addition, when the third switching controller 340 also receives the Vdr2 signal and operates in the same manner, the third converter 300 operates while maintaining a 120 degree phase difference from the second converter 200. As a result, the three converters The module operates while maintaining a 120 degree phase difference.

Furthermore, even when three or more N converters are connected in parallel, it can be basically implemented as described above.

Specifically, a k-synchronous signal generation unit including a first capacitor and a second capacitor and generating a synchronization signal by charge sharing as described above for the control driving of the k-th converter, the k-synchronous signal generation In generating the synchronization signal, the controller shares the charges of the first capacitor and the second capacitor with the k-1 switching control signal for a predetermined time to adjust the voltage of the first capacitor and the synchronization signal based on the voltage of the first capacitor. It is configured to generate.

That is, according to the present embodiment, when the N converters are connected in parallel, the k-1 th based on the k-1 switching control signal of the adjacent k-1 switching control unit in generating the synchronization signal in each converter The technical feature is that the k-th synchronizing signal having a predetermined phase difference with the switching control signal is generated and the signal for synchronizing control of the k-th converter is generated using the k-th synchronizing signal.

Example 4

17 and 18 show an example implemented in a somewhat different manner from the third embodiment shown in FIG. 15 in the case where three converters are connected in parallel.

In the fourth embodiment, the circuit of the second switching controller 240 is basically the same as that of FIG. 15, but the third synchronization signal generator included in the third switching controller 340 is different from the case of FIG. 15. Instead of receiving the signal, as in the second synchronous signal generator, the signal of Vdr1 is input and generates a signal having synchronization with the first converter 100 while having a constant phase difference. At this time, if the second synchronous signal generator makes I1 twice the I2 and the third synchronous signal generator makes I2 twice the I1, as shown in the waveform of FIG. 18, the second converter makes a 120 degree phase difference from the first converter. The third converter operates while maintaining a phase difference of 240 degrees with the first converter. In this way, the three modules operate with a 120-degree phase shift.

The above method may be applied even when three or more N converters are connected in parallel.

Specifically, a k-synchronous signal generation unit including a first capacitor and a second capacitor and generating a synchronization signal by charge sharing as described above for the control driving of the k-th converter, the k-synchronous signal generation The unit is configured to receive the first switching control signal Vdr1 of the first switching control unit to adjust the voltage of the first capacitor based on the Vdr1 signal and generate the synchronization signal based on the voltage of the first capacitor in generating the synchronization signal. .

That is, according to the present embodiment, when N converters are connected in parallel, the first switching control signal Vdr1 of the first switching control unit is commonly received in generating the synchronization signal in each converter, and the synchronization signal is based on the Vdr1 signal. The technical characteristics of the method are to generate the N, and according to this method, the N converter modules can operate while maintaining a constant phase difference from each other.

Example 5

In the case described above, the converter input voltage is a DC voltage, and the same may be controlled in the case of an AC power source.

19 and 20, an input voltage is changed from a DC power source to an AC power source, and a BD (bridge diode) 105 is added as a DC power supply unit for converting an AC power source to a DC power source, that is, a power factor. Except for the use of a compensating converter, the input voltage described above is exactly the same as for direct current.

Although the above embodiments have been described based on a boost topology, a buck or other type of switching mode power supply (SMPS) topology generates a synchronization signal using charge sharing as described above and controls a plurality of converters using the same. By applying this, the switching phase difference of each paralleled converter can be kept constant.

Although the present invention has been described in detail with reference to the embodiments described, those skilled in the art to which the present invention pertains will be capable of various substitutions, additions and modifications without departing from the technical spirit described above. It is to be understood that such modified embodiments are also within the protection scope of the present invention as defined by the appended claims below.

1 is a block diagram of a conventional interleaved switching converter.

FIG. 2 is a detailed configuration diagram of the second control driver in FIG. 1.

3 is a waveform diagram showing the operation of each part in FIGS.

4 is an operation waveform diagram showing a problem of a conventional switching converter.

5 is a block diagram of a switching converter according to an embodiment of the present invention.

FIG. 6 is a detailed configuration diagram of the first switching control unit in FIG. 5.

FIG. 7 is a detailed configuration diagram of the voltage detector in FIG. 5.

FIG. 8 is a detailed configuration diagram of the second switching control unit in FIG. 5.

FIG. 9 is a detailed configuration diagram of a synchronization signal generator in FIG. 8.

10 is a timing chart of the waveform of each signal in the second switching controller of the present invention.

FIG. 11A is a detailed configuration diagram showing another configuration example of the synchronization signal generator in FIG. 8, and FIG. 11B includes a synchronization signal generator implemented as in FIG. A timing chart of the waveforms of the signals in the second switching controller.

12 is a block diagram of a switching converter according to another embodiment of the present invention.

FIG. 13 is a detailed configuration diagram of the first switching control unit in FIG. 12.

FIG. 14 is a detailed configuration diagram of the second switching control unit in FIG. 12.

15 is a block diagram illustrating a parallel-connected switching converter when two or more converters are connected in parallel according to another embodiment of the present invention.

FIG. 16 is a timing chart for the waveform of each signal in the embodiment shown in FIG.

17 is a block diagram illustrating a parallel-connected switching converter when two or more converters are connected in parallel according to another embodiment of the present invention.

FIG. 18 is a timing chart for the waveform of each signal in the embodiment shown in FIG.

19 is a block diagram showing a parallel-connected switching converter using an AC power supply and a current mode PWM according to another embodiment of the present invention.

FIG. 20 is a block diagram illustrating a parallel-connected switching converter using an AC power supply and a voltage mode PWM according to another embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

100: first converter (Boost1) 101: power input unit

102: output capacitor (Co) 103: load

104: voltage detector 110: first zero current detector

140: first switching control unit 200: second converter

210: second zero current detection unit 240: second switching control unit

244: synchronization signal generator 245: phase comparison unit

246: control voltage regulator 247: switching control signal generator

Claims (12)

In the parallel-connected switching converter that is connected in parallel with a plurality of converters including a first converter and a second converter in parallel, by adjusting the turn on and off of the plurality of converters to maintain a constant phase difference between the converters, A first switching controller for generating a first switching control signal for controlling the turn-on and turn-off of the first converter; A first capacitor and a second capacitor, and conducting charge sharing between the first capacitor and the second capacitor by conducting the first capacitor and the second capacitor according to the first switching control signal of the first switching controller. A synchronization signal generator for adjusting a voltage of the first capacitor and generating a synchronization signal having a predetermined phase difference in synchronization with the first switching control signal using the voltage of the first capacitor; And, A second switching controller configured to generate a second switching control signal according to the synchronization signal generated by the synchronization signal generator to control turn-on and turn-off of the second converter; Parallel-connected switching converter configured to include. The method of claim 1, wherein the synchronization signal generator, A first capacitor; A second capacitor connected to the first capacitor through a switch element, the second capacitor connected to allow the charge sharing with the first capacitor by the closing force (ON) of the switch element; A comparator configured to generate a synchronization signal by comparing the voltage of the first capacitor with a reference voltage; And, A charge / discharge unit connected to the first capacitor to charge or discharge the first capacitor by the synchronization signal and the first switching control signal; Parallel-connected switching converter, characterized in that configured to include. 3. The apparatus of claim 2, wherein the synchronization signal generator further includes a short pulse generator configured to receive the first switching control signal and convert the first switching control signal into a short pulse having a shorter duration than the first switching control signal. Paralleled switching converter. The method according to any one of claims 1 to 3, wherein the second switching control unit, A phase comparing unit receiving a feedback input of the second switching control signal and comparing a phase of the synchronization signal generated by the synchronization signal generation unit with a phase of the second switching control signal and outputting a phase error according to a phase difference; A control voltage adjusting unit generating a driving control voltage by adjusting a reference control voltage based on the phase error output from the phase comparing unit; And, A switching control signal generation unit generating a second switching control signal using the driving control voltage generated by the control voltage adjusting unit; Parallel-connected switching converter, characterized in that further comprises a. 5. The apparatus of claim 4, further comprising a voltage detector configured to detect output voltages of the first converter and the second converter, wherein the reference control voltage of the control voltage controller is a voltage corresponding to the voltage detected by the voltage detector. Paralleled switching converter. The method of claim 4, wherein the switching control signal generator is configured to compare the driving control voltage generated by the control voltage generator with a voltage applied to the switching sensing resistor by a current passing through the converter switch included in the second converter. Parallel-connected switching converter, characterized in that for generating a switching control signal. The method of claim 4, wherein the second driver is further provided with a ramp generator for generating a ramp waveform, wherein the switching control signal generator is a driving control voltage generated by the control voltage generator and the lamp voltage generated by the lamp generator And comparing the second switching control signal with the second switching control signal. 2. The apparatus of claim 1, further comprising: a first zero current detector for detecting whether a current flowing into the first converter is zero; It further comprises a second zero current detector for detecting whether the current flowing into the second converter is zero, The first switching controller generates a first switching control signal for turning on the first converter when a current is detected as zero by the first zero current detector, and the second switching controller generates a current by the second zero current detector. And if it is detected as zero, generating a second switching control signal for turning on the second converter. The method of claim 8, wherein the first zero current detector includes a first inductor coupled to a power input terminal by a pair of coils to form an induced voltage, and the first switching controller is connected to the first inductor. Comparing the voltage with the reference voltage to generate a first switching control signal for turning on the first converter, The second zero current detector includes a second inductor coupled to a power input terminal by a pair of coils to form an induced voltage, and the second switching control unit compares the voltage induced in the second inductor with a reference voltage. And generating a second switching control signal for turning on the first converter. The method of claim 1, wherein the parallel-connected switching converter further comprises a third converter connected in parallel to the first converter and the second converter, A third synchronous signal generator which receives the first switching control signal of the first switching control unit and generates a synchronous signal having a predetermined phase difference in synchronization with the first switching control signal; And a third switching controller for generating a third switching control signal for controlling the turn-on and turn-off of the third converter according to the synchronization signal generated by the third synchronization signal generator. The third synchronous signal generator includes a first capacitor and a second capacitor, conducts the first capacitor and the second capacitor according to the first switching control signal, and adjusts the voltage of the first capacitor through charge sharing. And a synchronization signal is generated using the voltage of the first capacitor. The method of claim 1, wherein the parallel-connected switching converter further comprises a third converter connected in parallel to the first converter and the second converter, A third synchronous signal generator which receives the second switching control signal of the second switching control unit and generates a synchronous signal having a predetermined phase difference in synchronization with the second switching control signal; And a third switching controller for generating a third switching control signal for controlling the turn-on and turn-off of the third converter according to the synchronization signal generated by the third synchronization signal generator. The third synchronous signal generator includes a first capacitor and a second capacitor, and conducts the first capacitor and the second capacitor according to the second switching control signal to adjust the voltage of the first capacitor through charge sharing. And a synchronization signal is generated using the voltage of the first capacitor. The parallel-connected switching converter according to claim 1, wherein the parallel-connected switching converter is a power factor correction converter including a DC power supply unit configured to supply AC power to DC power at a power input terminal.

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