KR20090087007A - Tuning device with diplexer input - Google Patents

Abstract

The present invention includes an apparatus for distributing a received modulated RF signal to a plurality of tuners including a diplexer device. The diplexer device includes a plurality of filter circuits adapted to direct respective portions of the received modulated RF the signal to respective tuner devices. In an illustrated embodiment, the tuner devices supply tuned signals to a picture in picture display device. Also disclosed is a method of receiving a modulated ready of frequency signal and routing portions of the received signal to respective tuner devices using filter devices in a diplexer or multiplexer configuration. ® KIPO & WIPO 2009

Description

Tuning device with diplexer input {TUNING DEVICE WITH DIPLEXER INPUT}

The present invention relates to a video receiving method and a receiving apparatus, and more particularly to a method and apparatus for signal routing in a video receiving apparatus.

Radio-frequency (RF) communications have become popular in recent years, and many sources of RF signals have created congested signal environments in many areas of the United States and abroad. At the same time, the emergence of digital communication technologies has placed strict requirements on the characteristics of the received signal, such as noise, sensitivity, and dynamic range. Analog signals tend to be less elegant than digital signals, which can suddenly be of poor quality. Therefore, digital television is one digital communication technology that is likely to require specific signal characteristics at the receiver.

As the popularity of digital television increases, users are likely to demand improvements in performance and convenience that will entail the significant investment required to change from analog television equipment to digital television equipment. For example, users are likely to expect the reception of virtually interference-free television signals, with convenient integration of additional components such as set top box (STB) devices, personal video recorders (PVRs), high-definition receivers (HD), and the like. .

It is known to exchange multiple information signals at the same time by frequency division multiplexing. For example, coaxial cables are commonly used to carry hundreds of television channels simultaneously. In addition, a single terrestrial antenna may receive multiple signals at one time. The plurality of signals may come from one common source or from multiple geographically separated sources.

Consumer demand has expanded the functionality and complexity of television receiving devices. For example, a receiving device is now available that can record a first incoming television channel while simultaneously displaying a second incoming television channel, and these two incoming television channels are extracted from one common received RF signal. do.

It is also known to simultaneously receive and record multiple television channels and to simultaneously display multiple television channels. For example, some consumer televisions now have picture-in-picture functionality, picture outside picture (POP), multi-image display capabilities such as side by side picture display, or small pictures. Contains an array. For example, the PIP functionality displays a first video signal on a first zone of the video display screen while simultaneously displaying a second video signal on a second smaller zone within or within the first zone of the video display screen. Allow to do

The following description of the purpose of describing the present invention relates to an exemplary PIP multi-image display system involving a PIP image. The described system is applicable to other types of multiple image systems. In implementing these convenient functions, it is known to use multiple tuner devices within a single receiving system. For example, a first tuner device can be used to extract the main signal from the RF carrier signal. The output video signal of the first tuner device is used, for example, to generate a first video signal main image representing a portion or area of the display system on the video display screen of the PIP system. The second tuner device is used to extract the second or auxiliary image signal from the RF carrier signal. The output video signal of the second tuner device is used to generate a second video signal representing an auxiliary image portion or region of the displayed image. For example, in a PIP system a first or main video signal is used to make the main image area of the PIP display, and a second video signal is used to make the main picture, i.e. a small auxiliary image inserted into the PIP image.

With multiple tuners, in order to implement multi-channel functionality such as PIP video display functionality and / or simultaneous multi-channel recording, each tuner must receive a portion of an incoming carrier signal. In conventional tuner systems, dividing the incoming signal into separate parts for each tuner is generally accomplished with a signal splitter.

The signal splitter receives signals from one input port and produces output signals from two or more output ports. The output signal produced at each of the two or more outputs has substantially the same frequency content as the input signal received at the input of the signal splitter. Splitting the input signal into two outputs of the passive signal splitter device results in splitting the signal power accordingly. Therefore, with respect to the passive signal divider device, the sum of the output power of the output signals is not more than the power of the input signal. Each output signal contains only one portion or a portion of the original input signal power.

For example, it is known to amplify the input signal prior to signal distribution. It is also known to amplify one or more respective output signals of the signal divider. However, such amplification can introduce undesirable distortion in the amplified signals. In addition, amplification requires the use of additional components and the provision of amplification power. This generally adds complexity and cost to the system. Therefore, it is desirable to have a method of allocating input signal power to various tuners as a way to optimize the signal power received at each tuner.

According to the invention, the incoming RF signal is divided according to frequency so that the signals in the first frequency band are received by the first tuner and the signals in the second frequency band are received by the second tuner. In one aspect of the invention, each tuner receives most of the power in its respective frequency band. This is in contrast to the situation where conventional distributors are used. With conventional dividers, each tuner receives power across all frequencies, in which case there is no differential power allocation within the range of frequencies tuned by that tuner.

In one aspect, the invention includes a tuner system having a plurality of tuners and a frequency demultiplexer. The frequency demultiplexer distributes the received modulated carrier signal to the plurality of tuners. The frequency demultiplexer receives one input signal and produces two or more output signals. Unlike the output signals of the distributor device, the output signals of the frequency demultiplexer have substantially different frequency content. Thus, for example, the first output signal of the frequency demultiplexer includes a lower band of each of the carrier frequencies, and the second output signal of the frequency demultiplexer includes an upper band of each of the carrier frequencies.

In one embodiment, the lower band and the upper band of frequencies are substantially orthogonal, that is, the carrier frequencies found in the lower frequency band are actually not in the upper frequency band, and the carrier frequencies found in the upper frequency band are in fact lower frequency band. Not in

In one embodiment, using the frequency demultiplexer to distribute the modulated carrier signal achieves a more efficient distribution of signal power than that achieved by the signal divider, while eliminating the need for a signal divider device. Therefore, in the exemplary apparatus, virtually all power found within the first channel of the received signal is transferred to the signal input of the first tuner, and virtually all power found within the second channel of the received signal is transmitted to the second tuner. Move on to the second signal input.

As noted above, conventional signal divider devices distribute virtually all frequencies of the received signal to each output, but power is reduced. Thus, each tuner receives only a portion of the channel power for the tuned channel, while receiving and wasting signal power at frequencies that would be useful if directed to another tuner. The apparatus of the present invention distributes most of the signal energy in a particular channel to a tuner that tunes the signals from within that channel. Therefore, the need for amplifying the input signal or the output signal is reduced or eliminated, and thus the cost and performance degradation associated with the amplification are reduced or eliminated.

Further advantages and features of the present invention will become apparent from the drawings illustrating the preferred embodiments of the present invention and the following detailed description.

1 is a block diagram of a signal receiving system according to an embodiment of the present invention.

2 shows a frequency domain graph of a modulated carrier signal comprising a television channel.

3A-3C show frequency domain graphs of received and divider output signals.

4A and 4B show frequency domain graphs of output signals of a diplexer in accordance with an embodiment of the present invention.

5 is a schematic circuit diagram of a signal diplexer according to an embodiment of the present invention.

6 is a block diagram of an integrated circuit in accordance with an embodiment of the present invention.

7 is a block diagram of a PIP system including a signal diplexer according to an embodiment of the present invention.

8 illustrates a personal video recorder (PVR) system including a signal diplexer according to an embodiment of the present invention.

In the detailed description that follows, reference is made to the accompanying drawings that form a part hereof, which is shown by way of illustration of specific embodiments in which the invention may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the invention, and other embodiments may be utilized and structural, logical, and electrical changes may be made without departing from the spirit and scope of the invention. It must be understood.

1 illustrates a block diagram of a signal tuning system 100 in accordance with an embodiment of the present invention. The tuning system 100 includes a local RF signal input 102. In the illustrated embodiment, the local RF signal input is electronically coupled to the terrestrial antenna device 104. Depending on the requirements of the particular system, a preamplifier device may optionally be included.

RF signal input 102 is coupled to input 110 of frequency diplexer 112. The frequency diplexer 112 includes a first filter portion 114 and a second filter portion 116. Input 110 is coupled to each other at first input 118 and second input 120 of filter portions 114, 116, respectively.

In the illustrated embodiment, the first filter portion 118 shows a low pass filter feature and the second filter portion 120 shows a high pass filter feature. However, one skilled in the art will recognize that various filter arrangements may be advantageously used in various embodiments of the present invention. For example, the filter portions may include filter portions having a notch filter feature, filter portions having a bandpass filter feature, and filter portions having a comb filter feature.

The first filter portion 114 and the second filter portion 116 are respectively the first input 122 and the second of the first tuner device 126 and the second tuner device 128 at their respective outputs 119, 121. Coupled to input 124. In various embodiments, these two devices 126, 128 may include respective preamplifier devices. The first tuner device and the second tuner device have respective tuner outputs 129, 131.

The tuner outputs 129, 131 of the first tuner device 126 and the second tuner device 128 are coupled to respective first input 132 and second input 134 of the signal processing device 130. In various embodiments of the present invention, signal processing devices include, for example, demodulator devices, MPEG decoder devices, output amplifiers, and / or other signal processing devices and systems, which are known in the art.

In the illustrated example, the signal output 136 of the signal processing device 130 is coupled to the output 138 of the tuning system 100 or serves as the output 138 of the tuning system 100. As illustrated, this output can be coupled to an input 140 of an additional device, such as video display device 142. As discussed in more detail below, filters 114 and 116 may have substantially fixed filter characteristics. In alternative embodiments, filters 114 and 116 may have adjustable filter features.

Referring now to the above-described embodiment, the operation of an exemplary apparatus according to the present invention is discussed with reference to FIG. 1 and further with reference to FIGS. 2 to 6. Those skilled in the art will recognize that Figure 2 has been idealized to clarify the representation. 2 shows a graphical representation 200 in the frequency domain of the received signal 202. The received signal 202 is a signal that may be received, for example, at a terrestrial receive antenna. Therefore, signal 202 may be a composite signal consisting of multiple signals received from each separate signal source.

The tuning system is operative to receive the frequency within the bandwidth 204 defined by the lower corner frequency 206 and the upper corner frequency 208. Multiple modulated channels are available within typical bandwidth 204. As illustrated, these include a first channel 210, a second channel 212, and a third channel 214. Those skilled in the art will appreciate that more channels may be available at various carrier frequencies within bandwidth 204, depending on the bandwidth of the tuning system and the bandwidth of the individual channels 210, 212, 214, and so forth.

As shown, according to one embodiment of the invention, the amplitude of the received signal 202 varies over the bandwidth 204 of the receiver such that each channel of the received signal has a respective time average amplitude such as 216,218,220. These amplitudes depend on factors such as, for example, antenna reception characteristics, broadcast power, distance between broadcast and receive antennas, and characteristics of the intervening transmission medium. However, one skilled in the art will recognize that other system configurations also result in a substantially constant signal amplitude over the receiver bandwidth.

The tuner device is tunable to detect frequencies of a signal in a particular channel, such as 210. Typically, the tuner device has a response characteristic 205 that is adapted to substantially match the channel 210 frequency. The frequency detected by the tuner is demodulated to extract channel information modulated with the carrier signal 202. Successful demodulation of channel information depends on the presence of adequate power in the incoming signal. The signal power available to the tuner is represented by the region 207 (in channel 210) below the signal envelope curve of signal 202.

3A illustrates a graphical form of two example channels 210, 212 of a received signal 202. The signals carried by the exemplary channels 210, 212 have respective amplitudes A, A '. In a conventional multiple tuner system, the received signal 224 is distributed by a divider having one input and two outputs for receiving the received signal 202. 3B shows example output signals 226, 228 as found at the first output of the distributor. 3C shows example output signals 227 and 229 as found at the second output of the divider. As shown in Figures 3B and 3C, each output of a conventional divider receives a signal that includes virtually all frequencies found in the received signal 202, but at its amplitude (B, B ', C, C'). Is reduced.

It is possible to amplify the output signals of the divider using one or more amplifier devices, thereby recovering the lost signal amplitude. Such an amplifier device can not only introduce distortion and signal noise, but also add cost to the system. Thus, amplification of the output signals may be undesirable.

In a symmetric divider, the corresponding amplitudes (B, C) (B ', C') of the output signals are each substantially the same (eg, approximately A / 2, A '/ 2, respectively). In asymmetric dividers these amplitudes are not equal. In any case, the unamplified amplitude of the output signals is less than the corresponding amplitude of the received signal 202.

When the output signal of the divider is applied to the input of each tuner, the channel power available to each tuner is received by the reduced area below the exemplary signal envelope curve 226 as compared to the region 207 as indicated. Smaller than available at.

Referring now to FIGS. 4A and 4B, a graphical representation of each signal available at the outputs 119, 121 of the diplexer 112 (such as shown in FIG. 1) of the present invention is shown. The diplexer 112 of the present invention receives carrier signals in two channels 210, 212 (as shown in FIG. 3A).

As illustrated in FIG. 4A, the diplexer provides a first range of frequencies 238 (below frequency ω _c ) to the first output 119 (such as shown in FIG. 1). As illustrated in FIG. 4B, the diplexer provides a second range of frequencies 240 (above frequency ω _c ) to the second output 121. The amplitudes (A, A ') of each signal at diplexer outputs (119, 121) are in fact equal to the amplitudes (A, A') of the received signal (as shown in Figure 3A). Therefore, the power levels available to each tuner, for example as indicated by region 246, are greater than the power levels available to the tuners in a conventional divider system (as indicated by region 230). This additional power translates into superior output signal quality.

5 shows a schematic circuit diagram of a diplexer 500 according to an embodiment of the present invention. This diplexer 500 includes an input node 502. This input node is electrically coupled to the first filter portion 504 and the second filter portion 506. The first filter portion 504 and the second filter portion 506 have respective output nodes 508, 510. In the illustrated embodiment, the first filter portion 504 shows a high pass filter feature and the second filter portion 506 shows a low pass filter feature. However, as discussed above, a wide variety of filter features are intended to be within the scope of the present invention. As discussed in further detail below, in one embodiment the first filter portion and the second filter portion are tunable filter portions.

Filter portion 504 includes a first tuning node 512. Capacitor 514 is coupled between node 502 and node 512. Resistor 516 is coupled between node 512 and tuning voltage source 518. In one embodiment of the invention, the tuned voltage source may comprise a phase locked loop (PLL). In yet another embodiment, the tuning voltage source may comprise a digital to analog converter (DAC).

Filter portion 504 includes additional nodes 520, 522, 524. A varactor device 526 is coupled between node 512 and node 520.

Resistor 528 is coupled between node 520 and the source of ground potential 530. Another capacitor 532 is coupled between node 520 and node 522. Another resistor 534 is coupled between node 522 and the source of ground (or common node) potential 530. Another varactor device 536 is coupled between node 522 and node 508. An inductive device 538, such as a coil, is coupled between node 522 and node 524, and another inductive device 540 is coupled between node 508 and the source 530 of ground potential. Also, another resistor 542 is coupled between the node 508 and the tuning voltage source 519.

Filter portion 506 includes nodes 550, 552, 554. Capacitor 560 is coupled between node 502 and node 552. Inductive device 562 is coupled between node 502 and node 550. A resistor 564 is coupled between the third tuned voltage source 563 and the node 552. Another capacitor 566 is coupled between node 550 and node 510.

Varactor device 568 is coupled between node 552 and node 510. Resistor 570 is coupled between node 510 and the source 530 of ground potential. Another varactor device 572 is coupled between node 510 and node 554. Another capacitor 574 is coupled between the node 554 and the source 530 of ground potential, and another resistor 576 is coupled between the node 554 and the fourth tuned voltage source 565.

The components of the high pass filter portion 504 are adapted to produce filter features with special lower cutoff frequencies. In one embodiment of the invention, the components of the low pass filter portion 506 are adapted to produce filter features with an upper cutoff frequency that is substantially equivalent to the lower cutoff frequency of the filter portion 504. In another embodiment of the present invention, the lower limit cutoff frequency and the upper limit cutoff frequency are separated from each other. In one embodiment of the invention, the final pass bands of the filter parts overlap.

As noted above, in one embodiment the first filter portion and the second filter portion are tunable filter portions. Therefore, the corner frequency of each filter is adjustable. In the illustrated embodiment, this adjustment is performed by control of the tuning voltages applied at tuning nodes 518,519,563,565. Those skilled in the art will appreciate that the capacitance of varactors 526 and 536 is adjustable by the change in tuning voltages applied to nodes 518 and 519, respectively. In the same way, the capacitances of the varactors 568 and 572 are adjustable by the change in the tuning voltage applied to the tuning nodes 563 and 565, respectively.

It should be noted that the sources of tuning voltages 518,519,563,565 identified above are a single source of tuning voltage in one embodiment of the present invention. In one such embodiment, nodes 518, 519, 563 and 565 are connected to each other. In other words, the sources of tuning voltages 518,519,563,565 can be common to each other, grouped or completely independent of each other. These sources of tuning voltages may be supplied by a single device or a plurality of devices. Also noted above, the tuning voltage source may comprise a phase locked loop (PLL). In yet another embodiment, the tuned voltage source may comprise a digital-to-analog converter (DAC). In yet another embodiment, the tuning voltage source may comprise a variable resistor.

In operation, diplexer 500 is adapted to receive a modulated carrier signal at input node 502. Frequencies in the first band up to the upper cutoff frequency pass through the low pass filter portion 506 to the output node 510. According to one embodiment of the invention, the frequencies of this first band comprise at least a first signal channel. Frequencies in the second band that are above the lower cutoff frequency mentioned above pass through the high pass filter portion 504 to the output node 508. The frequencies of this second band include at least a second signal channel. Those skilled in the art will appreciate from the standpoint of the disclosure described herein that selecting particular component values for the disclosed devices is a matter of design.

Those skilled in the art will appreciate that diplexer device 500 is only one of a variety of possible diplexer devices. For example, the diplexer device may include one or more of an active filter device, a passive filter device, and a digital filter device. In various embodiments, filter devices include filters comprised of an operational amplifier and supporting components. In another embodiment, the diplexer according to the present invention comprises one or more digital filters. In various embodiments, digital filters are implemented in separate components, and in other embodiments, digital filters are implemented using microprocessors and / or digital signal processor (DSP) devices. In other embodiments a filter implemented as integrated circuits is used.

Those skilled in the art will appreciate that in various embodiments the diplexer is implemented as a combination of two or more of the filter devices described above. Thus, the present invention includes, but is not limited to, all of the foregoing diplexer implementations. In addition, it should be understood that the diplexer device discussed above is just one illustrative example of a wide variety of possible embodiments. Thus, those skilled in the art will appreciate that various demultiplexer devices are used in the various embodiments of the present invention.

Figure 6 shows a block diagram of another embodiment of the present invention. As shown in FIG. 6, the diplexer device is implemented as an integrated circuit 600. Integrated circuit 600 includes a first filter portion 602 and a second filter portion 604. The first filter portion 602 and the second filter portion 604 have input nodes 606 and 608 connected to each other. As shown, filter portions 602 and 604 are included on a common integrated circuit board. Output nodes 628, 630 may be coupled to respective input nodes of another processing system 636. Another processing system may be one of a wide variety of systems, such as, for example, a PIP display device in accordance with various embodiments of the present invention.

Optionally included on the integrated circuit board is a first output amplifier device and a second output amplifier device. The input amplifier can also optionally be integrated on the substrate.

Those skilled in the art will appreciate that the integrated circuit 600 of FIG. 6 includes a special set of components in accordance with one embodiment of the present invention. In various embodiments, such integrated circuits can easily include more or fewer components, depending on the needs of the particular application. For example, in one embodiment the integrated circuit 600 is implemented to include only a single filter portion. In yet another embodiment, a plurality of filter portions are implemented on an integrated circuit board without an input amplifier device and an output amplifier device. In another embodiment of the invention, the integrated circuit device comprises a complete tuner system including a preamplifier, diplexer, tuner device, MPEG decoder device, and buffer device. Another embodiment of the invention includes an RF modulation device adapted to modulate a complete PIP display signal into an RF carrier signal.

7 shows a block diagram of a PIP display system 700 according to another embodiment of the present invention. The PIP display system 700 includes an input node 706 of the diplexer device 708. Input node 706 is adapted to receive a modulated radiofrequency signal, for example. The modulated RF signal may be received, for example, from coaxial cable 703.

In the illustrated embodiment, the diplexer device includes a first filter portion 710 and a second filter portion 712. The first filter portion and the second filter portion have respective output nodes 714, 716 coupled to respective input nodes 718, 720 of the tuner subsystem 722. Input nodes 718 and 720 are coupled to respective inputs 733 and 735 of the first tuner device 728 and the second tuner device 730.

In the illustrated embodiment, the tuner devices 728 and 730 also have respective control inputs 732 and 734. These control inputs 732, 734 are coupled to receive control signals from a control device 736, such as a microprocessor or microcontroller device, for example.

In one embodiment of the invention, the controller device 736 is adapted to receive a control signal from the user by the remote control device 738. In one embodiment, the communication between such remote control device 738 and control device 736 is via and / or via a wireless communication link 740, such as a radio frequency communication link, an optical frequency communication link, an ultrasonic communication link. Implemented by combining

The tuner devices 728, 730 also include respective output nodes 742, 744 coupled to the respective input nodes 746, 748 of the PIP image integration device 750. In one embodiment, the image integration device 750 includes an MPEG decoder device 751. In one embodiment, the image integration device 750 is adapted to receive each first video signal and the second video signal at the input nodes 746, 748 and combine the same into the integrated video signal. The integrated video signal is output from the image integration device 750 through the output buffer amplifier device 752 to the input of the display device 754. Display device 754 includes a display screen 756 in which the integrated video signal appears as a PIP display that includes a first main image region 758 and a second PIP image region 760.

8 shows a personal video recorder (PVR) system 800 according to an embodiment of the present invention. Input nodes 801 of PVR system 800 are coupled to each other at each input of two or more filter devices (eg, 804, 806). Outputs of filter devices 804 and 806 are coupled to respective tuner devices 812 and 814, respectively. Optionally, each buffer amplifier can be coupled between the filter device and the tuner device. Tuner devices 812 and 814 are coupled to respective decoder devices 816 and 818, such as, for example, MPEG decoder devices, MPEG II decoder devices, or other decoder devices.

Each output of the decoder devices 816, 818 is coupled to a respective input of the control subsystem 820. In various embodiments, the control subsystem includes, for example, address, data, and control buses, buffering components such as microprocessors and / or microcontrollers, and other control devices known in the art. do. As illustrated, the control subsystem 820 may include other hard disk drive data storage devices, flash memory data storage devices, static RAM data storage devices, EEPROM data storage devices, optical disk data storage devices, and combinations thereof, for example. Coupled to one or more data storage devices 822,824, such as data storage devices, which are known in the art. At the output port 826, the control subsystem is coupled to the input of another processing device 828.

Those skilled in the art will appreciate that such another processing device 828 may include additional decoder devices such as MPEG decoder devices. In another embodiment, decoder devices 816 and 818 are omitted and encoded data is stored directly in storage devices 822 and 824. As shown, the output of another processing device 828 is coupled to the output 832 of the PVR 800 via another buffer amplifier 830. This output 832 is adapted to be coupled to an existing television device, for example as known in the art.

As can be seen by the embodiments described herein, the present invention includes a method and apparatus for distributing a received signal to a plurality of signal processing devices, such as tuners.

Although the present invention has been described with particular reference to video receiving equipment including PIP video receiving equipment, it should be noted again that the invention has broader applicability and can be used in a wide range of video receiving equipment and methods. The above description and drawings illustrate preferred embodiments that achieve the objects, features, and advantages of the present invention. The invention is not intended to be limited to the illustrated embodiments. Any modification of the invention which comes within the spirit and scope of the following claims should be considered part of the invention.

As described above, the present invention is applicable to a method and apparatus for signal routing in a video receiving apparatus.

Claims (20)

As a video processing system, A diplexer 708 having a first signal output 714 and a second signal output 716, A first tuner 728 having a first tuner input 733 coupled to the first signal output 714, A second tuner 730 having a second tuner input 735 coupled to the second signal output 716, and Having a first input 746 and a second input 748 coupled to a first output 742 and a second output 744 of each of the first tuner 728 and the second tuner 730, Video signal processor 750 for generating signals representing multiple images Which includes, a video processing system. The method of claim 1, The diplexer (708) includes a first filter portion (710) and a second filter portion (712). The method of claim 2, And at least one of the first filter portion (710) and the second filter portion (712) is tunable. The method of claim 2, The first filter portion (710) comprises a low pass filter portion (506) and the second filter portion (712) comprises a high pass filter portion (504). The method of claim 1, The first tuner 728 and the second tuner 730 each include a first control input 732 and a second control input 734, and the first control input 732 and the second control. The input 734 is coupled to the controller device 736 with each other. The method of claim 1, The PIP image generation device (750) comprises an MPEG decoder device (751). The method of claim 1, The diplexer (708) comprises an integrated circuit device (600). The method of claim 7, wherein The integrated circuit device (600) comprises an integrated amplifier device. The method of claim 1, And at least one data storage device (822). The method of claim 9, The at least one data storage device (822) comprises a hard disk storage device. The method of claim 9, The at least one data storage device (822) comprises a flash memory storage device. The method of claim 1, The diplexer 708 is adapted to receive a first modulated carrier signal and produce a first signal portion 238 and a second signal portion 240, the first signal portion 238 being a first one. Channel 250, wherein the second signal portion 240 comprises a second channel 252, and the first signal portion 238 contains virtually none of the second channel 252. Wherein the second signal portion (240) comprises virtually none of the first channel (250). As a method of generating a video signal, Diplexing the received modulated carrier signal 224 to produce a first signal portion 238 and a second signal portion 240, wherein the first signal portion 238 is a second signal; Diplexing, comprising one video program channel 250 and virtually none of the second video program channel 252, virtually none of the first channel 250, Tuning the first channel 250 from the first signal portion 238, Tuning the second channel 252 from the second signal portion 240, and Receiving the first channel 250 and the second channel 252 at each input 746, 748 of the image generating device 750. And a video signal. The method of claim 13, In an MPEG decoder device (751), further comprising decoding the first channel (250) and the second channel (252). The method of claim 13, Displaying the image on a display screen (756). The method of claim 15, Wherein the display screen (756) comprises a first main image zone (758) and a second PIP image zone (760). The method of claim 13, Diplexing the received modulated carrier signal 224 may include receiving the modulated carrier signal 224 at a signal input 118 of the filter portion 114 of the diplexer 112. And a video signal. The method of claim 13, Receiving at the terrestrial antenna (104) the modulated carrier signal (224). The method of claim 13, Receiving the modulated carrier signal (224) at a coaxial cable (703). As a device, Means for receiving a modulated RF signal 224 containing a first television channel 220 and a second television channel 222 at respective first power levels, Means for separating the modulated RF signal into at least two frequency bands (238,240), each of the at least two frequency bands (238,240) being substantially associated with the first television channel (220) at the respective first power levels. Separating means comprising at least one of the second television channels 222, Means for tuning the first television channel 220 and the second television channel 222 from the at least two frequency bands 238, 240, and Means for displaying a video image in response to the first television channel 220 and the second television channel 222. Which includes.

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