KR20090065860A

KR20090065860A - Fabricating method for gallium nitride wafer

Info

Publication number: KR20090065860A
Application number: KR20070133384A
Authority: KR
Inventors: 이정식
Original assignee: 삼성코닝정밀유리 주식회사
Priority date: 2007-12-18
Filing date: 2007-12-18
Publication date: 2009-06-23
Also published as: KR101144846B1

Abstract

A method for manufacturing a GaN wafer is provided to control effectively stress generated between a grown GaN layer and a base substrate by forming previously an insertion layer of a network structure having a pin hole on a base substrate. A base substrate(100) is arranged on a GaN growing path. A silicon nitride insertion layer(150) of a network structure is formed on an upper surface of the base substrate. A GaN layer is grown on an upper surface of the silicon nitride insertion layer. A plurality of fine voids are formed between the GaN layer and the silicon nitride insertion layer. The network structure of the silicon nitride insertion layer includes silicon nitrides connected with each other and a plurality of fine pin holes. The fine pin holes are formed locally at the silicon nitride insertion layer.

Description

Gallium nitride wafer manufacturing method {FABRICATING METHOD FOR GALLIUM NITRIDE WAFER}

The present invention relates to a method of manufacturing a gallium nitride wafer capable of reducing warpage generated during the growth process and obtaining a crack-free gallium nitride thick film.

Gallium nitride is a semiconductor material having a bandgap energy of 3.39 eV and a direct transition type, and is useful for manufacturing light emitting devices in a short wavelength region. Due to the high nitrogen vapor pressure at the melting point, gallium nitride single crystals are difficult to mass-produce because liquid crystal growth requires a high temperature of 1500 ° C. or higher and 20000 atmospheres of nitrogen atmosphere.

Until now, gallium nitride films have been grown on heterogeneous substrates by vapor phase growth methods such as metal organic chemical vapor deposition (MOCVD) or hydraulic vapor phase epitaxy (HVPE). The MOCVD method has a problem that it is difficult to use to obtain GaN substrates of tens or hundreds of micrometers because the growth rate is too slow even though a high quality film can be obtained. For this reason, a growth method using HVPE is mainly used to obtain a GaN thick film.

Sapphire substrate is most commonly used as a heterogeneous substrate for gallium nitride film production because sapphire has a hexagonal structure such as gallium nitride, which is inexpensive and stable at high temperatures. However, sapphire causes strain at the interface due to gallium nitride and lattice constant difference (about 16%) and coefficient of thermal expansion (about 35%), which causes lattice defects and cracks in the crystals. It is difficult to grow a high quality gallium nitride film and shorten the life of the device fabricated on the gallium nitride film.

When gallium nitride is grown on a sapphire substrate, warpage occurs from the sapphire substrate 100 to the gallium nitride layer 210 as shown in FIG. 1 due to a difference in coefficient of thermal expansion between the sapphire substrate and gallium nitride. In addition, in the cooling process after growth of the gallium nitride layer, as shown in FIG. 2, warpage occurs in the opposite direction, and the gallium nitride layer is stressed as a whole. This becomes vulnerable.

In order to prevent such warpage, a method of using a GaAs substrate having a relatively smaller thermal expansion coefficient difference than that of sapphire having a large thermal expansion coefficient difference compared to gallium nitride has been proposed, but GaAs has a disadvantage in that it is expensive and degrades in heat.

Accordingly, in order to obtain a large yield of gallium nitride wafers, there is a need for an improved technique for reducing the stress transferred from the base substrate to the gallium nitride layer and easily separating the gallium nitride thick film from the base substrate.

Accordingly, an object of the present invention is to provide a gallium nitride wafer manufacturing method which is suitable for manufacturing a large area gallium nitride wafer, and which can reduce the warpage and prevent cracking by relieving the stress generated between the base substrate and the gallium nitride thick film.

Another goal is to simplify the manufacturing process, reduce manufacturing costs and shorten manufacturing time by providing a new stress relief process that can proceed in-situ in gallium nitride growth furnaces.

In order to achieve the above object, the present invention includes the step of placing a base substrate in the gallium nitride growth furnace, forming a silicon nitride insertion layer of the mesh structure on the base substrate, and growing a gallium nitride layer on the insertion layer The present invention provides a method of manufacturing a gallium nitride wafer, wherein a plurality of fine voids are present locally between the gallium nitride layer and the insertion layer.

The insertion layer is formed of a mesh structure in which silicon nitride is interconnected and locally has a plurality of fine pinholes.

The gallium nitride layer is selectively grown from the pinhole region, and the void is present in the silicon nitride region of the insertion layer to reduce the contact area between the gallium nitride layer and the base substrate.

According to the present invention, it is possible to effectively control the stress generated between the grown gallium nitride layer and the base substrate by forming the insertion layer of the network structure having pinholes on the base substrate in advance. The voids present between the grown gallium nitride layer and the intercalation layer can suppress cracking even when growing a gallium nitride thick film of 100 μm or more by reducing the area in which the gallium nitride layer and the base substrate are in direct contact.

In addition, according to the present invention, the formation of an insertion layer in-situ in a gallium nitride growth furnace does not require a complicated mask process requiring sputtering, PVD, CVD, mask patterning, etching, etc. It can contribute to savings and process time.

In the present invention, an insertion layer is first grown before a gallium nitride layer is grown on a base substrate, and a plurality of voids are present at the interface between the insertion layer and the gallium nitride layer that is subsequently grown, thereby increasing the gallium nitride layer from the base substrate. Minimizes the stress that can be transmitted to, resulting in a high quality, large crack free gallium nitride wafer.

To this end, the present invention forms a silicon nitride insertion layer having a mesh structure on the base substrate by injecting a silicon source and a nitrogen source in the reactor while the base substrate is charged into the gallium nitride growth reactor. The interlayer is formed under an in-situ process in a growth reactor, and does not require additional elements in the process such as using a thin film deposition process or a mask pattern formed in a separate space.

In the present invention, a method for hydroxy phase epitaxy (HVPE) as a gas phase process for the growth of gallium nitride as an embodiment, but can be easily applied to other gallium nitride manufacturing process to achieve the same object as the present invention. Those skilled in the art will fully understand that the present invention.

In the present invention, an oxide substrate such as sapphire or a carbide substrate such as silicon carbide may be used. In some cases, a gallium nitride independence layer, a GaN template substrate, or the like may be used. The material is not particularly limited. In addition, as described later, an nitride layer such as Al _x Ga ₁ _- _x N (0 ≦ x ≦ 1) may be grown on the upper surface of the base substrate to form an insertion layer.

Referring to the schematic diagram of FIG. 3 for better understanding, it can be seen that the silicon nitride insertion layer 150 according to the present invention is formed on the upper surface of the base substrate 100. The insertion layer 150 has a silicon nitride molecular layer grown to form a network structure in which dot islands are interconnected with adjacent dots. In addition, a plurality of fine-sized pinholes 152 having no silicon nitride are arranged in the insertion layer of the mesh structure. Therefore, the insertion layer made of silicon nitride may be regarded as an irregular patterned mask layer, not a complete thin film form. In FIG. 3, the pinholes 152 are shown to be arranged in the same shape and at similar intervals for clarity, but in reality, the size (diameter) and the spacing may appear randomly.

In such an insertion layer, the size of the silicon nitride molecular layer, that is, the thickness of the formed insertion layer, may affect the surface structure or film quality of the gallium nitride layer (or gallium nitride thick film) that is subsequently grown.

4A to 4C, the surface of the gallium nitride layer grown after the formation of the silicon nitride (SiNx) insertion layer is shown. As shown, it can be found that the gallium nitride layer surface structure or shape depends on the thickness of the silicon nitride insertion layer.

For example, a gallium nitride layer grown on a substrate without a silicon nitride insertion layer is uniformly grown so that no specific structure is seen on the surface. On the other hand, when silicon nitride is formed at a level of about 0.5 molecular layer (monolayer: ML-about 5 to 10 microns in thickness) and about 3 ml of gallium nitride is grown thereon (Fig. 4a), silicon nitride is formed. The gallium nitride layer is selectively grown only on the pinhole portion of the insertion layer, and the total area of the grown gallium nitride layer is relatively small.

When silicon nitride is formed at a level of about 0.6 ml and the gallium nitride layer is grown by about 3 ml (FIG. 4b), it can be seen that the gallium nitride layer is grown in an arabesque form on the surface of the insertion layer. It can be said that the intrinsic area of the gallium nitride layer increases with increasing thickness of the silicon nitride insertion layer.

When the silicon nitride insertion layer is formed at a level of about 0.8 mL (FIG. 4C), the gallium nitride layer is densely covered with a dot having a diameter of 20 to 30 nm on the surface of the insertion layer.

It can be seen that the surface morphology of the gallium nitride layer varies depending on the thickness of the insertion layer by selectively growing the gallium nitride layer in the portion where the silicon nitride is present and in the portion (the pinhole region) in the insertion layer. It was confirmed by TEM observation that the gallium nitride layer was selectively grown in the silicon nitride insertion layer. On the other hand, the selective growth of the silicon nitride layer using AlN, a nitride similar to that of gallium nitride, was tested in the same manner, and it was confirmed that in the case of AlN, a flat thin film was formed regardless of the surface shape of the silicon nitride layer.

Hereinafter, a method of manufacturing a gallium nitride wafer according to a preferred embodiment of the present invention will be described.

Conventionally, in order to form a silicon nitride mask on a base substrate when a gallium nitride layer is grown, several micrometers of SiN patterns are realized by photolithography in epitaxial lateral over growth (ELO). There was an attempt to do it. However, this method requires a separate mask film for pattern formation, requires expensive equipment for forming a thin film, or is not suitable for realizing selective growth of the gallium nitride layer due to unnecessary process addition.

In the present invention, while forming a patterned silicon nitride network structure in the form of a mask in-situ in the growth reactor in the growth reactor without a patterned mask to simplify the process and reduce manufacturing costs High quality gallium nitride wafers can be produced. The manufacturing method according to the invention is characterized by forming the basic structure of the base substrate / insertion layer (SiNx) / gallium nitride layer.

First, as shown in FIG. 5A, a base substrate is charged into a growth furnace (not shown), and then, Si and N sources are supplied to the surface thereof, and the silicon is 0.1 to 100 ML level, preferably 1.0 ML or less. A nitride layer is formed. The Si source may be DCS, TEOS, SiH ₄ , Si ₂ H ₆ , and the like, and the N source may be ammonia. In addition, in order to form the silicon nitride layer, it is preferable to maintain the internal temperature of the growth furnace at 500 ° C or higher.

The silicon nitride layer 150 formed on the base substrate may have a different microstructure according to process conditions in the growth furnace, and a mesh structure of SiN _x (0 <x ≦ 4/3) is formed (see FIG. 5B). In the case of a silicon nitride layer, when the thickness is small (for example, about 1 mL or less), there are a plurality of fine pinholes 152 in which silicon nitride is not formed on the surface of the base substrate. These pinholes range from about 5 to 5000 nm in diameter, and the distance between the pinholes is from about 1 to 5000 nm and can be distributed regularly or very disorderly in the silicon anitride layer.

Next, a gallium nitride layer is grown on the silicon nitride layer formed by the network structure by vapor phase epitaxy. The growth of gallium nitride 200 ′ is suppressed on the silicon nitride surface so that selective growth may be performed locally only in the pinhole region to form a fine columnar structure (FIG. 5C). The gallium nitride layer is grown while the temperature of the growth furnace is maintained at 500 ° C or higher.

As shown in FIG. 5D, gallium nitride layers are interconnected to form a thin film through continuous gallium nitride layer growth, and gallium nitride layers do not grow in regions in which silicon nitride is present, so that the gallium nitride layer 200 Between the silicon nitride insertion layer 150 and there is a void 205 corresponding to a kind of voids.

The void 205 serves to relieve the physical stress applied to the gallium nitride layer 200 by concentrating the generated stress (on the void) even when a stress due to a difference in thermal expansion coefficient between the base substrate and the gallium nitride layer is generated. . In addition, since it prevents physical bonding between the gallium nitride layer and the base substrate, it does not cause great stress when the grown gallium nitride layer is separated from the base substrate, and the separation process is very simple and the process reliability is improved. .

6A to 6D sequentially illustrate a manufacturing method according to another embodiment, in which Al _x Ga _1-x N (0 ≦ x ≦ 1) as a buffer layer 120 (before formation of a silicon nitride insertion layer) is formed on an upper surface of a base substrate. The embodiment in which the thin film layer is formed is shown, and each step is the same as in the previous embodiment.

FIG. 7 illustrates another embodiment of the present invention, and after forming a gallium nitride layer, a composite structure in which a silicon nitride insertion layer and another gallium nitride layer are further grown by at least one layer. The silicon nitride insertion layers 150a, 150b, and 150c and the gallium nitride layers 200a, 200b, and 200c are alternately stacked, and voids are present therebetween.

Such a composite structure can facilitate the separation process especially when the gallium nitride thick film grown on the base substrate has a large thickness and a large area, and can effectively block the stress transmitted from the base substrate on the gallium nitride growth layer. will be.

Example

A sapphire substrate as the base substrate to the mounting, and surface-treated with NH _3, HCl gas into the reaction with a temperature increase to more than 900 ℃. Thereafter, DCS and NH ₃ were supplied to the reactor to form a silicon nitride insertion layer having a mesh structure on the surface of the sapphire substrate. A gallium nitride thick film was grown on the intercalation layer by vapor phase epitaxy.

After growth, the gallium nitride thick film in the reactor was slowly discharged to the outside of the reactor to examine the surface structure, and no cracks were observed. In addition, no warping or cracking occurred even when the base substrate was separated from the base substrate.

The present invention has been exemplarily described through the preferred embodiments, but the present invention is not limited to such specific embodiments, and various forms within the scope of the technical idea presented in the present invention, specifically, the claims. May be modified, changed, or improved.

1 and 2 are schematic diagrams showing the warpage of the gallium nitride layer generated during growth.

Figure 3 is a plan view showing a mesh structure of the insertion layer according to the present invention.

4a to 4c are TEM photographs showing the surface of the gallium nitride growth layer according to the thickness of the silicon nitrite molecular layer.

Figures 5a to 5d is a process chart showing a gallium nitride wafer manufacturing method according to an embodiment of the present invention.

6a to 6d are process charts showing a method for manufacturing a gallium nitride wafer according to another embodiment of the present invention.

Figure 7 is a cross-sectional view showing an insertion layer / gallium nitride layer of a repeating structure grown in accordance with another embodiment of the present invention.

*** Explanation of symbols for the main parts of the drawing ***

100: base substrate 120: buffer layer

150: insertion layer 152: pinhole

200: gallium nitride layer 205: void

Claims

Place the base substrate in the gallium nitride growth furnace,

Forming a silicon nitride insertion layer having a mesh structure on the base substrate,

Growing a gallium nitride layer on the insertion layer;

And a plurality of fine voids are present locally between the gallium nitride layer and the insertion layer.

Gallium nitride wafer manufacturing method.

The method of claim 1, wherein the insertion layer is formed of a mesh structure in which silicon nitride is interconnected and locally has a plurality of fine pinholes.

The method of claim 2, wherein the gallium nitride layer is grown from the pinhole region, and the void is present in the silicon nitride region of the insertion layer.

The method of claim 2, wherein the pinhole has a diameter of 5 to 5000 nm.

The method of claim 2, wherein the distance between the pinholes is in the range of 1 to 5000 nm.

The method of claim 1, wherein the insertion layer is formed in-situ in a gallium nitride growth furnace.

The method of claim 1, wherein the gallium nitride layer is grown by vapor phase epitaxy.

The method of claim 1, wherein the base substrate is made of sapphire.

The method of claim 1, wherein the base substrate is made of gallium nitride.

The method of claim 1, wherein the insertion layer is formed of silicon nitride in a range of 0.1 to 100 monolayer.

2. The method of claim 1, further comprising forming an Al _x Ga ₁ _- _x N (0 ≦ x ≦ 1) thin film layer on a base substrate before forming the insertion layer.

The method of claim 1, wherein the insertion layer is formed by supplying a Si source and an N source to the growth furnace while maintaining the gallium nitride growth furnace at a temperature of 500 ° C. or higher.

The method of claim 1, wherein the gallium nitride layer is grown while the temperature of the growth furnace is maintained at 500 ° C. or higher.

The method of claim 1, further comprising, after forming the gallium nitride layer, further growing at least one layer of a silicon nitride insertion layer and another gallium nitride layer.

The method of claim 1, wherein the silicon nitride is made of SiN _x (0 <x ≦ 4/3).

The method of claim 1, further comprising separating the gallium nitride layer from the base substrate.