KR20090044535A - Photo mask and methdo for fabricating semiconductor device using the same - Google Patents

Photo mask and methdo for fabricating semiconductor device using the same Download PDF

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Publication number
KR20090044535A
KR20090044535A KR1020070110670A KR20070110670A KR20090044535A KR 20090044535 A KR20090044535 A KR 20090044535A KR 1020070110670 A KR1020070110670 A KR 1020070110670A KR 20070110670 A KR20070110670 A KR 20070110670A KR 20090044535 A KR20090044535 A KR 20090044535A
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KR
South Korea
Prior art keywords
pattern
phase change
layer
exposure
phase
Prior art date
Application number
KR1020070110670A
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Korean (ko)
Inventor
임희열
Original Assignee
주식회사 하이닉스반도체
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Priority to KR1020070110670A priority Critical patent/KR20090044535A/en
Publication of KR20090044535A publication Critical patent/KR20090044535A/en

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    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/38—Masks having auxiliary features, e.g. special coatings or marks for alignment or testing; Preparation thereof
    • G03F1/42—Alignment or registration features, e.g. alignment marks on the mask substrates
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70425—Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
    • G03F7/70466—Multiple exposures, e.g. combination of fine and coarse exposures, double patterning or multiple exposures for printing a single feature
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274—Photolithographic processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane

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  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Inorganic Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an exposure mask and a method of manufacturing a semiconductor device using the same, wherein an exposure mask formed of a phase change material having different phase change regions is used. After performing the second patterning process by changing the second line pattern to the crystalline phase, the double patterning process can be performed using one exposure mask, which shortens the process time and improves the overlay characteristics. The technique which improves the characteristic of an element is disclosed.

Description

Exposure mask and manufacturing method of semiconductor device using same {PHOTO MASK AND METHDO FOR FABRICATING SEMICONDUCTOR DEVICE USING THE SAME}

The present invention relates to an exposure mask and a method for manufacturing a semiconductor device using the same. In particular, the present invention relates to a double patterning method using an exposure mask provided with a phase change film.

In order to highly integrate a semiconductor device, pattern refinement is essential. In order to integrate a large number of devices in a small area, the size of the individual devices must be made small. For this purpose, the pitch, which is the sum of the width and the interval of the pattern to be formed, must be made small.

Recently, as the reduction of device design rules has progressed rapidly, fine pitch has been reduced due to the resolution limitation in the photolithography process for forming a pattern, for example, a line and space pattern, required for semiconductor device implementation. Branches are limited in forming patterns.

Various pattern formation techniques have been proposed to overcome the resolution limitations in the photolithography process as described above. As one of the methods, a pattern formation method using two photomasks is widely used.

1A to 1C show a double patterning method according to the prior art, (i) is a plan view showing an exposure mask, and (ii) is an exposure showing a cut plane according to X-X 'of (i). It is sectional drawing which shows sectional drawing of a mask and the pattern formation method using the same.

Referring to FIG. 1A (ii), an etching target layer 110, a hard mask layer 120, and a first photoresist layer (not shown) are formed on the semiconductor substrate 100.

Next, the first photosensitive film pattern 145 is formed by a first exposure and development process using the first exposure mask 140 provided with the first light blocking pattern 145.

Here, referring to FIG. 1A (1), the first exposure mask 140 will be described. The first light blocking pattern 145 is formed of a chromium layer, and the pitch of the first light blocking pattern 145 is a target. It is preferable to form about twice the pitch of the pattern to be etched.

Therefore, the first photoresist film pattern 130 having a line width below the exposure limit level can be easily formed.

Referring to FIG. 1B (ii), the hard mask layer 120 is etched using the first photoresist pattern 130 as a mask to form a hard mask layer pattern 120a.

Next, the first photoresist layer pattern 130 is removed, and a second photoresist layer (not shown) is formed over the entire surface including the hard mask layer pattern 120a.

Next, the second photosensitive film pattern 135 is formed by a second exposure and development process using the second exposure mask 150 provided with the second light blocking pattern 155.

In this case, referring to FIG. 1B (b), the second exposure mask 150 will be described. The second light shielding pattern 155 may include the first light blocking pattern provided in the first exposure mask (140 in FIG. 1A). It is preferably provided between 145) of FIG. 1A, and is provided to be about twice the pitch of the target etched layer pattern.

Therefore, the second photosensitive film pattern 135 having a line width below the exposure limit level can be easily formed.

Referring to FIG. 1C, the etched layer 110 is etched using the second photoresist layer pattern 135 and the hard mask layer pattern 120a as a mask to form an etched layer pattern 110a having a target fine pitch.

Next, the second photosensitive film pattern 135 and the hard mask layer pattern 120a are removed.

In the above-described conventional exposure mask and a method of manufacturing a semiconductor device using the same, a pattern must be formed through two exposure processes, and two exposure masks are required as each pattern is separately formed. In addition, during the exposure process, the process time is delayed due to the replacement of the exposure mask, and there is a problem in that an overlay failure occurs.

The present invention uses an exposure mask formed of a phase change material having different phase change area bands, and changes the first line pattern into a crystalline phase to perform a first patterning process and then changes the second line pattern into a crystalline phase. By performing the secondary patterning process, the double patterning process can be performed using one exposure mask, which shortens the process time and also improves the overlay characteristics to improve the characteristics of the device.

The exposure mask according to the present invention,

An exposure mask for performing a double patterning process,

With a transparent substrate,

And a first pattern and a second pattern formed of a phase change material having different phase change regions on the transparent substrate.

The phase change material is GeSbTe,

GeSbTe is any one selected from GeSb2Te4, Ge2Sb2Te5, and a combination thereof,

The first pattern and the second pattern is the phase change to a crystalline phase in a different phase change area band atmosphere,

The crystalline phase is light-shielded,

The phase change zone is applied to any one selected from a temperature of 80 to 200 ℃, an electric field of 10 to 50kW, a wavelength of 190 to 360nm or a pressure of 760 ~ 1500mmtrorr,

Wherein the first pattern and the second pattern is a phase change to a crystalline phase or an amorphous phase in a different phase change region, the change in a different phase,

The first pattern and the second pattern is characterized in that the line pattern.

In addition, a method of manufacturing a semiconductor device using the exposure mask

Forming an etched layer, a hard mask layer, and a first photoresist layer on the semiconductor substrate;

Changing the first pattern of the exposure mask of claim 1 to a crystalline phase and then performing an exposure and development process to form a first photoresist pattern;

Etching the hard mask layer using the first photoresist pattern as a mask to form a hard mask layer pattern;

Forming a second photoresist layer on the etched layer including the hard mask layer pattern;

Changing the second pattern of the exposure mask of claim 1 to a crystalline phase and then performing an exposure and development process to form a second photoresist pattern;

Etching the etched layer using the hard mask layer pattern and the second photoresist pattern as a mask to form an etched layer pattern;

The second photoresist layer pattern may be formed so as not to overlap with the hard mask layer pattern.

According to an embodiment of the present invention, a double patterning process is performed using an exposure mask formed of phase change materials having different phase change regions, and a first patterning process is performed by changing a first line pattern into a crystalline phase, and then a second patterning process. By performing the second patterning process by changing the line pattern into the crystalline phase, the double patterning process may be performed using one exposure mask.

Moreover, by using one exposure mask, process time can be shortened and there exists an effect that an overlay characteristic also improves.

In addition, a preferred embodiment of the present invention is for the purpose of illustration, those skilled in the art will be able to various modifications, changes, substitutions and additions through the spirit and scope of the appended claims, such modifications and changes are the following claims It should be seen as belonging to a range.

Hereinafter, with reference to the accompanying drawings will be described in detail an embodiment of the present invention.

2 is a plan view showing an exposure mask according to the present invention.

Referring to FIG. 2, the exposure mask 200 using double patterning includes a first line pattern 210a and a second line pattern 210b, and a first line pattern 210a and a second line pattern 210b. ) Is preferably formed of a GeSbTe material which is a phase change material.

Here, GeSbTe is preferably any one selected from GeSb2Te4, Ge2Sb2Te5, and a combination thereof.

In this case, the first line pattern 210a and the second line pattern 210b may be formed of different materials, respectively, and may be formed of materials causing phase change in different phase change regions.

The phase change material forms a crystal phase when a specific external factor such as a specific temperature, pressure, electric field or optical reaction is applied. This is because it induces specific orientation of the molecules forming the amorphous phase, and light transmission is prevented by the principle of having the orientation first.

That is, when the phase change film becomes a crystalline phase, light is scattered at the grain boundary to prevent permeation. When the phase change film becomes an amorphous phase, light is transmitted by removing specific orientation and disappearing the grain boundary.

3A to 3D are cross-sectional views illustrating a method of manufacturing a semiconductor device using an exposure mask according to the present invention. Here, the exposure mask represents a cut plane along X-X 'of FIG. 2.

Referring to FIG. 3A, an etching target layer 305, a hard mask layer 310, and a first photoresist layer (not shown) are formed on the semiconductor substrate 300.

Next, the first line pattern 210a is changed into a crystalline phase by adjusting to the atmosphere of the phase change region band.

In this case, the phase change area band is applied to any one selected from a temperature of 80 to 200 ℃, an electric field of 10 ~ 50kW, a wavelength of 190 to 360nm or a pressure of 760 ~ 1500mmtrorr to change the phase of the phase change material.

In this case, since the first line pattern 210a and the second line pattern 210b are formed of different phase change materials, and the phase change area bands of the phase change are different, the phase change of the first line pattern 210a is changed. When the atmosphere of the region band is applied, the first line pattern 210a is phase-changed into the crystalline phase, and the second line pattern 210b is kept in the amorphous phase without being phase-changed to act as a light transmitting pattern.

Next, the first photoresist pattern 320 is formed by performing a first exposure and development process using the exposure mask 200 in which the first line pattern 210a is changed to a crystalline phase.

Referring to FIG. 3B, the hard mask layer 310 is etched using the first photoresist pattern 320 as a mask to form the hard mask layer pattern 310a.

Next, the first photosensitive film pattern 320 is removed.

Referring to FIG. 3C, a second photoresist layer (not shown) is formed over the entire surface including the hard mask layer pattern 310a.

Next, the second line pattern 210b is changed into a crystalline phase by adjusting to the atmosphere of the phase change region band.

Next, a second photosensitive film pattern 325 is formed by performing a second exposure and development process using the exposure mask 200 in which the second line pattern 210b is changed to a crystalline phase.

In this case, the second photoresist layer pattern 325 may be formed so as not to overlap the hard mask layer pattern 310a.

The phase change area band is applied to any one selected from a temperature of 80 to 200 ° C., an electric field of 10 to 50 kW, a wavelength of 190 to 360 nm, or a pressure of 760 to 1500 mmtrorr to change the phase of the phase change material.

At this time, when the atmosphere of the phase change region where the second line pattern 210b is phase-changed is applied, the second line pattern 210b becomes a crystalline phase, and the first line pattern 210a that has become the crystalline phase is phase-changed into an amorphous phase.

Therefore, the first line pattern 210a which has been phase-changed into the crystalline phase in the first exposure process is phase-changed into the amorphous phase to act as a light transmitting pattern.

Referring to FIG. 3D, the etching target layer 305 is etched using the hard mask layer pattern 310a and the second photoresist layer pattern 325 as a mask to form an etching target layer pattern 305a having a target minute pitch.

In the above-described embodiment of the present invention, the first line pattern 210a and the second line pattern 210b have been described by way of example, but are not limited to the line pattern.

1A to 1C are plan views and cross-sectional views illustrating an exposure mask and a method of manufacturing a semiconductor device using the same according to the related art.

2 is a plan view of an exposure mask according to the present invention;

3A to 3D are cross-sectional views illustrating a method for manufacturing a semiconductor device using an exposure mask according to the present invention.

<Explanation of Signs of Major Parts of Drawings>

200: exposure mask 210a: first line pattern

210b: second line pattern 300: semiconductor substrate

305: etched layer 305a: etched layer pattern

310: hard mask layer 310a: hard mask layer pattern

320: first photosensitive film pattern 325: second photosensitive film pattern

Claims (10)

An exposure mask for performing a double patterning process, Transparent substrates; And And a first pattern and a second pattern formed of a phase change material having different phase change regions on the transparent substrate. The method of claim 1, And the phase change material is GeSbTe. The method of claim 2, The GeSbTe is an exposure mask, characterized in that any one selected from GeSb2Te4, Ge2Sb2Te5 and a combination thereof. The method of claim 1, And the first pattern and the second pattern phase change from a different phase change region to an crystalline phase. The method of claim 4, wherein The crystalline phase is an exposure mask, characterized in that light is not transmitted. The method of claim 1, The phase change area band is an exposure mask, characterized in that any one selected from the temperature of 80 to 200 ℃, electric field of 10 to 50kW, wavelength of 190 to 360nm or pressure of 760 ~ 1500mmtrorr. The method of claim 1, And the first pattern and the second pattern are changed into phases in a crystalline phase or an amorphous phase in different phase change regions, and are changed into different phases. The method of claim 1, And the first pattern and the second pattern are line patterns. Forming an etched layer, a hard mask layer, and a first photoresist layer on the semiconductor substrate; Changing the first pattern of the exposure mask of claim 1 to a crystalline phase and then performing exposure and development processes to form a first photoresist pattern; Forming a hard mask layer pattern by etching the hard mask layer using the first photoresist pattern as a mask; Forming a second photoresist layer on the etched layer including the hard mask layer pattern; Changing the second pattern of the exposure mask of claim 1 to a crystalline phase and then performing an exposure and development process to form a second photoresist pattern; And Etching the etched layer using the hard mask layer pattern and the second photoresist pattern as a mask to form an etched layer pattern Method of manufacturing a semiconductor device comprising a. The method of claim 9, The second photosensitive film pattern is a semiconductor device manufacturing method, characterized in that formed so as not to overlap with the hard mask layer pattern.
KR1020070110670A 2007-10-31 2007-10-31 Photo mask and methdo for fabricating semiconductor device using the same KR20090044535A (en)

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