KR20090035817A - Method of forming printed cirucit board - Google Patents

Method of forming printed cirucit board Download PDF

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Publication number
KR20090035817A
KR20090035817A KR1020070100815A KR20070100815A KR20090035817A KR 20090035817 A KR20090035817 A KR 20090035817A KR 1020070100815 A KR1020070100815 A KR 1020070100815A KR 20070100815 A KR20070100815 A KR 20070100815A KR 20090035817 A KR20090035817 A KR 20090035817A
Authority
KR
South Korea
Prior art keywords
circuit board
printed circuit
forming
patterns
copper layer
Prior art date
Application number
KR1020070100815A
Other languages
Korean (ko)
Inventor
류영준
Original Assignee
엘지이노텍 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 엘지이노텍 주식회사 filed Critical 엘지이노텍 주식회사
Priority to KR1020070100815A priority Critical patent/KR20090035817A/en
Publication of KR20090035817A publication Critical patent/KR20090035817A/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/60—Protection against electrostatic charges or discharges, e.g. Faraday shields
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0215—Grounding of printed circuits by connection to external grounding means
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H05K3/3442—Leadless components having edge contacts, e.g. leadless chip capacitors, chip carriers

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

A method of forming printed circuit board can prevent the electric charge from being accumulated in the edge area of the printed circuit board by using the ground line of the packaging equipment. The top and bottom copper layer having the predetermined thickness are formed in the top and bottom of the insulating layer. The top and bottom copper layer pattern(306) having the circuit pattern(304) are formed by patterning top and bottom copper layer. The via hole is formed so that circuit patterns be electrically connected to top and bottom copper layer pattern. The top and bottom photo solder resist plate(308) are formed in the top and bottom of insulating layer except for the top and bottom copper layer patterns and circuit patterns. The metal layer(310) having the predetermined thickness is formed on only the top and bottom copper layer pattern.

Description

Method of forming printed circuit board {Method of forming Printed Cirucit Board}

1A to 1B are a plan view and a cross-sectional view for explaining a method of forming a printed circuit board according to the prior art.

2A to 2B are cross-sectional views illustrating a friction phenomenon in a printed circuit board during a packing process in a packing apparatus according to the prior art.

3A to 5B are plan and cross-sectional views illustrating a method of forming a printed circuit board according to the present invention.

The present invention relates to a printed circuit board (PCB) for the convenience of a camera module packaging process.

1A to 1B are plan and cross-sectional views illustrating a method of forming a printed circuit board according to the prior art.

1A to 1B, the printed circuit board 100 forms upper and lower copper layers (not shown) on the upper and lower surfaces of the insulating layer 102, and then patterns the upper and lower copper layers to form a circuit pattern. Form the field 104.

Next, a via hole (not shown) is formed to electrically connect the circuit patterns 104 formed on the upper and lower copper layers, and a filling material is filled in the via hole.

 Subsequently, a photosensitive solder resist (PSR) layer 106 is formed on the upper and lower surfaces of the insulating layer 102 except for the upper and lower circuit patterns on which the wire bonding finger and the passive element are mounted to complete the printed circuit board. do.

However, as shown in FIGS. 2A to 2B, the printed circuit board 100 may include a slot type rail 200 using friction force during the packaging process in the packaging equipment 200, or In the case of feeding the printed circuit board 100 by using a roller type rail 204, the printed circuit board 100 may be caused by friction between both sides of the printed circuit board 100 and the packaging equipment 200. ) There is a problem that electrostatic discharge (ESD) is generated due to charge accumulation on both sides.

2A to 2B are cross-sectional views illustrating a friction phenomenon in a printed circuit board during a packing process in a packing apparatus according to the prior art.

As such, the semiconductor chip of the printed circuit board 100 may be damaged due to static electricity generated on both sides of the printed circuit board 100, thereby causing an electrical defect.

An object of the present invention is to provide a printed circuit board forming method that can prevent the static electricity of the printed circuit board during the printed circuit board packaging process in the packaging equipment.

A feature of the present invention is to form upper and lower copper layers having a predetermined thickness on upper and lower insulating layers, and pattern the upper and lower copper layers to have a predetermined length inward from edges of circuit patterns and the upper and lower copper layer slopes. Forming a top and bottom copper layer pattern having a top layer; forming a via hole to electrically connect the circuit patterns; and top and bottom photo solder resist layers on top and bottom of the insulating layer except for the top and bottom copper layer patterns and the circuit patterns. And forming a metal layer having a predetermined thickness only on the upper and lower copper layer patterns.

In the present invention, the upper and lower copper layer patterns are formed to have a length of 2 mm to 4 mm.

In the present invention, the metal layer is made of a thickness of 0.5㎛ ~ 1.5㎛.

In the present invention, the metal layer is made of gold (Au) or platinum (Pi).

In the present invention, the upper and lower copper layers have a thickness of 17 μm to 19 μm.

In the present invention, forming a first upper and lower metal layer with a predetermined thickness only on the upper and lower copper layer patterns, and forming a second metal layer with a predetermined thickness only on the first upper and lower metal layers.

In the present invention, the first upper and lower metal layers or the second upper and lower metal layers have a thickness of 0.5 μm to 1.5 μm.

In the present invention, the first upper and lower metal layers are made of nickel (Ni), and the second upper and lower metal layers are made of gold (Au) or platinum (Pi).

Hereinafter, a method of forming a printed circuit board (PCB) according to the present invention will be described in detail with reference to the accompanying drawings.

3A to 5B are plan and cross-sectional views illustrating a method of forming a printed circuit board according to the present invention.

3A and 3B, upper and lower copper layers 302a and 302b having a predetermined thickness, for example, a thickness of 17 µm to 19 µm, are formed on the upper and lower surfaces of the insulating layer 300.

Thereafter, as shown in FIGS. 4A and 4B, the upper and lower copper layers 302 are patterned to form circuit patterns 304, and the edges of the slopes of the upper and lower copper layers 302 are also edged. The copper layer patterns 306 having a predetermined length, for example, 2 mm to 4 mm in length, are formed inward.

Here, the copper layer pattern 306 may be formed higher than the circuit patterns 304 and may be formed at the same height as the circuit patterns 304.

Next, a via hole (not shown) is formed to electrically connect the circuit patterns 304, and a filling material is filled in the via hole.

5A and 5B, the upper and lower copper layer patterns 306 are opened, and the upper and lower surfaces of the insulating layer 300 except for the circuit patterns 304 on which the wire bonding fingers and the passive elements are mounted. A photosensitive solder resist (PSR) layer 308 is formed on the substrate.

Next, the upper and lower metal layers 310 having a predetermined thickness are formed only on the upper and lower copper layer patterns 306 by electroplating to complete a printed circuit board.

Here, the upper and lower metal layers 310 are formed only on the upper and lower dummy copper layer patterns 306 after the photo solder resist layer 308 is formed, thereby forming the circuit patterns 304 from foreign substances such as metal when forming the upper and lower metal layers 310. I can protect it.

In addition, the upper and lower metal layers may be formed of gold (Au) or platinum (Pt) having a thickness of, for example, 0.5 μm to 1.5 μm.

In addition, the upper and lower nickel (Ni) layer may be formed only on the upper and lower copper layer patterns 306 by the electroplating method, and the upper and lower metal 310 layers may be formed only on the upper and lower nickel (Ni) layers.

The charge generated by the friction of the metal rails of the packaging equipment in the packaging process by the upper and lower metal layers 310 formed on the edges of the printed circuit board slope is ground (GND) of the packaging equipment. By escaping through the line, charges can be prevented from accumulating in the edge portion of the printed circuit board.

In addition, by preventing charge from accumulating on the edge portion of the printed circuit board, it is possible to prevent the semiconductor chip of the printed circuit board from being damaged by the electrostatic discharge (ESD) during the packaging process.

In addition, it is possible to prevent foreign matter or fine dust from adhering to the printed circuit board due to static electricity, thereby reducing defects such as black spots or foreign matter.

As described above, although the present invention has been described by way of limited embodiments and drawings, the present invention is not limited to the above-described embodiments, and those skilled in the art to which the present invention pertains can make various modifications and Modifications are possible. Therefore, the scope of the present invention should not be limited to the described embodiments, but should be determined not only by the claims below but also by the equivalents of the claims.

As described above, the charge generated by the friction of the metal rail of the packaging equipment in the packaging process by the upper and lower metal layers formed on the edge portion of the printed circuit board slope according to the present invention By escaping through the ground (GND) line of the equipment, it is possible to prevent the accumulation of charge on the edge portion of the printed circuit board.

By preventing charge from accumulating on the edge portion of the printed circuit board, it is possible to prevent the semiconductor chip of the printed circuit board from being damaged by the electrostatic discharge (ESD) during the packaging process.

Claims (8)

Forming upper and lower copper layers having a predetermined thickness on upper and lower insulating layers; Patterning the upper and lower copper layers to form circuit patterns and upper and lower copper layer patterns having a predetermined length inward from edges of the upper and lower copper layers; Forming a via hole to electrically connect the circuit patterns; Forming upper and lower photo solder resist layers on upper and lower surfaces of the insulating layer except for the upper and lower copper layer patterns and the circuit patterns; And forming a metal layer having a predetermined thickness only on the upper and lower copper layer patterns. The method of claim 1, The upper and lower copper layer pattern is formed with a length of 2mm ~ 4㎜ printed circuit board. The method of claim 1, The metal layer is a printed circuit board forming method consisting of a thickness of 0.5㎛ ~ 1.5㎛. The method of claim 1, The metal layer is a method of forming a printed circuit board made of gold (Au) or platinum (Pi). The method of claim 1, The upper and lower copper layer is a printed circuit board forming method of 17㎛ ~ 19㎛ thickness. The method of claim 1, Forming a first upper and lower metal layer with a predetermined thickness only on the upper and lower copper layer patterns; And forming a second metal layer with a predetermined thickness only on the first upper and lower metal layers. The method of claim 6, The first upper and lower metal layer or the second upper and lower metal layer has a thickness of 0.5㎛ ~ 1.5㎛ printed circuit board forming method. The method according to claim 6 or 7, The first upper and lower metal layer is made of nickel (Ni), and the second upper and lower metal layer is made of gold (Au) or platinum (Pi).
KR1020070100815A 2007-10-08 2007-10-08 Method of forming printed cirucit board KR20090035817A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1020070100815A KR20090035817A (en) 2007-10-08 2007-10-08 Method of forming printed cirucit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020070100815A KR20090035817A (en) 2007-10-08 2007-10-08 Method of forming printed cirucit board

Publications (1)

Publication Number Publication Date
KR20090035817A true KR20090035817A (en) 2009-04-13

Family

ID=40760960

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020070100815A KR20090035817A (en) 2007-10-08 2007-10-08 Method of forming printed cirucit board

Country Status (1)

Country Link
KR (1) KR20090035817A (en)

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