KR20090023265A - Thin-film device, method for manufacturing thin-film device, and display - Google Patents

Abstract

A thin film element and the manufacturing method and display device of the thin film element are provided to transfer the driver circuit of the thin-film display system through the transfer process of one time in the plastic substrate and to improve the yield of the flexible display device. The separation layer(120), and the basic insulation film(142) and thin film element layer(144) are formed on the substrate(100). The adhered transfer layer comprise the basic insulation film and thin film element layer. The adhered transfer layer is boned to the transfer body(180) by the bonding layer(160). The adhered transfer layer bonded to the transfer body is exfoliated in the parting layer to manufacture the thin film element(1). The thin film element layer comprises the first interconnection layer, the dielectric film, and the semiconductor layer and the second wiring layer.

Description

Thin film device, manufacturing method and display device for thin film device {THIN-FILM DEVICE, METHOD FOR MANUFACTURING THIN-FILM DEVICE, AND DISPLAY}

The present invention relates to a thin film element, a method for manufacturing the thin film element, and a display device. More specifically, the present invention relates to a display device in which an active matrix drive circuit composed of a thin film element is peeled from a substrate of a manufacturer, transferred to a second substrate, and formed.

If a thin film element such as a display device, which is conventionally formed on a rigid substrate such as glass, is formed on a light plastic substrate, there is an advantage that the weight and thickness can be reduced and it is hard to be broken even if dropped.

Patent Document 1 describes a method of transferring a thin film element created on a first substrate of a manufacturer to a second substrate through a single transfer step. When creating a display apparatus using this method, it is necessary to take out a pixel electrode or an external connection terminal to the peeling surface side.

In Patent Document 1, as shown in FIG. 33, the interlayer insulating film of the pixel electrode 1700 portion is removed to the separation layer 3100, the electrode made of ITO or aluminum is arranged, and the electrode is taken out to the peeling surface. However, in such a structure, other circuit elements such as transistors and storage capacitors cannot be disposed in the region where the pixel electrode is arranged.

In a pixel circuit of an active matrix electrophoretic display device or a liquid crystal display device, generally, a selection transistor for selecting a pixel and a storage capacitor for holding a potential of the pixel electrode are provided. In electrophoretic displays, in particular, it is desirable that the response time of the element is as long as several hundred milliseconds, and that a storage capacity as large as possible is provided. By the way, in the conventional structure, since other circuit elements cannot be provided in the area | region of a pixel electrode, it was difficult to ensure a big storage capacity. On the contrary, when it is going to ensure sufficient storage capacitance, there exists a problem that a pixel electrode becomes small, an aperture ratio falls, and display contrast falls. In addition, when trying to secure the same storage capacity, there is a problem that the higher the precision, the lower the aperture ratio. In addition, in this specification, an aperture ratio is the ratio which the pixel electrode in one pixel occupies, in other words, it points to the area ratio of the pixel electrode which contributes to the display in each pixel.

In order to solve such a problem, Patent Document 2 proposes a method of realizing the same structure on the third substrate as on the first substrate of the manufacturer by two transfer steps. In this case, since the same surface as a 1st board | substrate is obtained on a 3rd board | substrate, the drive circuit created in the manufacturing process similar to a normal thin film transistor can be formed on a plastic substrate. That is, as in the case of transferring the thin film device in one transfer process, the pixel electrode does not need to be taken out to the separation plane side, and the circuit element can be formed in a layer separate from the pixel electrode as a region in which the pixel electrode is arranged. Therefore, a sufficient accumulation capacity can be ensured without lowering the aperture ratio.

On the other hand, performing transfer twice has a problem in that the manufacturing process is long, leading to an increase in cost and a decrease in yield. Therefore, development of the transfer process of the thin film element which has the circuit function equivalent to the case where the twice transfer method was used, realizing low cost in one transfer was desired.

[Patent Document 1] Japanese Patent Application Laid-Open No. 10-125931

[Patent Document 2] Japanese Patent Application Laid-Open No. 2001-125138

This invention is made | formed in order to solve at least one part of the said subject, Comprising: It aims at providing the thin film element which can ensure an aperture ratio and a storage capacity. Another object of the present invention is to provide a method for manufacturing a thin film element having an aperture ratio and a storage capacity by one transfer step.

In addition, it is an object of the present invention to realize a flexible display device having a low cost, high yield, high precision, high resolution, and high display performance. More specifically, it is an object of the present invention to realize a pixel circuit which can be transferred to a plastic substrate in a single transfer step in a drive circuit of a thin film display device transferred to a plastic substrate, and which achieves both an aperture ratio and a storage capacity.

MEANS TO SOLVE THE PROBLEM In order to solve the said subject, the manufacturing method of the thin film element which concerns on this invention is a process of forming a separation layer on a board | substrate, the process of forming a base insulating film on a separation layer, and a thin film on a base insulating film. A step of forming an element layer, a step of joining a transfer layer composed of a base insulating film and a thin film element layer to a transfer body through an adhesive, a step of causing peeling at a layer or an interface of a separation layer, and from a substrate A thin film element manufacturing method comprising a step of detaching a transfer layer, the thin film element layer comprising: a first wiring layer in contact with a base insulating film in the lowermost layer, a dielectric film formed in contact with the other surface of the first wiring layer; A thin film device comprising: a semiconductor layer formed by being electrically insulated from the first wiring layer via a dielectric film; and a second wiring layer formed after the semiconductor layer is formed. On the bottom layer, it characterized in that the electrode is formed on the first wiring layer.

In addition, the electrode is a pixel electrode, a capacitor electrode is formed in the second wiring layer, and the capacitor electrode is opposed to the pixel electrode with a dielectric film interposed therebetween, and a capacitor is disposed between all or part of the pixel electrode and all or part of the capacitor electrode. It is preferable that it is formed.

The thin film element has a thin film transistor including a gate electrode made of a first wiring layer, a gate insulating film made of a dielectric film, a semiconductor layer, and a source / drain electrode made of a second wiring layer, and the thin film transistor constitutes this. It is preferable that each layer is an inverse stagger structure formed in order of a gate electrode, a gate insulating film, a semiconductor layer, and a source-drain electrode from a lower layer.

According to such a structure, a pixel electrode can be formed in the same wiring layer which comprises a thin film transistor, and since the wiring layer which comprises a pixel electrode is not newly provided, the cost can be reduced.

MEANS TO SOLVE THE PROBLEM In order to solve the said subject, the thin film element which concerns on this invention is a thin film element manufactured by the manufacturing method mentioned above, It is characterized by the wiring width of a gate electrode being one tenth or less of the width of a pixel electrode.

MEANS TO SOLVE THE PROBLEM In order to solve the said subject, the display apparatus which concerns on this invention is equipped with the thin film element manufactured by the manufacturing method mentioned above, and the display element layer which overlaps with the 1st wiring layer side in a thin film element, The electrophoretic layer, the common electrode, and the opposing board | substrate are laminated | stacked in this order from the 1st wiring layer side.

According to such a structure, since a pixel electrode and a display element layer contact | connect, it becomes possible to drive a current drive type display element.

In addition, the basic insulating film of the thin film element serves to reduce the leakage current between the pixel electrode and the display element. As a means for reducing the leak current, a method of forming a passivation film after forming an electrode is common, but in the present invention, a base insulating film is used as the passivation film. Since formation of a base insulating film is included in the process of thin film element formation, the effect of leak current reduction is acquired, without increasing the process of forming a passivation film newly.

Further, it is preferable to use the capacitance formed between the pixel electrode and the capacitor electrode as the storage capacitor for maintaining the voltage of the pixel electrode.

When such a configuration is applied to the pixel circuit of the active matrix display device, since one direction of the electrode forming the storage capacity also serves as the pixel electrode, the pixel circuit can be configured by effectively utilizing the area held by one pixel. have. Therefore, a display device with high precision and high aperture ratio (here, the ratio of the actual pixel electrode to the pixel size) can be realized.

Moreover, it is preferable that the film thickness of a base insulating film is one tenth or less of the thickness of the electrophoretic layer in a display element layer.

MEANS TO SOLVE THE PROBLEM In order to solve the said subject, the manufacturing method of the thin film element which concerns on this invention is a process of forming a isolation layer on a board | substrate, the process of forming a base insulation film on a isolation layer, and the process of forming a thin film element layer on a base insulation film; Bonding a transfer layer composed of a base insulating film and a thin film element layer to a transfer body through an adhesive, causing a separation in a layer or an interface of a separation layer, and removing a transfer layer from a substrate. A manufacturing method of a thin film element comprising, the manufacturing step of the thin film element layer includes at least a step of forming a semiconductor layer on the base insulating film, a step of forming an insulating film on the semiconductor layer, and a step of forming a wiring layer on the insulating film. An electrode made of a semiconductor layer is formed to face the base insulating film.

In the thin film element layer, a top gate type thin film transistor including a source region and a drain region formed in the semiconductor layer, a gate insulating film composed of an insulating film, and a gate electrode formed in the wiring layer is formed. It is preferable that it is a connected pixel electrode.

EMBODIMENT OF THE INVENTION Hereinafter, preferable embodiment regarding the manufacturing method of the thin film element, the thin film element which concerns on this invention, a display apparatus, and a display apparatus is demonstrated.

<First Embodiment>

First, the transfer method of the thin film element which is 1st Embodiment is demonstrated using FIGS.

As shown in FIG. 1, a separation layer 120 is formed on the substrate 100. Hereinafter, the substrate 100 and the separation layer 120 will be described.

(1) [Description of Substrate 100]

It is preferable that the board | substrate 100 has a light transmittance which can permeate | transmit light. In this case, the light transmittance is preferably 10% or more, and more preferably 50% or more. If this transmittance is too low, the attenuation (loss) of the light becomes large, and a larger amount of light is required to peel off the separation layer 120.

Moreover, it is preferable that the board | substrate 100 is comprised with the material with high reliability, and it is especially preferable that it is comprised with the material excellent in heat resistance. The reason for this is that, for example, when forming the transfer layer 140 or the base insulating film 142 (FIG. 2) to be described later, the process temperature increases depending on the type and formation method (for example, 350 to 1000 ° C). However, even in that case, when the substrate 100 is excellent in heat resistance, when the formation of the transfer layer 140 or the like on the substrate 100, the width of setting the film forming conditions such as the temperature conditions is wide. For losing.

Therefore, when the maximum temperature at the time of formation of the to-be-transferred layer 140 is set to Tmax, it is preferable that the board | substrate 100 is comprised from the material whose distortion point is Tmax or more. Specifically, it is preferable that a strain point is 350 degreeC or more, and, as for the structural material of the board | substrate 100, it is more preferable that it is 500 degreeC or more. As such a thing, heat resistant glass, such as quartz glass, Corning 7059, Nippon Electric Glass, Inc. OA-2, etc. are mentioned, for example.

Moreover, although the thickness of the board | substrate 100 is not specifically limited, Usually, it is preferable that it is about 0.1-5.0 mm, and it is more preferable that it is about 0.5-1.5 mm. When the thickness of the substrate 100 is too thin, a strong decrease is caused. When the thickness of the substrate 100 is too thick, attenuation of light tends to occur when the transmittance of the substrate 100 is low. In addition, when the light transmittance of the board | substrate 100 is high, the thickness may exceed the said upper limit. Moreover, it is preferable that the thickness of the board | substrate 100 is uniform so that light may be irradiated uniformly.

(2) [Description of Separation Layer 120]

The separation layer 120 has a property of absorbing light to be irradiated and causing peeling (hereinafter referred to as "layer peeling", "interface peeling") in the layer and / or the interface, and preferably By irradiation with light, the bonding force between atoms or molecules of the material constituting the separation layer 120 may be lost or reduced, that is, abrasion may occur, resulting in in-layer peeling and / or interfacial peeling.

In addition, gas may be emitted from the separation layer 120 by light irradiation, and the separation effect may be expressed. That is, the components contained in the separation layer 120 may be released as gas, and the separation layer 120 may absorb light to become a pure gas, and the vapor may be released to contribute to separation. As a composition of such a separation layer 120, what is described in following A-F is mentioned, for example.

A. Amorphous Silicon (a-Si). Hydrogen (H) may be contained in this amorphous silicon. In this case, it is preferable that it is about 2 atomic% or more, and, as for content of hydrogen (H), it is more preferable that it is about 2-20 atomic%. In this manner, when a predetermined amount of hydrogen (H) is contained, hydrogen is released by irradiation with light, and an internal pressure is generated in the separation layer 120, which becomes a force for peeling the upper and lower thin films. The content of hydrogen (H) in the amorphous silicon can be adjusted by appropriately setting the film forming conditions, for example, gas composition, gas pressure, gas atmosphere, gas flow rate, temperature, substrate temperature, input power, and the like in CVD.

B. Various oxide ceramics, dielectrics (ferroelectrics) or semiconductors such as silicon oxide or silicic acid compounds, titanium oxide or titanic acid compounds, zirconium oxide or zirconic acid compounds, lanthanum oxide or lanthanum oxide compounds.

Examples of the silicon oxide include SiO, SiO ₂ and Si ₃ O ₃ , and examples of the silicic acid compound include K ₂ SiO ₂ , Li ₂ SiO ₃ , CaSiO ₃ , ZrSiO ₄ , and Na ₂ SiO ₃ .

As the titanium oxide, TiO, Ti ₂ O _3, there may be mentioned TiO _3, as the titanate compound, for _{example, BaTiO 4, BaTiO 3, Ba} 2 TigO 20, BaTi 5 O 11, CaTiO 3, SrTiO 3, PbTiO 3 , MgTiO ₃ , ZrTiO ₂ , SnTiO ₄ , Al ₂ TiO ₅ , FeTiO ₃ .

Examples of zirconium oxide include ZrO ₂ , and examples of the zirconic acid compound include BaZrO ₃ , ZrSiO ₄ , PbZrO ₃ , MgZrO ₃ , and K ₂ ZrO ₃ .

C. Ceramics or dielectrics (ferroelectrics) such as PZT (lead zirconate titanate), PLZT, PLLZT, PBZT.

D. Nitride ceramics such as silicon nitride, aluminum nitride and titanium nitride.

E. Organic Polymer Materials. Examples of the organic polymer material include -CH-, -CO- (ketone), -CONH- (amide), -NH- (imide), -COO- (ester), -N = N- (azo), and -CH = Any thing may be used as long as it has a bond such as N— (sheep) (these bonds are cleaved by irradiation of light), particularly those having many of these bonds. In addition, the organic polymer material may have an aromatic hydrocarbon (one or two or more benzene rings or a condensed ring thereof) in the structural formula.

Specific examples of such organic polymer materials include polyethylene, polyolefin such as polypropylene, polyimide, polyamide, polyester, polymethyl methacrylate (PMMA), polyphenylene sulfide (PPS), polyether sulfone (PES), Epoxy resin etc. are mentioned.

F. Metal. As the metal, for example, metal of any one of Al, Li, Ti, Mn, In, Sn, Y, La, Ce, Nd, Pr, Gd, Sm, or an alloy containing at least one of these Can be mentioned.

In addition, although the thickness of the isolation layer 120 changes with various conditions, such as a peeling objective, the composition of the isolation layer 120, a layer structure, a formation method, etc., it is usually preferable that it is 1 nm-about 20 micrometers, It is more preferable that it is about 10 nm-2 micrometers, and it is still more preferable that it is about 40 nm-1 micrometer. If the thickness of the separation layer 120 is too small, uniformity of film formation may be impaired, resulting in uneven peeling, and if the thickness is too thick, good separation of the separation layer 120 may be achieved. In order to secure it, it is necessary to enlarge the power (light quantity) of light, and when the separation layer 120 is removed later, the operation takes time. In addition, the film thickness of the separation layer 120 is preferably as uniform as possible.

The formation method of the isolation layer 120 is not specifically limited, It selects suitably according to various conditions, such as a film composition and a film thickness. For example, CVD (including MOCVD, low pressure CVD, ECRCVD), deposition, molecular beam deposition (MB), ring, ion plating, various vapor deposition methods such as PVD, electroplating, immersion plating (dipping), electroless Various plating methods such as plating, Langmuir-Blozet (LB) method, spin coat, spray coat, coating method such as roll coat, various printing methods, transfer method, ink jet method, powder jet method and the like. You may form in combination of 2 or more of them.

For example, when the composition of the isolation layer 120 is amorphous silicon (a-Si), it is preferable to form a film by CVD, especially low pressure CVD or plasma CVD.

In the case where the separation layer 120 is made of ceramics by the sol-gel method or made of an organic polymer material, it is preferable to form the film by an application method, in particular, spin coating.

Next, as shown in FIG. 2, the transfer layer 140 is formed on the separation layer 120. The transfer layer 140 includes a base insulating film 142 formed in contact with the separation layer 120, and a thin film element layer 144. For example, a SiO ₂ film may be used for the base insulating film 142, but in addition to SiO ₂ , Si ₃ N _{4 is used.} Insulating films, such as these, can also be used. The thickness of the SiO ₂ film (base insulating film 142) is formed in the object and suitably determined according to the degree of the ability to exercise, but typically, preferably from about 10㎚~5㎛ preferably, 40㎚~1㎛ It is more preferable that it is a degree. The base insulating film 142 is formed for various purposes, and includes, for example, a protective layer, an insulating layer, a conductive layer, a light shielding layer for laser light, a barrier layer for migration prevention, which physically or chemically protects the transfer layer 140, The thing which exhibits at least one of a function as a reflection layer is mentioned. In the present invention, particularly, the basic insulating film 142 has a function of applying sufficient voltage to the display element while maintaining good insulation between the display element and the pixel electrode.

The thin film element layer 144 is a layer containing thin film elements such as TFT (thin film transistor), and is composed of a semiconductor layer such as polysilicon or amorphous silicon, a gate insulating film, a gate electrode layer, an interlayer insulating film, and a source / drain electrode layer. .

The pixel electrode 151 is formed on the lowermost layer of the thin film element layer 144. It is preferable that this pixel electrode 151 is formed in the same layer as the semiconductor layer, gate electrode layer, and source-drain electrode layer which comprise the TFT element contained in the thin film element layer 144. FIG.

In addition, the specific structural example and manufacturing method of the thin film element layer 144 are demonstrated in detail in 2nd and 3rd embodiment.

After the pixel electrode 151 is formed, an interlayer insulating film or semiconductor film as an insulating layer made of SiO ₂ , for example, is formed.

Next, the capacitor electrode 152a is formed to face each other with the pixel electrode 151 and the interlayer insulating film interposed therebetween, and the storage capacitor CS is formed between the pixel electrode 151 and the capacitor electrode 152a. At this time, the capacitor electrode 152a is preferably formed from the same wiring layer as the source / drain electrode constituting the TFT included in the thin film element layer 144.

As described above, by forming the capacitor electrode 152a so as to overlap the pixel electrode 151 via the interlayer insulating film, it is possible to form the storage capacitor while ensuring the aperture ratio, thereby ensuring the desired aperture ratio and the storage capacitor.

Next, as shown in FIG. 3, the thin film element layer 144 is bonded to the transfer member 180 via the adhesive layer 160.

As a preferable example of the adhesive agent which comprises the contact bonding layer 160, various curable adhesives, such as photocurable adhesives, such as a reaction hardening adhesive, a thermosetting adhesive, and an ultraviolet curable adhesive, and an anaerobic hardening adhesive, are mentioned. As a composition of an adhesive agent, what kind of things, such as an epoxy type, an acrylate type, and a silicone type, may be sufficient, for example. Such an adhesive layer 160 is formed by, for example, a coating method.

In the case of using a curable adhesive, for example, applying a curable adhesive on the transfer layer 140, bonding the transfer member 180 thereon, and curing the curable adhesive by a curing method according to the characteristics of the curable adhesive The adhesive layer 140 and the transfer member 180 are bonded to each other and fixed. In addition, in this specification, the expression which is a thin film device layer is also used as an expression which shows the to-be-transfer layer 140. FIG.

When the adhesive is photocurable, light is emitted from one outside of the light transmissive substrate 100 or the light transmissive transfer member 180 (or from both outside of the light transmissive substrate 100 and the transfer member 180). Investigate. As an adhesive agent, photocurable adhesive agents, such as an ultraviolet curable type, which are hard to affect a thin film device layer, are preferable.

Alternatively, the adhesive layer 160 may be formed on the transfer member 180 side, and the transfer layer 140 may be adhered thereto. In addition, for example, when the transfer member 180 itself has an adhesive function, the formation of the adhesive layer 160 may be omitted.

Although it does not specifically limit as the transfer body 180, A board | substrate (plate material), especially a transparent substrate are mentioned. In addition, such a board | substrate may be a flat plate or a curved board. In addition, the transfer member 180 may be inferior in characteristics such as heat resistance and corrosion resistance to the substrate 100. The reason for this is that in the present invention, the transfer layer 140 is formed on the substrate 100 side, and then the transfer layer 140 is transferred to the transfer member 180. This is because required properties, particularly heat resistance, do not depend on temperature conditions and the like at the time of formation of the transfer layer 140.

Therefore, when the maximum temperature at the time of formation of the to-be-transferred layer 140 is set to Tmax, as a constituent material of the transfer body 180, a glass transition point Tg or a softening point below Tmax can be used. For example, the transfer member 180 may be made of a material having a glass transition point (Tg) or a softening point of preferably 800 ° C. or less, more preferably 500 ° C. or less, still more preferably 320 ° C. or less.

Moreover, although it is preferable to have some rigidity (strength) as a mechanical characteristic of the transfer body 180, what has flexibility and elasticity may be sufficient.

Examples of the constituent material of the transfer member 180 include various synthetic resins or various glass materials, and in particular, various synthetic resins and ordinary (low melting point) inexpensive glass materials are preferable.

The synthetic resin may be either a thermoplastic resin or a thermosetting resin, and for example, polyolefins such as polyethylene, polypropylene, ethylene-propene copolymer, ethylene-vinyl acetate copolymer (EVA), cyclic polyolefin, modified polyolefin, Polyvinyl chloride, polyvinylidene chloride, polystyrene, polyamide, polyimide, polyamideimide, polycarbonate, poly- (4-methylpentene-1), imomer, acrylic resin, polymethyl methacrylate, acrylic-styrene Polyesters such as copolymer (AS resin), butadiene-styrene copolymer, polio copolymer (EVOH), polyethylene terephthalate (PET), polybutylene terephthalate (PBT), polycyclohexane terephthalate (PCT), poly Ethyl, polyether ketone (PEK), polyether ether ketone (PEEK®), polyetherimide, polyacetal (POM), polyphenylene oxide, stools Polyphenylene oxides, polyarylates, aromatic polyesters (liquid crystal polymers), polydetrafluoroethylene, polyvinylidene fluoride, other fluorine resins, styrenes, polyolefins, polyvinyl chlorides, polyurethanes, fluororubbers And various thermoplastic elastomers such as chlorinated polyethylene, epoxy resins, phenol resins, urea resins, melamine resins, unsaturated polyesters, silicone resins, polyurethanes, or copolymers mainly containing these, blends, polymer alloys, and the like. It is possible to use one or two or more of these in combination (for example, as a laminate of two or more layers).

As a glass material, silicate glass (quartz glass), silicate alkali glass, soda-lime glass, kali lime glass, lead (alkali) glass, barium glass, boron silicate glass, etc. are mentioned, for example. Among these, other than silicate glass, melting | fusing point is low compared with silicate glass, shaping | molding and processing are comparatively easy, and also it is inexpensive, and it is preferable. In the case where the transfer member 180 is made of synthetic resin, the large transfer member 180 can be integrally formed, and even a complicated shape such as having a curved surface or irregularities can be easily manufactured. In addition, it is possible to enjoy various advantages that the material cost and the manufacturing cost are also low. Thus, the use of synthetic resins is advantageous for producing large and inexpensive devices (eg liquid crystal displays).

In addition, the transfer member 180 constitutes an independent device such as a liquid crystal cell, or constitutes a part of the device such as a color filter, an electrode layer, a dielectric layer, an insulating film, and a semiconductor element. It may be.

Further, the transfer member 180 may be a material such as metal, ceramics, stone, wood paper, etc., on any surface constituting an article (on the surface of the watch, on the surface of the air conditioner, on the printed board, etc.), It can also be on the surface of structures such as walls, columns, ceilings, and window glass.

In this embodiment, as shown in FIG. 3, after bonding the transfer body 180, the support substrate 220 is bonded through the temporary adhesive layer 200. Although the bonding process of the support substrate 220 may be performed, when the thin synthetic resin is used for the transfer body 180, since the handling of the process after transfer becomes difficult, the support substrate 220 is bonded to the transfer body 180 side. You can do it.

When a temporary adhesive is used for self-peeling by external factors, such as ultraviolet irradiation, for example, it can isolate easily by irradiating an ultraviolet light from the support substrate 220 side after thin film element transfer. As the temporary adhesive, in addition to self peeling by ultraviolet rays, self peeling by heating and the like can be used. The support substrate 220 is various glass materials, synthetic resins, metals, etc., and it is suitable to have a thickness of 0.5 mm or more. In addition, when peeling a board | substrate of a home appliance company by an ultraviolet-ray, it is preferable to use the material which permeate | transmits ultraviolet light well, and to produce a magnetic peeling by heat, it is preferable to use the material with high thermal conductivity.

Next, as shown in FIG. 3, light is irradiated from the back surface side of the board | substrate 100. Next, as shown in FIG. This light is irradiated to the separation layer 120 after passing through the substrate 100. As a result, in-layer peeling and / or interfacial peeling occur in the separation layer 120, and the bonding force decreases or disappears.

The principle that the in-layer peeling and / or interfacial peeling of the separation layer 120 occurs is that abrasion occurs in the constituent material of the separation layer 120, and also the release of the gas contained in the separation layer 120, It is estimated that it is due to phase change, such as melting and transpiration which arise immediately after irradiation. Here, the ablation means that the fixed material (constituent material of the separation layer 120) that absorbs the irradiation light is photochemically or thermally excited, and the bond of atoms or molecules on the surface or inside thereof is cleaved and released. Mainly, all or part of the constituent material of the separation layer 120 appears as a phenomenon in which a phase change such as melting, evaporation (vaporization) occurs. Moreover, it may become a micro foaming state by a phase change, and the bonding force may fall.

Whether the separation layer 120 causes in-layer separation, interfacial separation, or both depends on the composition of the separation layer 120 and other various factors, and as one of the factors, The conditions, such as a kind of light, wavelength, intensity | strength, and arrival depth, are mentioned.

The light to be irradiated may be any type as long as the separation layer 120 causes in-layer peeling and / or interfacial peeling, for example, X-rays, ultraviolet rays, visible light, infrared rays (heat rays), laser light, millimeter waves, microwaves. , Electron beams, radiation (α rays, β rays, γ rays) and the like. Especially, since it is easy to produce peeling (ablation) of the separation layer 120, laser light is preferable.

Examples of the laser device for generating the laser light include various gas lasers, solid state lasers (semiconductor lasers), and the like. Excimer lasers, Nd-YAG lasers, Ar lasers, and CO _{2 are provided.} Lasers, CO lasers, He-Ne lasers and the like are suitably used, and among them, excimer lasers are particularly preferred.

Since the excimer laser outputs high energy in the short wavelength region, the excimer laser can cause ablation in the separation layer 120 in a very short time, and thus hardly generate a temperature rise in the adjacent transfer member 180 or the substrate 100. In other words, the separation layer 120 can be peeled off without deterioration or damage.

In addition, when generating an ablation in the separation layer 120, when there is wavelength dependence of light, it is preferable that the wavelength of the laser beam irradiated is about 100-350 nm.

In addition, when the separation layer 120 is subjected to a phase change such as gas release, vaporization, sublimation, or the like to provide separation characteristics, the wavelength of the irradiated laser light is preferably about 350 to 1200 nm.

The energy density of the irradiated laser light, in particular, in the case of an excimer laser, is preferably about 10 to 5000 mJ / cm 2, and more preferably about 100 to 500 mJ / cm 2. The irradiation time is preferably about 1 to 1000 nsec, more preferably about 10 to 100 nsec. If the energy density is low or the irradiation time is short, sufficient ablation or the like does not occur, and if the energy density is high or the irradiation time is long, the transfer layer 140 is irradiated by the light transmitted through the separation layer 120. It may adversely affect.

It is preferable that irradiated light represented by a laser beam is irradiated so that the intensity may become uniform. The irradiation direction of the irradiation light is not limited to the direction perpendicular to the separation layer 120, but may be a direction inclined at a predetermined angle with respect to the separation layer 120.

In addition, when the area of the separation layer 120 is larger than one irradiation area of the irradiation light, the irradiation light may be irradiated to the whole area of the separation layer 120 in a plurality of times. Moreover, you may irradiate twice or more to the same location. Moreover, you may irradiate 2 or more times of irradiation light (laser light) of a different kind and a different wavelength (wavelength area) to the same area | region or a different area | region.

Next, as shown in FIG. 4, the substrate 100 is separated from the separation layer 120. In this case, the separation layer 120 may be attached onto the substrate 100. In this case, the remaining separation layer 120 is removed by a method such as washing, etching, ashing, polishing, or a combination thereof. As a result, the transfer layer 140 is transferred to the transfer member 180.

By the above-described process, the thin film element 1 is formed.

Next, as shown in FIG. 5, the display element layer 240, the common electrode 260, and the opposing substrate 280 are formed on the side of the base insulating film 142, which is a separation surface. At this time, a capacitance (insulation capacitance) Cd is formed between the pixel electrode 151 formed on the lowermost layer of the transfer layer 140 and the display element layer 240 via the base insulating film 142. As a result, good insulation between the display element layer 240 and the pixel electrode 151 can be obtained, and the leakage current flowing through the display element layer 240 can be reduced. That is, the display performance can be improved and the power consumption can be reduced.

Here, assuming that the capacitance of the display element layer 240 per pixel is Cep and the voltage applied between the common electrode 260 and the pixel electrode 151 is V, the driving voltage applied to the display element layer 240 per pixel is It can be expressed as Vep = VCd / (Cep + Cd). In other words, in order to apply a sufficient voltage for driving the display element layer 240, it is necessary to make the capacitor Cd sufficiently large with respect to the capacitor Cep. Here, by making the base insulating film 142 sufficiently thin with respect to the thickness of the display element layer 240, it can be said that the capacitance Cd is sufficiently large with respect to the capacitance Cep. Ideally, the base insulating film 142 is preferably made one tenth or less with respect to the thickness of the display element layer 240. More specifically, by setting the thickness of the SiO ₂ film corresponding to the base insulating film 142 to be sufficiently thin, about 10 nm to 5 μm, the pixel electrode 151 is applied while applying a sufficient voltage necessary for driving the display element layer 240. And good insulation between the display element layer 240 can be provided. Although the relative dielectric constant of SiO ₂ used for the base insulating film 142 is about 4, the higher the relative dielectric constant is SI ₃ N _4. Etc. (a relative dielectric constant of about 7) may be used. By doing so, better insulation between the pixel electrode 151 and the display element layer 240 can be maintained.

As the display element layer 240, a voltage driven display element such as an electrophoretic element or a liquid crystal can be used. As the common electrode 260, a transparent electrode capable of transmitting visible light, for example, an indium oxide thin film (ITO) or the like can be used. In the case of using a current driving type display element (organic EL element or current driving electrophoretic element) as the display element, the pixel electrode may be exposed by removing the base insulating film before forming the display element layer. As a method of exposing a pixel electrode, etching, ashing, polishing, etc. can be used. Further, using photolithography, only the pixel electrode portion may be exposed.

The process of forming the display element layer 240, the common electrode 260, and the counter substrate 280 need not be in this order, and the common electrode 260 and the display element layer 240 are previously formed on a resin substrate such as a PET film. The laminated sheet may be bonded to the transfer member. For example, as shown in FIG. 6, the microcapsule 242 in which the electrophoretic material is encapsulated may be coated on the PET film 282 having ITO on the separation surface of the transfer layer 140. .

In the case where the support substrate 220 is bonded to the transfer member 180, after cutting or mounting the transfer member 180, the thin film element layer (for each transfer member 180) is formed from the support substrate 220. 144) is preferred. For example, as shown in FIG. 7, when using self-peeling with ultraviolet light for a temporary adhesive agent, it can isolate | separate by irradiating an ultraviolet light from the board | substrate side of a home appliance company.

Through the above steps, the display device 5 having the structure shown in FIG. 8 is formed. According to the transfer method of the thin film element of this embodiment, the thin film element 1 created on the board | substrate 100 of the creation source is transferred to the transfer body 180 in one transfer process, and the display apparatus 5 is mounted on the transfer body. It is possible to form a.

Therefore, the manufacturing method of the thin film element which ensured the aperture ratio and the storage capacity by one transfer process can be provided.

<2nd embodiment>

Next, an electrophoretic display device as a second embodiment will be described. Hereinafter, a specific circuit configuration and an example of a manufacturing process in the case where a pixel circuit or a peripheral circuit of an electrophoretic display device are formed on a substrate and are transferred to a transfer body will be described.

In 2nd Embodiment, 1 aspect of the structure of the thin film element layer containing a pixel circuit and a peripheral circuit is demonstrated more concretely than 1st Embodiment. In addition, about the structural part common to 1st Embodiment, the same number is attached | subjected and the overlapping description is abbreviate | omitted.

First, the circuit configuration will be described. 9 is a block diagram showing the configuration of the electrophoretic display device. The electrophoretic display device shown in FIG. 9 includes a plurality of scan lines 32, a scan driver 20 for sequentially selecting the scan lines 32, and a plurality of data lines provided to intersect the scan lines 32. (33), the data driver 10 for sequentially selecting the data line 33, and the pixel circuits 31 arranged at the intersections of the scan line 32 and the data line 33 and arranged in a matrix form. ), And a peripheral circuit 40 for controlling the data driver 10 and the scan driver 20.

In the present embodiment, any one of the scan driver 20, the data driver 10, the active matrix unit 30, and the peripheral circuit 40 is constituted by the thin film element 1 described above. In other words, all of the data driver 10, the scan driver 20, and the active matrix unit 30 may be integrally formed with the thin film element 1, and the components formed on the transfer member 180 individually may be It may be combined by wiring. In addition, only the active matrix part 30 may be comprised by the thin film element 1, and IC may be used for the data driver 10 and the scanning driver 20. FIG.

In the following description, the data driver 10, the scan driver 20, and the peripheral circuit 40 are collectively referred to as a peripheral circuit.

10 is a circuit diagram illustrating the detailed configuration of the pixel circuit 31. As shown in Fig. 10, the pixel circuit 31 includes an electrophoretic element 37, a storage capacitor CS for maintaining an electrical polarization state of the electrophoretic element 37, and a storage capacitor CS by performing a switching operation. And a select transistor 34 for accumulating electric charges, and an insulating capacitor Cd inserted in series with the electrophoretic element 37 and suppressing the leakage current. The scanning line 32 is connected, the data line 33 is connected to the source, and one end of each of the electrophoretic element 37 and the storage capacitor CS is connected to the drain. The low potential line 35 is connected to the other end of the storage capacitor CS.

In the following description, the selection transistors and the TFTs formed in the peripheral circuits are collectively referred to as TFTs.

Next, an example of the specific manufacturing process in the case of forming the drive circuit of an electrophoretic display apparatus by TFT of a CMOS structure on a board | substrate, and transferring this to a transfer body is demonstrated.

<Step 1>

In FIG. 11, the pixel circuit region is a region where the selection transistor 34, the storage capacitor CS (see FIG. 10), and the pixel electrode are formed. The peripheral circuit region is a region in which drive circuits such as the data driver 10 and the scan driver 20, and the peripheral circuit 40 (see FIG. 9) and the protection circuit are formed. An external connection area is an area | region in which an external connection terminal is formed. In addition, in each figure after FIG. 12, description of the pixel circuit area etc. in the figure is abbreviate | omitted, but it demonstrates as having the area similar to FIG.

First, as shown in FIG. 11, on a substrate (for example, a quartz substrate) 100, a separation layer (for example, an amorphous silicon layer formed by LPCVD) 120 and a base insulating film (for example, , SiO ₂ film) 142, and an amorphous silicon layer (for example, formed by LPCVD method) are sequentially laminated and then irradiated with laser light from the entire surface of the amorphous silicon layer from above to perform annealing. Conduct. As a result, the amorphous silicon layer is recrystallized into a polysilicon layer 143. Subsequently, the polysilicon layer 143 obtained by laser annealing is patterned to form polysilicon islands 143a, 143b, and 143c. Moreover, the polysilicon island 143a is a site | part finally used as a pixel electrode.

<Step 2>

As shown in FIG. 12, phosphorus (P) is ion-implanted at high concentration into the area | region and capacitance formation part which become an N-type TFT, for example, and a high concentration (n +) source / drain region is formed. At this time, a mask layer 171 made of polyimide or the like is formed later in the region to be a P-type TFT, but when the N-type TFT is an LDD structure, it becomes a low concentration (n-) source / drain region later. The mask layer 171 is also formed in the region (= LDD region). As a result, n + layer 144 is formed.

<Step 3>

As shown in FIG. 13, the gate insulating film 153 covering the polysilicon islands 143a and 143b is formed by, for example, the CVD method.

<Step 4>

As shown in FIG. 14, a gate electrode 252 made of polysilicon or metal is formed on the gate insulating film 153 in the pixel circuit region and the peripheral circuit region. In the same process, the capacitor electrode 152 connected to the low potential line 35 (FIG. 10) is formed on the gate insulating film 153 so as to overlap with the polysilicon island 143a (pixel electrode).

In the case where the N-type TFT has an LDD structure, for example, phosphorus (P) or the like is ion implanted at a low concentration to form a low concentration (n-) source / drain region in a self-aligned manner. Here, although the mask layer 172 is formed in the area | region used later as a P-type TFT, since the high concentration (p +) area | region is formed in a following process, the mask layer 172 may not need to be formed.

<Step 5>

As shown in FIG. 15, after forming the mask layer 173 made of polyimide so that the gate electrode 252 may be covered, ion implantation of boron (B) is performed by self-alignment, for example. As a result, the p + layer 146 is formed.

<Step 6>

As shown in Fig. 16, after the interlayer insulating film 147 is formed, a contact hole 157a and an opening portion 157b for external connection are selectively formed. In the contact hole portion, the interlayer insulating film 147 and the gate insulating film 153 are selectively etched, and the etching stops at the interface with the polysilicon layer. In the opening 157b for external connection, the interlayer insulating film 147, the gate insulating film 153, and the base insulating film 142 are selectively etched, and the etching stops at the interface with the separation layer 120.

<Step 7>

As shown in FIG. 17, the source-drain electrode 158 is formed in the contact hole 157a. In addition, a source / drain electrode 158 is formed in the opening 157b for external connection in contact with the separation layer 120. This portion becomes an external connection terminal 149 (see Fig. 20) through a subsequent transfer process.

As a result, the selection transistor 34 is formed in the pixel circuit region. The storage capacitor CS is formed by the pixel electrode 151 connected to the drain terminal of the selection transistor 34 and the capacitor electrode 152 via the gate insulating film 153.

In the peripheral circuit region, a plurality of TFTs 165 are formed. The selection transistor 34 and the plurality of TFTs 165 are top gate type (stagger type) thin film transistors.

<Step 8>

As shown in FIG. 18, the protective film 159 used as a 2nd interlayer insulation film is formed. The material of the protective film is preferably a material having high insulation and high flatness. For example, when SiO ₂ or SiNx, is preferably formed by CVD. It is preferable to form by spin coat as it is resin, such as an acryl and polyimide. Although the protective film 159 has the effect of preventing contamination such as ions from the adhesive layer or the like to the TFT layer or relieving stress from the outside, it is not necessary to form the protective film 159.

The stacked structure including the TFT from the base insulating film 142 to the protective film 159 and the external connection terminal thus formed corresponds to the transfer layer 140 in the first embodiment.

<Step 9>

As shown in FIG. 19, the adhesive layer 160 (in this embodiment, an epoxy resin is used) is formed on the protective film 159, Next, a transfer body (for example, is provided through the adhesive layer 160). For example, the soda glass substrate 180 is bonded. Subsequently, heat is applied to cure the epoxy resin to bond (bond) the transfer member 180 and the thin film element layer.

The adhesive layer 160 may be a photopolymer resin which is an ultraviolet curable adhesive. In this case, ultraviolet rays are irradiated from the transfer member 180 side rather than heat to cure the polymer.

<Step 10>

As shown in FIG. 19, Xe-Cl excimer laser beam is irradiated from the back surface of the board | substrate 100, for example. This causes delamination within the layer and / or at the interface of separation layer 120.

<Step 11>

As shown in FIG. 20, the substrate 100 is removed and the separation layer 120 is removed by etching. As a result, the TFT of the CMOS configuration is transferred to the transfer member 180. At this time, the external connection terminal 149 is shown on the separated outermost surface. In addition, the pixel electrode 151 made of polysilicon is formed in a portion of the insulating film side through the base insulating film 142.

In addition, the laminated structure including the TFT from the base insulating film 142 to the protective film 159 and the external connection terminal in FIG. 20 corresponds to the thin film element layer 144 in the first embodiment.

<Step 12>

Finally, as shown in FIG. 21, a display element layer (electrophoretic display element layer) 240 is formed on the base insulating film 142 side.

According to the second embodiment, since one of the pair of electrodes constituting the storage capacitor CS is used in combination with the pixel electrode 151, even if the pixel is made highly accurate, a large storage capacitor CS is easily secured, thereby ensuring high quality. Enable display. In particular, by arranging the capacitor electrode 152 and the pixel electrode 151 via the gate insulating film 153, the storage capacitor CS can be secured without reducing the size of the pixel electrode. In other words, the aperture ratio of the desired pixel electrode and sufficient storage capacitor CS can be ensured.

In the two-time transfer method, since electrodes such as external connection terminals and pixels need to be formed on the outermost surface side of the transfer layer (the adhesive layer 160 side in FIG. 20), the protective film 159 is usually used. After formation, a process of contact hole formation and electrode formation is applied. On the other hand, in this embodiment, since the pixel electrode 151 is formed in the separation surface side, the process of forming an electrode in the outermost surface of the protective film 159 is unnecessary. That is, as compared with the two-time transfer, the production process is shorter in both the transfer layer manufacturing process and the transfer process, thereby achieving lower cost and shorter TAT.

In addition, since the top gate type TFT of the present embodiment is easier to be miniaturized than the bottom gate type FTF in the third embodiment described later, it is possible to achieve higher precision and higher integration of the peripheral circuit than the TFT.

Third Embodiment

Next, an electrophoretic display device according to a third embodiment will be described. Hereinafter, the components common to the electrophoretic display device of the second embodiment are denoted by the same reference numerals, and redundant description thereof will be omitted.

The difference between the third embodiment and the second embodiment is that the TFTs formed in the thin film element layer are different from each other. Specifically, an inverse staggered TFT is formed in the thin film element layer of the third embodiment.

First, the basic configuration and the pixel circuit configuration of the electrophoretic display device of the present embodiment are the same as those of the second embodiment shown in FIGS. 9 and 10.

Next, the creation process of the electrophoretic display device of the present embodiment will be described.

<Step 1>

In FIG. 22, the pixel circuit region is a region where the selection transistor 34, the storage capacitor CS (see FIG. 10), and the pixel electrode 151 are formed. The peripheral circuit region is a region in which drive circuits such as the data driver 10 and the scan driver 20, the peripheral circuit 40 (see FIG. 9), and the protection circuit are formed. An external connection area is an area | region in which an external connection terminal is formed. In FIG. 23 and subsequent drawings, the description of the pixel circuit region and the like on the drawing is omitted, but the description is given as having the same region as that in FIG. 22.

First, as shown in FIG. 22, on a substrate (for example, a quartz substrate) 100, a separation layer (for example, an amorphous silicon layer formed by LPCVD method) 120, and a base insulating film 142 ( For example, a SiO ₂ film) is sequentially laminated. Next, the metal thin film 150 made of tantalum (Ta), chromium (Cr), or the like is deposited by 100 to 300 nm by physical vapor deposition. Then, the metal thin film 150 is processed into the gate electrode 252, the pixel electrode 151, and wiring by the photolithography method. In order to reduce the electrical influence which the gate electrode 252 and wiring have on the display element layer formed later, it is preferable to make these as small wiring width as possible. In particular, the wiring width of the gate electrode is set to be one tenth or less of the width of the pixel electrode. Here, the width of the pixel electrode indicates the width in the width narrow direction when viewed in plan, and specifically, a wiring width of 4 μm or less is preferable.

<Step 2>

As shown in FIG. 23, monosilane is deposited on the upper layer of the gate electrode 252 and the pixel electrode 151 by a plasma chemical vapor deposition (PECVD) method. (SiH ₄ ) and ammonia (NH ₃ ) are deposited as raw materials. The thickness of the gate insulating film 153 is about 300 nm. Subsequently, the intrinsic amorphous silicon film 154 is deposited on the gate insulating film 153 by the PECVD method with a thickness of about 50 to 150 nm using monosilane and hydrogen as raw materials. This layer later becomes the channel portion of the transistor.

<Step 3>

As shown in FIG. 24, the silicon nitride film which becomes the etching stopper 155 is deposited on the upper layer side of the gate electrode 252, and is processed to an island shape by the photolithographic method. The silicon nitride film is formed for the purpose of protecting the channel portion silicon layer when etching the n-type amorphous silicon film serving as a source / drain region later, but can be omitted.

<Step 4>

As illustrated in FIG. 25, an n-type amorphous silicon layer 156 containing about 1 × 10 ²⁰ cm ⁻³ of phosphorus is deposited on the etching stopper 155 and the intrinsic amorphous silicon film 154 by PECVD, Let it be the source / drain area.

<Step 5>

As shown in Fig. 26, the intrinsic amorphous silicon film 154 and the n-type amorphous silicon layer 156 are simultaneously processed into an island shape along the TFT shape by the photolithography method.

<Step 6>

As shown in FIG. 27, the junction between the pixel electrode 151 and the source / drain electrode 158 (see FIG. 28) and the source / drain electrode 158 for external connection are drawn out to the separation layer 120 side. In order to do this, the contact hole 157 is opened in the external connection region.

<Step 7>

As shown in FIG. 28, metal materials, such as aluminum, are deposited by sputtering method, and the source-drain electrode 158 is formed. By processing by the photolithography method, separation of the source and drain regions and wiring are formed. In addition, an external connection terminal 149 in contact with the separation layer 120 is formed in the external connection region. In the same process, the capacitor electrode 152 connected to the low potential line 35 (FIG. 10) is formed on the gate insulating film 153 so as to overlap the pixel electrode 15l.

As a result, the selection transistor 234 is formed in the pixel circuit region. The storage capacitor CS is formed by the pixel electrode 151 connected to the drain terminal of the selection transistor 234 and the capacitor electrode 152 via the gate insulating film 153.

In the peripheral circuit region, a plurality of TFTs 265 are formed. The selection transistor 234 and the plurality of TFTs 265 are bottom gate type (reverse staggered) thin film transistors.

<Step 8>

As shown in FIG. 29, a hydrogenation silicon nitride film is deposited by PECVD, and a protective film 159 is formed.

The laminated structure including the TFT from the base insulating film 142 to the protective film 159 and the external connection terminal thus formed corresponds to the transfer layer 140 in the first embodiment.

<Step 9>

As shown in FIG. 30, the transfer body 180 made of a plastic substrate and the thin film element layer are bonded to each other via the adhesive layer 160.

Next, by irradiating a laser from the substrate 100 side of the preparation source, peeling is caused at the interface between the substrate 100 and the separation layer 120 or the separation layer 120 and the base insulating film 142. As a result, as shown in FIG. 31, the thin film device (element layer) is transferred to the transfer member 180. When the separation layer 120 remains on the transfer member 180 side, it is removed by dry etching or the like. In this way, the external connection terminal 149 appears on the separated outermost surface. In addition, the pixel electrode 151 is formed of the same material as the gate electrode 252 at a portion of the separation surface via the base insulating film 142.

<Step 10>

Finally, as shown in FIG. 32, a display element layer (electrophoretic display element layer) 240 is formed on the base insulating film 142 side.

Here, the case where the TFT has a top gate structure as shown in Fig. 33 as a conventional example is considered. A TFT having a top gate structure is formed by forming a gate insulating film and a gate electrode after forming a semiconductor layer. As a result, the TFT has a structure in which a semiconductor layer is formed below the gate electrode. After forming such a structure, a manufacturer substrate is peeled off similarly to this invention, a display element layer and a counter electrode are formed on a base insulating film, and a display apparatus is formed. At this time, when the display element layer is viewed from the channel region of the TFT, the counter electrode is present through the base insulating film and the display element layer in order. Here, if any potential is supplied to the counter electrode during the operation of the display device, it is in a state of giving a back gate electric field to the TFT channel, which may cause malfunction of the TFT.

On the other hand, in the structure of this embodiment, since the gate electrode 252 exists between the channel of a TFT and a counter electrode, the influence which a counter electrode potential has on the channel of a TFT can be reduced. That is, when the one-time transfer method is applied, the counter electrode potential after the formation of the display element layer 240 is greater in TFT operation than in the case of using the top gate TFT as the thin film element 1. It can reduce the effect on.

In comparison with the case of using the two-time transfer method, in the two-time transfer method, electrodes such as external connection terminals and pixels are formed on the outermost surface side of the transfer layer 140 (the adhesive layer 160 in FIG. 31). Therefore, normally, after forming the protective film 159, a process of forming a contact hole and forming an electrode such as, for example, ITO, etc. is performed in the present embodiment, in the gate electrode layer or the source / drain electrode layer. Since the electrode is formed on the separation surface side, it is not necessary to form the electrode on the outermost surface of the transfer layer 140. That is, the process is less than that of the two-time transfer method, so that the process of creating the transfer layer 140 is reduced. Cost reduction is also realized.

In addition, according to the manufacturing process of the bottom gate type TFT of this embodiment, a thin film element layer can be formed by a simple manufacturing method with fewer masks than the manufacturing process of the top gate type FTF in 2nd Embodiment.

1 is a cross-sectional view when a separation layer is formed on a substrate.

2 is a cross-sectional view when a transfer layer is formed on a substrate.

3 is a schematic view of a process of separating a substrate and a transfer object.

4 is a schematic diagram showing a state in which the substrate and the transfer layer are separated.

5 is a cross-sectional view of the electrophoretic display element layer formed on the transfer layer.

Fig. 6 is a cross-sectional view in which a microcapsule type electrophoretic display element layer is formed on a transfer layer.

7 is a schematic view of a step of separating a support substrate from a transfer layer.

8 is a cross-sectional view of an electrophoretic display device.

9 is a circuit block diagram of an electrophoretic display device.

10 is a pixel circuit of an electrophoretic display device.

11 is a cross-sectional view of the substrate for explaining a separation layer formation to a gate electrode formation step according to the second embodiment.

12 is a cross-sectional view of the substrate for explaining a gate insulating film formation to intrinsic amorphous silicon film formation process according to the second embodiment.

13 is a cross-sectional view of a substrate for explaining an etching stopper forming step according to a second embodiment.

14 is a cross-sectional view of a substrate for explaining an n-type intrinsic amorphous silicon layer forming process according to a second embodiment.

15 is a cross-sectional view of the substrate for explaining an amorphous silicon layer etching step according to the second embodiment.

16 is a cross-sectional view of the substrate for explaining a contact hole forming step according to the second embodiment;

17 is a cross-sectional view of the substrate for explaining a source / drain electrode film forming step according to the second embodiment.

18 is a cross-sectional view of a substrate for explaining a protective film forming step according to a second embodiment.

19 is a cross-sectional view of a substrate for explaining a transfer step according to the second embodiment.

20 is a cross-sectional view of the substrate for explaining a substrate separation step according to the second embodiment.

21 is a cross-sectional view of an electrophoretic display device according to a second embodiment.

Fig. 22 is a sectional view of the substrate for explaining a separation layer formation through gate electrode formation step according to the third embodiment.

Fig. 23 is a cross-sectional view of the substrate for explaining a gate insulative mud formation through intrinsic amorphous silicon mud formation step according to the third embodiment.

24 is a cross-sectional view of a substrate for explaining an etching stopper forming step according to a third embodiment.

25 is a cross-sectional view of a substrate for explaining an n-type intrinsic amorphous silicon layer forming process according to a third embodiment.

26 is a cross-sectional view of a substrate for explaining an amorphous silicon layer etching step according to a third embodiment.

Fig. 27 is a sectional view of the substrate for explaining a contact hole forming step according to the third embodiment.

Fig. 28 is a substrate for explaining a source / drain electrode mud forming step according to the third embodiment.

29 is a cross-sectional view of the substrate for explaining a protective film forming step according to the third embodiment.

30 is a cross-sectional view of a substrate for explaining a transfer step according to the third embodiment.

31 is a cross-sectional view of a substrate for explaining a substrate separation process according to a third embodiment.

32 is a cross-sectional view of an electrophoretic display device according to a third embodiment.

33 is a cross-sectional view of a conventional thin film element.

<Explanation of symbols for the main parts of the drawings>

1: thin film element

5: display device

34, 234: select transistor (TFT)

100: substrate

120: separation layer

140: transfer layer

142: basic insulating film

144: thin film element layer

151: pixel electrode

152a: capacitive electrode

158: source and drain electrodes

160: adhesive layer

165, 265: TFT

180: transcript

200: temporary adhesive layer

220: support substrate

240: display element layer

242: microcapsules

252: gate electrode

260: common electrode

280: opposing substrate

282: PET film

Claims (9)

Forming a separation layer on the substrate, Forming a base insulating film on the separation layer; Forming a thin film element layer on the base insulating film; Bonding a transfer layer comprising the base insulating film and the thin film element layer to a transfer member via an adhesive; Causing peeling in the layer or at the interface of the separation layer, A method of manufacturing a thin film element comprising the step of leaving the transfer layer from the substrate, The thin film element layer, A first wiring layer in contact with the base insulating film at a lowermost layer thereof; A dielectric film formed in contact with the other surface of the first wiring layer; A semiconductor layer electrically insulated from the first wiring layer via the dielectric film; A second wiring layer formed after the semiconductor layer is formed, The electrode is formed in the said 1st wiring layer in the lowest layer of the said thin film element layer, The manufacturing method of the thin film element characterized by the above-mentioned. The method of claim 1, The electrode is a pixel electrode, A capacitor electrode is formed on the second wiring layer, and the capacitor electrode faces the pixel electrode with the dielectric film interposed therebetween; A capacitor is formed between all or part of said pixel electrode and all or part of said capacitor electrode. The method of claim 2, The thin film element has a thin film transistor including a gate electrode made of the first wiring layer, a gate insulating film made of the dielectric film, a semiconductor layer, and a source / drain electrode made of the second wiring layer, The said thin film transistor has a reverse staggered structure in which each layer which comprises this is formed in the order of the said gate electrode, the said gate insulating film, the said semiconductor layer, and the said source-drain electrode from the lower layer. As a thin film element manufactured by the manufacturing method of any one of Claims 1-3, The wiring width of the said gate electrode is one tenth or less of the width of the said pixel electrode, The thin film element characterized by the above-mentioned. The thin film element manufactured by the manufacturing method of any one of Claims 1-3, And a display element layer overlapping the first wiring layer side in the thin film element, The display device layer is a display device in which an electrophoretic layer, a common electrode, and an opposing substrate are stacked in this order from the first wiring layer side. The method of claim 5, And the capacitance formed between the pixel electrode and the capacitor electrode is used as an accumulation capacitor for maintaining the voltage of the pixel electrode. The method of claim 6, The film thickness of the said base insulating film is one tenth or less of the thickness of the said electrophoretic layer in the said display element layer, The display apparatus characterized by the above-mentioned. Forming a separation layer on the substrate, Forming a base insulating film on the separation layer; Forming a thin film element layer on the base insulating film; Bonding a transfer layer comprising the base insulating film and the thin film element layer to a transfer member via an adhesive; Causing peeling in the layer or at the interface of the separation layer, A method of manufacturing a thin film element comprising the step of leaving the transfer layer from the substrate, The manufacturing process of the thin film element layer, Forming a semiconductor layer on the base insulating film; Forming an insulating film on the semiconductor layer; At least a step of forming a wiring layer on the insulating film, The electrode which consists of the said semiconductor layer is formed in the said insulating film side, The manufacturing method of the thin film element characterized by the above-mentioned. The method of claim 8, In the thin film element layer, A source region and a drain region formed in the semiconductor layer; A gate insulating film comprising the insulating film, A top gate thin film transistor including a gate electrode formed on the wiring layer is formed. The said electrode is a pixel electrode connected with the said drain region, The manufacturing method of the thin film element characterized by the above-mentioned.

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