KR20090020393A - A circuit for excluding the remain voltage of liquid crystal display - Google Patents

Abstract

A residual voltage eliminative circuit of the liquid crystal display is provided to prevent the spots on a screeen by continuously supplying the voltage having the predetermined electric potential difference between the upper and the lower part substrate. The residual voltage eliminative circuit of the liquid crystal display an upper plate(401), a lower plate(405), a liquid crystal layer(404) and a storage voltage feed port(408). The color filter layer and the common electrode are successively laminated in the upper plate. The thin film transistor is formed in the crossing point. In the crossing point, a plurality of gates and a plurality of data lines are crossed. The pixel electrode and the storage line are formed in the lower plate. The pixel region is defined as the crossing point. The liquid crystal layer is interposed between the upper and the lower part substrate. The electric potential difference is identical in the storage line. The storage voltage feed port supplies the voltage in which the polarity runs counter to each other to with the certain cycle alternately.

Description

A CIRCUIT FOR EXCLUDING THE REMAIN VOLTAGE OF LIQUID CRYSTAL DISPLAY}

The present invention relates to a technique for preventing the appearance of halo-shaped spots in a liquid crystal display, and particularly, is suitable for preventing the appearance of halo-shaped spots due to accumulation of residual voltage between upper and lower substrates during defective pixel repair in TN mode. A residual voltage removing circuit of a liquid crystal display device is provided.

In general, a liquid crystal display device arranges two substrates having electrodes formed on one side thereof so that the surfaces on which the two electrodes are formed face each other, injects a liquid crystal material between the two substrates, and then applies a voltage to the two electrodes. By moving the liquid crystal molecules by the generated electric field, the device expresses the image by the transmittance of light that varies accordingly.

Such a liquid crystal display device is largely divided into a liquid crystal panel displaying an image and a driving unit for applying a driving signal to the liquid crystal panel, wherein the liquid crystal panel includes a first and second substrates having a predetermined space and between the two substrates. It consists of a liquid crystal layer injected into.

The liquid crystal panel generally has a structure in which a liquid crystal is filled between two glass substrates or a transparent plastic substrate. A transparent electrode (common electrode, pixel electrode) is formed on the substrate so that voltage can be applied to the liquid crystal. The transparent electrode serves to control on and off by applying a voltage to the liquid crystal.

FIG. 1 is a three-dimensional view of a portion of a general liquid crystal display, and is shown centering on an active region defined as a region in which a liquid crystal is driven.

That is, the upper and lower substrates 110 and 130 face each other with a predetermined distance therebetween, and the liquid crystal layer 150 is interposed therebetween.

A plurality of gates and data lines 132 and 134 cross each other on the lower substrate 130, and a thin film transistor T is formed at the point where they cross, and the gates and data lines 132 and 134 cross each other. The pixel electrode 146 connected to the thin film transistor T is formed in the pixel region P defined.

Although not shown in the drawing, the thin film transistor T is a channel for controlling on / off of the voltage by a gate electrode receiving a gate voltage, a source and drain electrode receiving a data voltage, and a difference between the gate voltage and the data voltage. It is composed.

In addition, a color filter layer 112 and a common electrode 116 are sequentially formed below the upper substrate 110.

Although not shown in detail in the drawing, the color filter layer 112 includes a color filter for transmitting only light of a specific wavelength band and a black matrix positioned at a boundary of the color filter to block light of an image in which the arrangement of liquid crystals is not controlled. .

In addition, upper and lower polarizers 152 and 154 are disposed at each outside of the upper and lower substrates 110 and 130 to transmit only light parallel to the polarization side, and a backlight is provided as a separate light source under the lower polarizer 154. Is arranged.

The liquid crystal display device uses a substrate which has undergone an array substrate manufacturing process for forming a switching element and a pixel electrode and a color filter substrate manufacturing process for forming a color filter and a common electrode, and injects liquid crystal between the two substrates. Completed through

FIG. 2 schematically illustrates a repair process for defective pixels in a conventional liquid crystal panel. As shown in FIG. 2, a plurality of gates and data wires 202 and 201 are formed in a direction in which the liquid crystal panel crosses each other. A thin film transistor T is formed at a point where the wirings 202 and 201 intersect, and the pixel electrode 210 is formed for each pixel in connection with the thin film transistor T.

Here, the region where the gate wiring 201 and the pixel electrode 210 overlap each other forms a storage capacitor C _ST 220 with an insulator (not shown).

In the process of inspecting the liquid crystal panel, a test pattern is displayed on the screen of the liquid crystal panel and the presence or absence of a defective pixel is detected, and when a defective pixel is found, repair is performed.

In particular, when a black pattern is floated on the screen, a repair process for darkening a defective cell that appears as a bright point (a cell that is always on) due to short or poor signal is required.

In the case of normally white, as shown in FIG. 2A, since the cause of the bright spot is an operation failure of the thin film transistor T, it is not electrically connected to the pixel electrode 210, and thus charging of the pixel electrode 210 is impossible. It often occurs. In this case, the laser electrode is welded to a predetermined position of the storage capacitor unit 220 so that the gate wiring 202 and the pixel unit contact each other so that the pixel electrode 210 is always on.

In addition, as shown in FIG. 2B, in the case of normally black, since the cause of the bright spot is that the voltage is always supplied to the pixel electrode 210 due to the short circuit during the fabrication of the thin film transistor T, the shorted portion Is cut with a laser to cut off the power supply of the pixel electrode 210.

Meanwhile, FIG. 3A illustrates a principle in which bright spots are visible in a non-BDF (Bright Dot Free) structure. That is, when a thin film transistor defect occurs due to a foreign material or the like while the common voltage Vcom is being supplied to the common electrode 303 of the upper substrate 301, the corresponding pixel and the lower substrate of the upper substrate 301 are generated. A repair operation for connecting the storage line 307 of 305 is performed. In this case, since the common voltage Vcom is applied to the storage line 307 of the lower substrate 305 in the non-BDF structure, TN (TN: Twisted Nematic) makes the pixel appear bright.

The BDF structure to improve this is shown in Figure 3b. That is, when a thin film transistor defect occurs due to a foreign material or the like, the lower substrate 305 is used in the BDF structure when a repair operation is performed to connect the pixel of the upper substrate 301 to the storage line 307 of the lower substrate 305. The ground voltage GND = 0V is applied to the storage line 307 of FIG. Accordingly, darkening occurs due to a potential difference between the common voltage Vcom of the upper substrate 301 and the ground voltage GND supplied to the storage line 307 of the lower substrate 305, thereby preventing the observer from recognizing the defective pixel. .

As described above, when performing a repair operation on a bad pixel in a liquid crystal display according to the prior art, the BDF structure continuously applies a ground voltage to a storage line of a lower substrate for darkening, and thus, between the upper substrate and the storage line of the lower substrate. The residual DC voltage DC was generated due to the potential difference. As a result, there was a problem in which a halo stain appeared on the screen.

Accordingly, an object of the present invention is to prevent the accumulation of residual voltage by preventing the accumulation of residual voltage by continuously supplying a voltage having a predetermined potential difference between upper and lower substrates when repairing defective pixels in the TN mode.

The present invention for achieving the above object, the upper substrate and the color filter layer and the common electrode sequentially stacked; A plurality of gates and data wires cross each other to form a thin film transistor at an intersection thereof, and a pixel electrode connected to the thin film transistor is formed in a pixel region defined by the crossing point, and a lower storage line is formed below the pixel electrode. A substrate; A liquid crystal layer interposed between the upper and lower substrates; And a storage voltage supply unit alternately supplying voltages having the same potential difference and opposite polarities to the storage line of the lower substrate at predetermined cycles.

According to the present invention, when a voltage is supplied to a storage line of a lower substrate for darkening a defective pixel, two voltages having the same potential difference but opposite polarities are alternated at a predetermined cycle based on a common voltage supplied to a common electrode of the upper substrate. By supplying, the residual DC voltage between the common electrode of the upper substrate and the storage line of the lower substrate is periodically canceled, whereby the residual DC voltage is not generated therebetween, thereby preventing the appearance of halo on the screen. .

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 4 is a block diagram showing an embodiment of a residual voltage removing circuit of a liquid crystal display according to the present invention. As shown therein, an upper substrate on which a color filter layer 402 and a common electrode 403 are sequentially formed 401; A plurality of gates and data lines cross each other, a thin film transistor is formed at a point where they cross, and a pixel electrode 406 connected to the thin film transistor is formed in a pixel region defined as the crossing point, and the pixel electrode A lower substrate 405 having a storage line 407 formed under the 406; A liquid crystal layer 404 interposed between the upper and lower substrates 401 and 405; Under the control of the clock signal CLK, voltages having the same potential difference and opposite polarities are alternately supplied to the storage line 407 of the lower substrate 405 at predetermined cycles to suppress the generation of residual DC voltage therebetween. The storage voltage supply unit 408 is configured.

The storage voltage supply unit 408 has a terminal of the clock signal CLK connected to the base of the transistor Q1 through a resistor R1, and a power supply terminal voltage VDD is connected to the transistor Q1 through a resistor R2. Is connected to the storage line 407 of the lower substrate 405, and the emitter of the transistor Q1 is connected to the ground terminal through the resistor R3.

Detailed description for the implementation of the present invention configured as described above is as follows.

Defects occur in the switching element thin film transistors arranged on the liquid crystal panel due to foreign matters, thereby performing a repair operation for connecting the pixel of the upper substrate 401 to the storage line 407 of the lower substrate 405. .

Here, the storage line 407 is a line to which a storage capacitor for maintaining the data voltage charged in the liquid crystal capacitor (not shown) on the liquid crystal panel until the next data voltage is charged.

In this case, the BDF structure to which the present invention is applied does not continuously supply a predetermined level of voltage (eg, GND) to the storage line 407 of the lower substrate 405 as in the usual case. Based on the common voltage Vcom supplied to the common electrode 403 of the substrate 401, a power supply terminal voltage as high as ⓐ V (eg, VDD) and a ground voltage as low as -ⓐ V (eg, GND) are predetermined periods. (Ex: cycle of clock signal) Supply alternately.

In this case, the common voltage Vcom supplied to the common electrode 403 of the upper substrate 401 and the power terminal voltage VDD or the ground voltage supplied to the storage line 407 of the lower substrate 405. The darkening of the corresponding pixel is performed by the potential difference between the GNDs, and the observer does not recognize the defective pixel.

As such, when supplying a voltage to the storage line 407 of the lower substrate 405 for darkening, the potential difference is the same based on the common voltage Vcom supplied to the common electrode 403 of the upper substrate 401. Two voltages having opposite polarities, for example, the power supply terminal voltage VDD and the ground voltage GND are alternately supplied in accordance with the period of the clock signal CLK, thereby providing a common electrode 403 of the upper substrate 401. And the residual DC voltage between the storage line 407 of the lower substrate 405 are periodically canceled. Accordingly, no residual DC voltage is generated between the common voltage Vcom of the upper substrate 401 and the storage line 407 of the lower substrate 405.

As a result, when the voltage is supplied to the storage line 407 of the lower substrate 405 to darken the defective pixel, the common voltage Vcom supplied to the common electrode 403 of the upper substrate 401. By alternately supplying a power terminal voltage (VDD) and a ground voltage (GND) having the same potential difference but opposite polarities, the storage of the common electrode 403 and the lower substrate 405 of the upper substrate 401. The predetermined potential difference (| ⓐ V |) between the lines 407 is continuously maintained, thereby darkening and preventing the occurrence of the residual DC voltage at this time.

To this end, the storage voltage supply unit 408 generates the power terminal voltage VDD and the ground voltage GND as shown in FIG. 6, and supplies the same to the storage line 407 of the lower substrate 405. It will be described in detail as follows.

The clock signal CLK as shown in Fig. 6A is supplied from the control unit (or the timing controller) to the base side of the transistor Q1, whereby the transistor Q1 is turned on and off.

When the clock signal CLK is supplied 'low', the transistor Q1 is thereby turned off. Accordingly, the power supply terminal voltage VDD is supplied to the storage line 407 of the lower substrate 405 through the transistor Q1. The power terminal voltage VDD is as high as ⓐ V based on the common voltage Vcom as shown in FIG. 5.

On the contrary, when the clock signal CLK is supplied 'high', the transistor Q1 is thereby turned on. Accordingly, the ground voltage GND is supplied to the storage line 407 of the lower substrate 405 through the transistor Q1. The ground voltage GND is as low as -ⓐ V based on the common voltage Vcom as shown in FIG. 5.

As a result, the storage voltage supply unit 408 uses the transistor Q1 as a switching element, and the power terminal voltage VDD as high as ⓐ V and the ground voltage GND as low as -ⓐ V based on the common voltage Vcom. Are alternately generated in synchronization with the clock signal CLK and are output to the storage line 407 of the lower substrate 405.

1 is a three-dimensional view of a portion of a conventional liquid crystal display device.

2A and 2B are schematic views showing a repair process of defective pixels in a conventional liquid crystal panel.

3A is a longitudinal cross-sectional view of a liquid crystal panel showing a principle in which bright spots are visible in a non-BD structure;

3B is a longitudinal sectional view of a liquid crystal panel showing a BDF structure for improving the appearance of defective pixels with bright spots.

4 is a block diagram of a residual voltage removing circuit of a liquid crystal display according to the present invention;

5 is an explanatory diagram showing potentials of two voltages supplied to a common electrode of an upper substrate based on a common voltage in the present invention;

6A is a waveform diagram of a clock signal applied to the present invention.

Figure 6 (b) is a waveform diagram of the voltage supplied to the common electrode of the upper substrate in the present invention.

*** Description of the symbols for the main parts of the drawings ***

401: upper substrate 402: color filter layer

403: common electrode 404: liquid crystal layer

405: lower substrate 406: pixel electrode

407: storage line 408: storage voltage supply

Claims (5)

An upper substrate on which the color filter layer and the common electrode are sequentially stacked; A lower substrate having a plurality of gates and data lines intersecting with each other to form a thin film transistor at an intersection thereof, and a pixel electrode and a storage line formed at the pixel region defined by the intersection; A liquid crystal layer interposed between the upper and lower substrates; And a storage voltage supply unit configured to alternately supply voltages having the same potential difference and opposite polarities to the storage lines alternately at predetermined cycles. The liquid crystal display of claim 1, wherein the liquid crystal display is a liquid crystal display having a structure in which darkening occurs due to a potential difference between a common voltage of an upper substrate and a voltage supplied to a storage line of a lower substrate, thereby preventing an observer from recognizing a defective pixel. A residual voltage removing circuit of a liquid crystal display device. The method of claim 1, wherein the storage voltage supply unit comprises a transistor (Q1) for outputting the power supply terminal voltage (VDD) when turned off by the clock signal, and outputs a ground voltage (GND) when turned on Residual voltage elimination circuit of liquid crystal display device.  The residual voltage removing circuit of claim 3, wherein the clock signal is supplied from a timing controller. 2. The residual voltage removing circuit of a liquid crystal display device according to claim 1, wherein the voltages having the same potential difference and opposite polarities are a power supply terminal voltage (VDD) and a ground voltage (GND).

Images