KR20090012175A - Device for processing streams and method thereof - Google Patents

Abstract

A device for processing streams and a method thereof are provided to transmit/receive a stream effectively and stably by using a dummy insertion unit and a stream rearrangement unit. A stream rearrangement unit(110) stacks and rearranges streams. A dummy insertion unit(120) adds a dummy to the rearranged streams. An Interleaving unit performs convolutional interleaving of the stream to which the dummy is added. The stream rearrangement unit vertically stacks streams as much as a set number per a unit. The stream rearrangement unit orthogonally rotates the stacked streams. Therefore, the streams are rearranged.

Description

Device for processing streams and method

The present invention relates to a stream processing apparatus and a method thereof, and more particularly, to a stream processing apparatus and a method for interleaving a stream using a dummy.

With the development of electronic and communication technologies, digital technologies have been introduced in the broadcasting system field, and various standards for digital broadcasting have been published. Specifically, there are the ATSC VSB standard, which is an American standard, and the DVB-T standard, which is an European standard.

Among them, the ATSC VSB transmission method, which is an American standard, is based on the NTSC frequency band, and has advantages in terms of ease and economy of transceiver implementation. The ATSC VSB transmission method uses a single carrier amplitude modulated residual band (VSB), which can transmit high quality video, audio, and auxiliary data in a single 6MHz bandwidth.

Meanwhile, proposals for various digital broadcasting standards have been made to provide more advanced digital broadcasting services.

Accordingly, there is a need for developing technologies for processing streams more efficiently and stably.

SUMMARY OF THE INVENTION The present invention has been made in accordance with the above necessity, and an object of the present invention is to provide a stream processing apparatus and method for processing streams efficiently and stably and a digital broadcast receiver for receiving the processed streams accordingly. .

The stream processing apparatus according to an embodiment of the present invention includes a stream rearrangement unit for stacking and rearranging streams and a dummy insertion unit for adding a dummy to the rearranged stream.

Here, the interleaving unit may be a convolutional interleaver.

In this case, the stream rearrangement unit may stack the streams in a vertical direction by a predetermined number unit and rearrange the streams by rotating the stacked streams for each unit at right angles.

Preferably, the stream rearrangement unit may divide each of the streams of the unit into blocks having a predetermined size and perform the quadrature rotation in each block unit.

Also preferably, the dummy inserting unit may insert a dummy corresponding to the memory size of the interleaving unit into the stream rotated in units of blocks.

The stream processing apparatus may further include a dummy remover that removes the dummy from the stream output from the interleaving unit, and a burst generator that collects the stream from which the dummy is removed in burst units.

Meanwhile, according to another embodiment of the present invention, the stream rearrangement unit may arrange the streams in a horizontal direction by a predetermined first size unit and stack and rearrange the streams in a vertical direction.

In this case, the stream processing apparatus may further include an RS encoder that adds RS parity to a longitudinal end of the stream, and a CRC encoder to add a CRC value to a horizontal end of the stream to which the RS parity is added. Can be.

In addition, the dummy insertion unit may divide the stacked stream into transmission bursts of a preset second size unit and add a dummy to a transmission burst size for a stream in which one transmission burst does not occur.

Preferably, the stream input to the stream rearrangement unit may be divided into packet units to which parity is added.

On the other hand, the stream processing method according to an embodiment of the present invention, a stream rearrangement step of stacking and rearranging streams, a dummy insertion step of adding a dummy to the rearranged stream and the dummy An interleaving step of interleaving the added stream.

In this case, the interleaving step may use a convolutional interleaver.

In this case, the stream rearranging step may include stacking the streams in a vertical direction by a predetermined number unit, and rearranging the streams by vertically rotating the stacked streams.

Preferably, the rearranging the streams by orthogonally rotating the stacked unit streams may include dividing each of the unit streams into blocks having a predetermined size and performing the orthogonal rotation for each block unit. Can be.

In the dummy insertion step, a dummy corresponding to the memory size of the convolutional interleaver may be inserted into the stream rotated in the block unit.

More preferably, the present stream processing method may further include removing the dummy from the interleaved stream and collecting the stream from which the dummy is removed in bursts.

According to another embodiment of the present invention, the stream rearranging step may be rearranged by stacking the streams in a vertical direction while arranging the streams in a horizontal direction by a predetermined first size unit.

The stream processing method may further include an RS encoding step of adding RS parity to a longitudinal end of the stream and a CRC encoding step of adding a CRC value to a horizontal end of the stream to which the RS parity is added. Can be.

Meanwhile, in the dummy insertion step, the stacked stream may be divided into transmission bursts of a preset second size unit, and a dummy may be added to a stream in which one transmission burst does not occur according to a transmission burst size.

Preferably, the stream rearrangement step may rearrange streams divided into packet units to which parity is added.

Meanwhile, a digital broadcast receiver according to an embodiment of the present invention includes a tuner unit for receiving a stream, a demodulator for demodulating the received stream, an equalizer for equalizing the demodulated stream, and deinterleaving the equalized stream. It includes a deinterleaver unit. Here, the stream may be stacked and rearranged in a predetermined unit at the digital broadcast transmitter, and then a dummy may be added and processed.

Preferably, the stream may be one in which the dummy is removed after convolutional interleaving at the digital broadcast transmitter side.

More preferably, the dummy removal unit for removing the dummy added to the stream; may further include. In this case, the stream may be block interleaved at the digital broadcast transmitter, and the dummy may be added.

By using the stream processing apparatus and the method and the digital broadcast receiver according to the various embodiments as described above, it is possible to efficiently and stably transmit and receive the stream.

Hereinafter, with reference to the drawings will be described the present invention in more detail.

1 is a block diagram showing the configuration of a stream processing apparatus according to an embodiment of the present invention. According to FIG. 1, the present stream processing apparatus includes a stream rearrangement unit 110 and a dummy insertion unit 120.

The stream rearrangement unit 110 stacks and rearranges the input stream. Rearrangement may vary depending on the embodiment.

The dummy inserter 120 adds dummy to the stream rearranged by the stream rearranger 110. The dummy refers to data inserted to fit the rearranged stream so that the rearranged stream can be divided into predetermined processing units or transmission units. Arbitrary data that has no meaning in the dummy. For example, the dummy may have a preset bit value such as 0 bit or a preset byte value. Alternatively, data having any meaning may be used as a dummy. For example, when there are various types of data to be additionally transmitted, for example, additional reference signals or channel additional information, the corresponding data may be used as a dummy.

The stream rearrangement unit 110 may stack the streams in predetermined units. For example, the stream rearrangement unit 110 may arrange one packet or segment unit stream in the horizontal direction, and then arrange the next packet or segment unit stream on the next line and stack the stream in the vertical direction.

Meanwhile, an interleaving unit for interleaving may be added to the rear end of the dummy insertion unit 120 of FIG. 1.

2 is a schematic diagram illustrating a form in which an interleaving unit is added to the configuration of FIG. 1 according to an embodiment of the present invention.

As shown in FIG. 2, an interleaving unit 130 implemented as a convolutional interleaver may be provided at the rear end of the dummy insertion unit 120. Specifically, the interleaving unit 130 may be implemented as a convolutional byte interleaver type for processing the stream in bytes. The convolutional interleaver of FIG. 2 may have different branches and memory sizes according to the transmitter used.

When implemented with a convolutional byte interleaver, the interleaving unit 130 includes a plurality of shift registers of different lengths. That is, shift registers of the same size as M, 2M, ... (B-2) M, (B-1) M are sequentially arranged. The interleaving unit 130 selects each shift register sequentially so that the interleaving interval is changed.

According to FIG. 2, streams input to the interleaving unit 130 are divided into bytes and sequentially stored in a plurality of shift registers, and then sequentially output. Accordingly, byte interleaving may be performed.

For example, if the input stream is divided into a plurality of fields, and one field is composed of 312 segments or packets, the interleaving unit 130 may be implemented in a form of 52 data segments or packets.

3 to 6 are schematic diagrams for describing a stream processing process when the interleaving unit 130 is implemented as a convolutional interleaver.

According to FIG. 3, the stream rearrangement unit 110 sequentially stacks the streams in units of a predetermined number. For example, stacking may be performed in units of six packets. Each packet may be in the form of 188 bytes of data and 20 bytes of parity. The stream rearrangement unit 110 may rearrange the stream units stacked in a vertical direction by rotating them at right angles.

In this case, as shown in FIG. 3, the stream rearrangement unit 110 may divide the plurality of stacked packets back into a plurality of blocks. In this case, six packets may be divided into four blocks. As shown in FIG. 3, when one packet includes a total of 208 bytes, the stream rearrangement unit 110 may be divided into blocks of 52 bytes for each of six packets. Accordingly, as shown in FIG. 3, the plurality of packets may be divided into N blocks. For convenience of description, the blocks divided by the stream rearrangement unit 110 are divided into 1, 2, 3, 4,... N-3, N-2, N-1, and N are described.

4 illustrates a state in which the stream rearrangement unit 110 divides the stream into blocks and rotates each of the divided blocks. The stream rearrangement unit 110 may rotate N blocks 90 degrees in a clockwise direction, respectively. Accordingly, six packets (a, b, c, d, e, f) are arranged in the vertical direction as shown in FIG. The stream rearrangement unit 110 may sequentially output the rotated block as shown in FIG. 4.

Meanwhile, in FIG. 4, the N blocks rotated by the stream rearranging unit 110 are sequentially output from the first block to the N-th block. However, the blocks may be randomly output without sequentially outputting the N blocks. When outputting N blocks in a random order in the stream rearrangement unit 110, an effect of mixing more data after interleaving by the interleaving unit 130 may be expected.

5 is a schematic diagram illustrating a state of a stream in which the dummy 20 is added by the dummy insertion unit 120. According to FIG. 5, the dummy inserting unit 120 may add a dummy 20 after the data portion 10. In this case, the dummy insertion unit 120 may insert a dummy having an appropriate size in consideration of the memory size of the interleaving unit 130, that is, the interleaving size.

That is, since the interleaving unit 130 includes a plurality of shift memories, in order for the data portion 10 to be stored in the shift memory and outputted therein, a dummy corresponding thereto must be added. Accordingly, since the dummy is input to the interleaving unit 130, the data portion 10 is normally shifted and output.

6 is a schematic diagram showing a stream state after the interleaving unit 130 interleaves the stream into which the dummy 20 is inserted. Due to the interleaving performed by the interleaving unit 130, data is mixed. In this case, since the dummy 20 of FIG. 5 is output after the output of the data portion 10, the dummy 20 of FIG. 5 is located on the left side of the data 10. The dummy 20 'to the right of the data may be a dummy for previous data.

As such, since the interleaving is performed after rearranging the streams in the stream rearranging unit 110, the interleaving interval can be secured sufficiently wide. That is, when the convolutional interleaver shown in FIG. 2 is used, when memory paths such as M and 2M are selected, the interleaving interval between the same data is only about 4 bytes or 8 bytes. Thus, interleaving performance is poor.

However, as shown in FIGS. 3 to 5 in the stream rearrangement unit 110, if the stream is rearranged and interleaved by adding a dummy, an interleaving interval between the same data may be sufficiently widened. Accordingly, interleaving performance can be improved.

Meanwhile, after being interleaved with the dummy included as shown in FIG. 6, the method may further include a configuration of removing the dummy for transmission.

FIG. 7 is a block diagram illustrating an exemplary embodiment including a dummy rejection 140 and a burst generator 150 in a stream processing apparatus including the interleaving unit 130 as shown in FIG. 2.

According to FIG. 7, in the stream processing apparatus 100, the interleaving unit 130 may output a stream having the form as shown in FIG. 6 to the dummy remover 140.

The dummy remover 140 removes the dummy in the stream, and the burst generator 150 collects the stream from which the dummy is removed by the dummy remover 140 in burst units. If one unit of the stream input to the stream processing apparatus 100 is one burst, the burst generator 150 corresponds to one burst in a state in which the dummy is added and then removed for processing by the interleaving unit 130. You can gather and output streams that do.

8 is a schematic diagram illustrating a state in which the dummy is removed from the dummy removing unit 140 after being interleaved by the interleaving unit 130 of FIG. 7 and collected in burst units in the burst generating unit 150.

That is, the stream of FIG. 8 may be the final state of the stream output from the stream processing apparatus 100. According to FIG. 8, the stream has a length corresponding to the number of branches B of the convolutional interleaver in the vertical direction of the figure.

In this case, looking at the rightmost vertical line of FIG. 8, it can be seen that each packet (a, b, c, d, e, f, ...) of FIG. 5 is interleaved and arranged in a predetermined unit. For example, if a packet is looked at, it is interleaved in such a manner that one packet is divided every six intervals. As described above, if the interleaving is performed after the stream rearrangement is added, the interleaving interval can be prevented from being narrowed at the beginning of the stream in the conventional interleaving scheme. As a result, since stable stream transmission is enabled, the possibility of stream discarding, retransmission, etc. is reduced, and thus an efficient digital broadcast service can be provided.

9 is a schematic diagram showing the configuration of a stream processing apparatus according to another embodiment of the present invention. According to FIG. 9, the present stream processing apparatus further includes an RS encoder unit 160, a CRC encoder unit 170, and a burst transmitter 180 in addition to the stream rearrangement unit 110 and the dummy insertion unit 120.

The stream rearrangement unit 110 arranges the streams in the horizontal direction by the first predetermined size unit and stacks the rearrangements in the vertical direction. The shape of the rearranged stream can be seen through FIG.

According to FIG. 10, the stream 30 is arranged in the horizontal direction by the first predetermined size unit x2, and the next streams are arranged in the horizontal direction in the next line. Therefore, a plurality of streams x1 are arranged in one line. x1 may be set variously according to an embodiment. For example, it may be set to 187 bytes.

When the stream 30 is rearranged in the form as shown in FIG. 10, the RS encoder unit 160 adds the RS parity 40 to the vertical end portion. That is, the RS encoder 160 calculates the RS parity 40 in the vertical direction of the stream 30 and adds the calculated RS parity 40 in the vertical direction.

The CRC encoder 170 adds a cyclic redundancy check (CRC) value 50 in the horizontal direction with respect to the stream 30 to which the RS parity 40 is added. The CRC value 50 includes both the CRC value for stream 30 and the CRC value for RS parity 40.

As a result, a stream like the one shown in the lower part of FIG. 10 is constructed.

The configured stream is transmitted in the same manner as in FIG.

That is, FIG. 11 is a schematic diagram for explaining a processing method of a stream. According to FIG. 11, the burst transmitter 180 transmits the stream provided from the dummy inserter 120 to burst units 61, 62, 63, 64, 65, 66, 67, and 68. Here, one burst size may be set larger than the horizontal size of the stream included up to the CRC value 50. In this case, a part of the stream of the next line is included together and transmitted.

That is, bursts are transmitted as shown in the diagram on the right side of FIG. 11. Meanwhile, in the case of the last transmission burst 68 in FIG. 11, the stream does not fill all one burst unit.

The dummy insertion part 120 inserts a dummy with respect to this burst 68 so that the empty space in a burst may be filled. That is, the dummy inserting unit 120 divides the stream into transmission bursts of a preset second size unit, and adds a dummy to a transmission burst size for a stream in which one transmission burst does not occur. As a result, the burst transmission unit 180 may perform data transmission in burst units.

As shown in FIG. 10 and FIG. 11, since the RS parity 40 is calculated in the vertical direction of the stream and transmitted in the horizontal direction, the block interleaving is performed as a result. That is, the rearranged streams having the RS parity 40 and the CRC value 50 added thereto are stored in the plurality of memories in the form shown in the lower portion of FIG. 10, and then burst in the horizontal direction as shown in FIG. 11. By outputting as, block interleaving effect can be obtained.

As such, the present stream processing apparatus may be implemented in various ways.

Meanwhile, the above-described stream processing apparatuses of various configurations may be used in a digital broadcast transmitter. In addition, the stream to be processed may be a form including only existing normal data streams, or may be a stream including additional data streams that are robustly processed to error, or known data for enhancing equalization performance.

In this case, the present stream processing apparatus includes a mux unit constituting the stream, a data processing unit for robustly processing additional data streams to an error, a randomization unit performing randomization, an RS encoder performing RS encoding, a trellis encoder, The apparatus may further include various components such as a sink multiplexer for adding a field sink or a segment sink to a stream, a modulator for performing a modulation operation, and a known data inserter for adding known data to a stream with a receiver. . These components may be arranged in various forms to constitute various embodiments.

12 is a flowchart illustrating a stream processing method according to an embodiment of the present invention. According to FIG. 12, when a stream is input, a stream rearrangement is performed (S1010). The rearrangement method depends on the configuration of the interleaving unit 130. That is, when the interleaving unit 130 is formed of a convolutional interleaver, the stream may be divided into blocks of a predetermined size after being stacked, and may be rearranged by being rotated at right angles.

On the other hand, if the stream processing apparatus is configured as shown in Fig. 9, and block interleaving occurs, a dummy may be added only for some bursts.

Stacked and rearranged streams may be sequentially output to the next stage or randomly output.

Then, a dummy is added to the output stream (S1020).

As described above, the dummy serves to fill the internal memory of the interleaving unit 130 with a specific value so that the interleaving unit 130 normally interleaves the stream to be output.

Meanwhile, when a dummy is inserted after the stream rearrangement is rearranged as illustrated in FIGS. 3 to 5, a convolutional interleaving process may be performed after the dummy addition. Due to interleaving, each packet in the stream is rearranged at various intervals. In this case, the step of removing the dummy after interleaving may be further included. In addition, after removing the dummy, collecting the stream in burst units may be further included. Since this has been described in detail in the above-described portion, redundant description is omitted.

Meanwhile, when the stream processing apparatus is implemented as shown in FIG. 9, a separate interleaving step may not exist after the dummy addition. That is, in the case of the stream processing apparatus as shown in FIG. 9, the streams are stacked and rearranged to perform RS encoding and CRC encoding to reconstruct the stream. In this state, the output is made in the horizontal direction, whereby block interleaving occurs. In this process, if a burst is not completely filled with stream, RS parity, CRC value, etc., a dummy is filled for the burst.

13 is a block diagram illustrating a configuration of a digital broadcast receiver according to an embodiment of the present invention. The digital broadcast receiver of FIG. 13 may receive a stream processed by the stream processing apparatus having the configuration of FIGS. 1, 7, and 9, and a stream processed by the digital broadcast transmitter including the same. Specifically, the digital broadcast receiver may be implemented as a portable display device such as a mobile phone, a notebook, a navigation, an electronic notebook, or a display device such as a TV or a set-top box.

According to FIG. 13, the digital broadcast receiver includes a tuner 210, a demodulator 220, an equalizer 230, and a deinterleaver 240.

The tuner 210 tunes a channel to receive a stream.

The demodulator 220 demodulates the stream received by the tuner 210, and the equalizer 230 equalizes the demodulated stream.

The deinterleaver 240 deinterleaves the equalized stream to reconstruct the stream to its original state.

The stream received by the digital broadcast receiver of FIG. 13 may be a stream in which a dummy is removed after convolutional interleaving at the transmitter side. That is, it is possible to receive and process the stream as shown in FIG.

Alternatively, in the case of a stream processed in the same manner as in FIGS. 10 and 11, the stream may not be removed. When the stream in which the dummy is not removed is received, the digital broadcast receiver may further include a configuration for removing the dummy.

14 is a block diagram illustrating a configuration of a digital broadcast receiver according to another embodiment of the present invention for receiving a stream including a dummy. The digital broadcast receiver of FIG. 14 further includes a tuner 210, a demodulator 220, an equalizer 230, a dummy remover 250, and a decoder 260.

The dummy remover 250 is processed as shown in FIGS. 10 and 11 to remove the dummy from the transmitted stream without removing the dummy. That is, the digital broadcast receiver of FIG. 14 performs block interleaving on the digital broadcast transmitter side, and receives and processes a stream including a dummy.

In this case, the dummy remover 250 checks the size of the data area of the stream based on information included in the stream or information provided through a separate channel, so that the excess may be regarded as a dummy.

The decoder 260 decodes the stream in which the dummy is removed and restores the stream. In this case, the decoder 260 sequentially stacks the input stream and then processes it in a direction perpendicular to the stacking, thereby obtaining a block deinterleaving effect.

Although not shown in the digital broadcast receiver of FIG. 13 or FIG. 14, the digital broadcast receiver may further include various components such as a trellis decoder, an RS decoder, a derandomization unit, a demultiplexer, and the like.

In addition, the stream received by the digital broadcast receiver of FIG. 13 or FIG. 14 may include a normal data stream, an additional data stream robustly processed to an error, known data, and the like.

While the above has been shown and described with respect to preferred embodiments of the present invention, the present invention is not limited to the specific embodiments described above, it is usually in the technical field to which the invention belongs without departing from the spirit of the invention claimed in the claims. Various modifications can be made by those skilled in the art, and these modifications should not be individually understood from the technical spirit or the prospect of the present invention.

1 is a block diagram showing a configuration of a stream processing apparatus according to an embodiment of the present invention;

2 is a schematic diagram illustrating a configuration example in which a convolutional interleaver is included in the stream processing apparatus of FIG. 1;

3 to 6 are schematic diagrams for explaining a stream processing procedure in a stream processing apparatus using a convolutional interleaver,

7 is a block diagram illustrating an example of a detailed configuration of a stream processing apparatus of FIG. 1;

8 is a schematic diagram illustrating an example of a stream configuration in a final state in which a dummy is removed;

9 is a schematic diagram showing the configuration of a stream processing apparatus according to another embodiment of the present invention;

10 and 11 are schematic views for explaining a stream processing procedure in the stream processing apparatus of FIG.

12 is a flowchart illustrating a stream processing method according to an embodiment of the present invention;

13 and 14 are block diagrams illustrating a configuration of a digital broadcast receiver according to various embodiments of the present disclosure.

Explanation of symbols on the main parts of the drawings

110: stream rearrangement unit 120: dummy insertion unit

130: interleaving unit 140: dummy removal unit

150: burst generator 210: tuner unit

220: demodulator 230: equalizer

250: dummy removal unit 260: decoder unit

Claims (23)

A stream rearrangement unit for stacking and rearranging the streams; And, And a dummy inserter for adding a dummy to the rearranged stream. The method of claim 1, And an interleaving unit configured to convolutionally interleave the stream to which the dummy is added. The method of claim 2, The stream rearrangement unit, Stacking the stream in a vertical direction by a predetermined number of units per unit, and rearranging the streams by rotating the stacked streams for each unit at right angles. The method of claim 3, wherein The stream rearrangement unit, And classifying each of the streams for each unit into blocks having a predetermined size, and performing the quadrature rotation for each block unit. The method of claim 4, wherein The dummy insertion unit, And a dummy corresponding to the memory size of the interleaving unit is inserted into the stream rotated by the block unit. The method of claim 4, wherein A dummy removing unit removing the dummy from the stream output from the interleaving unit; And, And a burst generator for collecting the stream from which the dummy is removed in burst units. The method of claim 1, The stream rearrangement unit, And arranging the streams in a horizontal direction by a first predetermined size unit and stacking and rearranging the streams in a vertical direction. The method of claim 7, wherein An RS encoder for adding RS parity to a longitudinal end of the stream; And, And a CRC encoder for adding a CRC value to a horizontal end portion of the stream to which the RS parity has been added. The method of claim 8, The dummy insertion unit, And dividing the stacked stream into transmission bursts of a second preset unit, and adding a dummy to a transmission burst size for a stream in which one transmission burst does not occur. The method according to any one of claims 1 to 6, And streams input to the stream rearrangement unit are divided into packet units to which parity is added. A stream rearrangement step of stacking and rearranging the streams; and, A dummy insertion step of adding a dummy to the rearranged stream. The method of claim 11, And interleaving the stream to which the dummy has been added by using a convolutional interleaver. The method of claim 12, The stream rearrangement step, Stacking the stream in a vertical direction by a predetermined number of units per unit; Rearranging the streams by orthogonally rotating the stacked unit streams. The method of claim 13, Rearranging the streams by orthogonally rotating the stacked unit streams, And classifying each of the unit streams into blocks having a predetermined size, and performing the quadrature rotation in units of blocks. The method of claim 14, The dummy insertion step, And a dummy corresponding to the memory size of the convolutional interleaver is inserted into the stream rotated in the block unit. The method of claim 14, Removing the dummy from the interleaved stream; And, Collecting the stream from which the dummy is removed in burst units. The method of claim 11, The stream rearrangement step, And arranging the streams in a horizontal direction by a predetermined first size unit and stacking and rearranging the streams in a vertical direction. The method of claim 17, An RS encoding step of adding RS parity to a longitudinal end of the stream; And, And a CRC encoding step of adding a CRC value to a horizontal end portion of the stream to which the RS parity has been added. The method of claim 18, The dummy insertion step, And dividing the stacked stream into transmission bursts of a second preset unit, and adding a dummy to a transmission burst size for a stream in which one transmission burst does not occur. The method according to any one of claims 11 to 16, The stream rearrangement step, A stream processing method comprising rearranging streams divided into packet units to which parity is added. A tuner unit for receiving a stream; A demodulator for demodulating the received stream; An equalizer for equalizing the demodulated stream; And, And a deinterleaver unit for deinterleaving the equalized stream. And the stream is stacked and rearranged in a predetermined unit at a digital broadcast transmitter, and then a dummy is added and processed. The method of claim 21, And the stream is removed after the convolutional interleaving at the digital broadcast transmitter. The method of claim 21, And a dummy remover configured to remove the dummy added to the stream. Wherein the stream is block interleaved at the digital broadcast transmitter and the dummy is added.

Images