KR20080096306A - Compiling method and system for a rule-based optimal placement of scaling shifts - Google Patents

Abstract

A compiling method for optimal placement of scaling shifts and a system thereof are provided to efficiently generate codes by removing the reverse effect due to the insertion of scaling shift operation. A compiler(108) is divided into a generation means(210) and back-end(220). The generation means produces intermediate codes which are internal representation by analyzing inputted source codes(109), and the back-end produces an object code(110) from the intermediate code. The generation means comprises a lexical analysis means(211), a parsing means(212), a semantic analysis means(213), an intermediate code generation means(214). The lexical analysis means separates necessary tokens from the source code. The parsing means composes the tokens according to a given grammar. The meaning analyzing mean gives meaning to the grammar found out by the parsing means. The intermediate code generation means generates an intermediate code from the source code produced through the meaning analyzing mean. The back-end part includes a transforming means(221) and a translating means(222). The transforming means transforms the intermediate code according to a correction-writing rule, and the translating means generates an object code by selecting a proper command for the object code and assigning a register to the selected command.

Description

Compiling Method And System For A Rule-based Optimal Placement Of Scaling Shifts}

1 is a structural diagram of a hardware environment that may be used to implement a preferred embodiment of the present invention.

2 is a block diagram of a compiler in accordance with a preferred embodiment of the present invention.

Figure 3 is an embodiment of a directional acyclic graph according to the present invention.

4 is an example of various rewrite rules for modifying the pattern of a directional acyclic graph.

5 is an embodiment of a rewrite rule to modify the pattern of a directional acyclic graph in accordance with the present invention.

6 is an embodiment of a rewrite rule for modifying a pattern of a directional acyclic graph in accordance with the present invention.

7 is a graph showing the percentage reduction in execution time in one embodiment according to the present invention.

Figure 8 is a graph showing the percentage reduction in the size of the code in one embodiment according to the present invention.

The present invention relates to a compilation method and system for finding an optimal location of a scaling shift based on a rule, and more particularly to a scaling shift in an intermediate code generated from a series of programming language statements comprising source code in a fixed point manner. A compilation method and system for modifying intermediate code in accordance with a predetermined rewrite rule for modifying a pattern of a directional acyclic graph containing nodes of operation.

In order for a program written in a high-level language to run on a processor, it must be translated into a language that the processor can understand directly. A program that does this is called a compiler. For example, if the source language is a high-level language such as Pascal or Cobol, and the target language is an assembly or machine language, the program that translates it is called a compiler.

The program that is input to compile is called a source program, and the language that describes it is called a source language. The translated and output program is called an object program, and the language in which the program is described is called an object language (object language or target language).

On the other hand, there are floating point and fixed point methods for representing numbers in a computer. The floating point method refers to a method of expressing a real number divided into a real part and a mantissa part.

Most floating-point processors store floating-point values in memory using IEEE's standard format.For example, IEEE754 uses the most significant bit of all 64-bits (bit 63) for the sign and the second to 11 bits. The exponent portion is stored in (bit 62 to bit 52), and significant digits (mantissa) are stored in the remaining bits (bit 51 to bit 0).

However, while floating point calculations as above are essential and computational in most programs, the method of storing real numbers in the processor is more complicated than the method of storing integer numbers, which has the disadvantage of being very slow.

To overcome this drawback, one of the methods designed to handle floating point calculations faster is fixed point operation. Fixed point method is a numerical method that stores the integer part and the decimal part of a real number using an integer type, and is a method of calculating a real number using a variable of an integer type.

In general, a fixed point processor is less expensive than a floating point processor. As a result, bulky, cheap DSP systems prioritize low power consumption and low cost, so they usually use fixed-point processors.

However, the dynamic range and precision of processors by fixed-point methods are often very limited. Programmers spent a lot of time maintaining adequate numerical accuracy and performance within the limited dynamic range and precision. As a result, programming a fixed-point processor is a matter of programmer. It has always been a painful task.

Therefore, programmers generally adopt a floating-point processor to validate their designs and algorithms, and later switch to a fixed-point data type that is equivalent to the floating-point data type. Has been implemented.

As a first step in the process of floating-point to fixed-point conversion (FFC), programmers must find the dynamic range and precision required from each variable in the code. do.

Based on this dynamic range and precision, programmers must insert scaling shift operations in their code. An essential part of the transition from floating-point to fixed-point is determining where to put these scaling shift operations.

Determining the position of the scaling shift operation deeply affects two important factors: signal-to-quantization noise ratio (SQNR) and overflow, which are factors of the transition. Determine the numerical accuracy of the resulting code using the fixed-point method.

Thus, during the transition from floating point to fixed point, programmers use static analysis to measure the run-time value range for all variables, which will be used to obtain the correct dynamic range and precision of the variables. However, the simulation must be performed strictly.

Handling all conversions by hand is a very time-consuming and error-prone task. Experimental studies show that manual work takes up about one-third of the processor's total implementation time.

To help programmers do this less work, many researchers have developed a variety of tools, such as Autoscaler and FRIDGE, which efficiently automate the process of floating-point to fixed-point conversion. .

However, all these tools do not consider the detrimental effects of the new scaling shift operations added to fixed-point code during compiler generation.

Due to the detrimental effects of these scaling shift operations, existing compilers are unable to generate composite instructions from source code, such as multiply-add (MAC) or dot operations, which are very useful in DSP processors. There was a problem.

In order to solve the above problems, an object of the present invention is to provide a compiler and a compilation method for generating an efficient code by removing the adverse effects caused by the insertion of a scaling shift operation.

In particular, the compiler transforms the pattern of the directional acyclic graph in intermediate code, which can be represented as a directed acyclic graph (DAG) with nodes for scaling shift operations, to generate DSP-specific synthesis instructions. To improve the performance of the compiler.

To achieve the above object, the present invention provides a directed acyclic graph (DAG) including a node from a series of programming language sentences including source code by fixed-point method including scaling shift operation. Generating a intermediate code (intermediate code) that can be represented by algebraic transformation and transforming the pattern of the directional acyclic graph including nodes of the scaling shift operation and nodes of other algebraic operations An object of the present invention is to provide a compilation method including a transformation step of transforming the intermediate code according to a predetermined rewriting rule and a translation step of translating the modified intermediate code into a target code.

First, a compiler according to a preferred embodiment of the present invention will be described with reference to FIGS. 1 and 2.

1 is a structural diagram of a hardware environment that may be used to implement a preferred embodiment of the present invention. In a typical hardware environment of the present invention, the computer 100 may include a processor 101, a memory 102, a data storage 103, a data communication device 104, an input device 105, a display device 106, and the like. It may include.

The data storage device 103 may include a hard disk, a floppy disk, a CD-ROM disk drive, a USB memory, and the like, and the data communication device 104 may include a modem, a network interface, and the like. The input device 105 may include a keyboard or a mouse, and the display device 106 may include a CRT or an LCD monitor.

The memory 102 may store the operating system 107, the compiler 108, the source code 109, the object code 110, the rewrite rule 111, and the like as storage means in the computer 100.

The computer 100 operates under the control of an operating system 107 such as WINDOWS ^TM , MACINTOSH ^TM , UNIX ^TM, and the like, and the operating system 107 is operated when the computer 100 is powered on or reset. It is booted for execution in memory 102 of computer 100. The operating system 107 then controls the execution of one or more computer programs, such as the compiler 108.

Compiler 108 analyzes source code 109 that holds one or more programming statements. Source code 109 is typically stored in a text file on data storage device 103 or input from input device 105 by a programmer. The compiler generates the object code 110 using the rewrite rule 111 from the source code 109.

In the case of the present invention, the source code 109 is preferably a code written in a high-level language using a fixed point method, which is converted from a code using a floating point method using a tool such as an autoscaler or a ridge, but is not limited thereto. no.

2 is a block diagram of a compiler in accordance with a preferred embodiment of the present invention.

Compiler 108 is largely divided into a generating means 210 and a back end 220. When the source code 109 is input to the compiler 108, the generating means 210 analyzes the source code 109 to generate the intermediate code, which is an internal representation, and the back end 220 generates the object code 110 from the intermediate code. )

Generating means 210 is a front end (Lexical Analysis) means 211, Parsing means (212), Semantic Analysis means (213), Intermediate code generation (Intermediate Code) Generation means 214.

The parsing means 211 performs a task of separating necessary tokens from the source code 109. A token is a tagging of a semantic unit.

For example, "x = a + b;" Is parsed, the parsing means 211 interprets the sentence as ID ("x"), OP (ASSIGN), ID ("a"), OP (PLUS), ID ("b"), or any of SEMICOLON. It can be separated into six tokens with token names.

The parsing means 212 configures tokens separated by the parsing means 211 according to a given grammar. In other words, the parsing means 212 properly interprets the source code 109 passed through the parsing means 211 to properly position the tokens.

The semantic analysis means 213 actually gives meaning to the grammar found by the parsing means 212. For example, in "int x; float y; float z = x + y;", y and z are variables of type float, but x is a variable of type int. However, this information cannot be obtained by parsing. This is because, in the parsed state, all of x, y, and z are treated only as simple variables, symbols, or the like. The meaning analyzing means 213 processes this information.

The intermediate code generating means 214 generates the intermediate code from the source code 109 passed through the semantic analysis means 213. Intermediate code refers to code similar to assembly language or compiled information that the compiler has internally.

In general, an intermediate code in a compiler may be expressed in the form of a tree or a directed acyclic graph (DAG) including a normal node, where one node represents one instruction.

The back end 220 includes a deforming means 221 and a translation means 222.

The deforming means 221 analyzes the intermediate code generated by the generating means 210 to perform code optimization. Optimization refers to a process of applying program transformation to intermediate code in order to shorten execution time of the object code 110 in the target machine and to allow the object code 110 to occupy less storage space.

The deforming means 221 of the present invention deforms the intermediate code generated from the generating means 210 according to the rewrite rule stored in the memory 102. The rewrite rule refers to a predetermined rule that transforms the pattern of the directional acyclic graph including nodes of the scaling shift operation of the intermediate code by Algebraic Transformation.

In general, the translation means 222 in the compiler selects an instruction of the appropriate object code 110 from the intermediate code optimized by the transformation means 221 and allocates a register to generate the object code.

In the intermediate code, one node represents one instruction, but in a real target machine, two things can often be performed as one composite instruction. ) Generates efficient object code 110 including compound instructions from intermediate code according to the type of target machine.

The present invention is characterized in that the compiler 108 generates an optimized code by reconstructing a directional acyclic graph of intermediate code generated by an existing general compiler into a more preferable form through algebraic transformation.

According to the present invention, a series of rewrite rules 111 are set, and according to the set rewrite rules 111, the compiler 108 can generate a more desirable object code while being functionally equivalent to the existing object code from the intermediate code. Automatically convert the pattern of the directional acyclic graph.

Hereinafter, the phenomenon occurring due to the scaling shift operation inserted into the fixed-point code converted from the floating-point code will be described and the characteristics of the present invention will be described.

[Table 1] is a part of C language code that implements the Infinite Impulse Response (IIR) filter, which is a famous DSP filter written by a general floating point method.

w (n) = x (n)-ai1 * w (n-1)-ai2 * w (n-2) y (n) = bi0 * w (n) + bi1 * w (n-1) + bi2 * (n-2)

[Table 2] is a C-language code of the fixed point method converted from the code of [Table 1] by the autoscaler. In Table 2, we can see that a lot of scaling shift operations are inserted.

w (n) = (x (n) -multf (ai1, w (n-1)) >> 1-multf (ai2, w (n-2)) >> 2) << 3 y (n) = ( multf (bi0, w (n)) >> 1 + multf (bi1, w (n-1)) >> 2 + multf (bi2, w (n-2))) << 1

Table 3 below shows the assembly code for the ZSP400 processor, which is generated directly by the general compiler from the code in Table 2. Looking at the assembly code in Table 3, we can see that the general compiler does not take advantage of some patterns that can be easily translated from the code in Table 2 into special complex instructions in the DSP.

mul.a r4, r6; shra r0, 1; sub r2, r0; mul.a r5, r7; shra r0, 2; sub r2, r0; shla r2, 3; mul.a r2, r8; shra r0, 1; mul.b r6, r9; shra r2, 2; add r0, r2; shra r0, 1; mac.a r7, r10; shla r0, 1;

3 is an embodiment of a directed acyclic graph according to the present invention. 3 (a) is a part of a directional acyclic graph representing an intermediate code generated by a general compiler from Table 3 (310).

FIG. 3 (b) is a directional acyclic graph in which the pattern is modified from the graph 310 of FIG. 3 (a) but the function is the same as that of the graph 310 of FIG. In Fig. 3 (b), the node 321 of the multiplication operation "*" and the node 323 of the subtraction operation "-" are adjacent to each other as a result of the application of the rewrite rule according to the present invention, so that the compiler calculates the multiplication operation "*". It is possible to generate a compound instruction "mac" from the node 321 of and the node 323 of the subtraction operation "-".

Table 4 is an object code generated from an intermediate code represented by the directional acyclic graph of FIG. 3 (b). Indeed, Table 4, which is an object code generated from the intermediate code modified by the present invention, has a 20% smaller code size than Table 3 according to the existing invention.

shra r4, 1; nmac.b r4, r6; shrla r2, 2; nmac.b r5, r7; shrla r2, 1; mul.a r2, r8; shra r6, 1; mac.a r6, r9; shra r0, 2; mac.a r7, r10; shla r0, 1;

4 is a diagram illustrating examples of various rewrite rules for modifying a pattern of a directional acyclic graph, and FIG. 5 illustrates a rewrite rule for modifying a pattern of a directional acyclic graph according to the present invention. Hereinafter, the rewrite rule by the algebraic transformation of the present invention will be described.

Algebraic transformations have been used in many areas, such as compiler optimizations and high level system design. Given any directional acyclic graph, finding a method of transforming an optimized directional acyclic graph that is governed by certain conditions is a very difficult problem as is well known.

 We will apply predetermined rewrite rules to various subgraphs of the directional acyclic graph to form a stepwise optimized pattern.

There may be several different rewrite rules in one source pattern as shown in FIG. The object codes generated as a result of the application of these different rules perform the same functions as the existing object codes, but have different signal-to-quantization noise ratios and overflow effects in the output code.

Accordingly, the present invention provides a rewrite rule that excludes rules with undesirable effects by accurately predicting the effect of modifying intermediate code.

5 and 6 show rewrite rules in accordance with the present invention, each of which includes processing for nodes of a scaling shift operation.

Given a directional acyclic graph, the number of rewrite rules increases exponentially with the size of the pattern in each rule. Accordingly, the rewrite rules according to the preferred embodiment of the present invention are limited to include only nodes of two or less operators from nodes of the middle scaling shift operation as shown in FIG. 5. Because synthetic instructions are generally generated from three adjacent nodes at most in the directional acyclic graph representing the intermediate code.

As shown in FIG. 5, the algebraic operators are classified into three classes: "+" of an addition operation, "x" of a multiplication operation, and "<or >>" of a scaling shift operation. In Fig. 5, the symbol "⊙" represents an algebraic operator arbitrarily selected from "+" of an addition operation and "x" of a multiplication operation.

In FIG. 5, patterns to which the rewriting method of the present invention is applied are classified into three cases according to the relative positions of these operators. 5 (1) is applied to a case where two nodes of two scaling shift operations are adjacent to each other in a first case (510).

The rewrite rule by the algebraic transformation of FIG. 5 (1) can be proved by Equation 1 that the intermediate codes before and after the application of the rewrite rule perform functions equivalent to each other. Nodes can be safely merged without deleterious effects on signal to quantization noise ratio or overflow.

In addition, the expression B = (A << nx) >> ny can also be simplified to B = A << (nx-ny) according to the rewrite rule of FIG. 5 (1).

The second case is shown in (2.1) to (2.4) of FIG. 5, in which the node of the scaling shift operation is adjacent to the node of the "x" operator of the multiplication, and the node of the "x" operator and the "⊙" operator. Applicable when located between nodes.

If the processor has a compound instruction consisting of an "x" operation and a "⊙" operation of multiplication, the four rewrite rules of the second case according to the present invention move the node of the scaling shift operation to another position by "x". The node of the "operation" and the node of the "⊙" operation can be adjacent to each other, allowing the compiler to generate a compound instruction.

The rewrite rule of (2.1) of FIG. 5 may prove to be functionally equivalent by Equation 2. From the intermediate code modified by the rewrite rule of Fig. 5 (2.1), the translation means 222 of the present invention combines the result value of performing a scaling shift operation on A, and the " A command can be generated (521). In this case, the signal-to-quantization noise ratio does not change.

The rewrite rule of (2.2) of Figure 5 can be proved to be functionally equivalent by the equation (3). From the intermediate code modified by the rewrite rule of FIG. 5 (2.2), the translation means 222 of the present invention can generate a compound instruction from the "⊙" and multiplication operations of A, P, and Q (522). ). In this case, the signal-to-quantization noise ratio is high.

The rewrite rule of FIG. 5 (2.3) may be proved to be functionally equivalent by Equation 4. From the intermediate code modified by the rewrite rule of FIG. 5 (2.3), the translation means 222 of the present invention combines a result value of performing a scaling shift operation on B, and a "⊙" operation of A and C and a multiplication operation. A command can be generated (523). In this case, the signal-to-quantization noise ratio is lowered.

The rewrite rule of FIG. 5 (2.4) can be proved to be functionally equivalent by the equation (5). From the intermediate code modified by the rewrite rule of FIG. 5 (2.4), the translation means 222 of the present invention can generate a complex instruction from the "⊙" and multiplication operations of A, P, and Q (524). ). In this case, the signal-to-quantization noise ratio is lowered.

The third case is shown in (3.1) to (3.2) of FIG. 5 and (3.3) to (3.8) of FIG. 6, in which the node of the scaling shift operation is adjacent to the node of the "+" operator of addition. This applies if it is located between a node of the "+" operator and a node of the "⊙" operator.

If the processor has a compound instruction consisting of the "+" and "⊙" operations of the add, the eight shifting rules of the third case according to the present invention move the node of the scaling shift operation to another position by adding "+". The node of the "operation" and the node of the "⊙" operation can be adjacent to each other, allowing the compiler to generate a compound instruction.

The rewrite rule of (3.1) of Figure 5 can be proved to be functionally equivalent by the equation (6). From the intermediate code modified by the rewrite rule of (3.1) of FIG. 5, the translation means 222 of the present invention combines a result value of performing a scaling shift operation on A, and a "⊙" operation and an addition operation of P and Q. A command can be generated (531). In this case, the signal-to-quantization noise ratio is lowered.

The rewrite rule of (3.2) of Figure 5 can be proved to be functionally equivalent by the equation (7). From the intermediate code modified by the rewrite rule of (3.2) of FIG. 5, the translation means 222 of the present invention combines a result value of performing a scaling shift operation on A, and a "⊙" operation and an addition operation of P and Q. A command may be generated (532). In this case, the signal-to-quantization noise ratio does not change.

The rewrite rule of (3.3) of FIG. 6 may be proved to be functionally equivalent by Equation (8). From the intermediate code modified by the rewrite rule of FIG. 6 (3.3), the translation means 222 of the present invention can generate a complex instruction from the "⊙" and addition operations of A, P, and Q (633). ). In this case, the signal-to-quantization noise ratio does not change.

The rewrite rule of FIG. 6 (3.4) can be proved to be functionally equivalent by Equation (9). From the intermediate code modified by the rewrite rule of Fig. 6 (3.4), the translation means 222 of the present invention combines the result value of performing a scaling shift operation on A, and the "? &Quot; and addition operations of P and Q. A command can be generated (634). In this case, the signal-to-quantization noise ratio is lowered.

The rewrite rule of (3.5) of FIG. 6 can be proved to be functionally equivalent by the equation (10). From the intermediate code modified by the rewrite rule of (3.1) of FIG. 6, the translation means 222 of the present invention performs a result of performing a scaling shift operation on A, a result of performing a scaling shift operation on B, and a value of P. A complex instruction can be generated from the "⊙" operation and the addition operation (635). In this case, the signal-to-quantization noise ratio is lowered.

The rewrite rule of (3.6) of FIG. 6 can be proved to be functionally equivalent by Equation (11). From the intermediate code modified by the rewrite rule of FIG. 6 (3.1), the translation means 222 of the present invention can generate a complex instruction from the multiplication and addition operations of D, E, F, and G (636). ). In this case, the signal-to-quantization noise ratio is high.

The rewrite rule of FIG. 6 (3.7) can be proved to be functionally equivalent by Equation 12. From the intermediate code modified by the rewrite rule of (3.1) of FIG. 6, the translation means 222 of the present invention performs a complex instruction from the multiplication operation and the addition operation of D, E, and the result value of performing the scaling shift operation on B. It can be generated (637). In this case, the signal-to-quantization noise ratio is high.

The rewriting rule of FIG. 6 (3.8) can be proved to be functionally equivalent by Equation 13. From the intermediate code modified by the rewrite rule of FIG. 6 (3.8), the translation means 222 of the present invention performs a complex instruction from the multiplication operation and the addition operation of D, E and the result value of performing the scaling shift operation on B. It can be generated (638). In this case, the signal-to-quantization noise ratio is high.

The modification means 221 of the present invention determines whether the pattern of the node included in the rewrite rule 111 stored in the memory 102 is included in the directional acyclic graph of the intermediate code generated by the intermediate code generating means 214. After matching each other, the matching pattern is transformed into a functionally-equivalent directional acyclic graph by algebraic properties.

In order to reduce the complexity of pattern matching of the present invention, the deforming means 221 prioritizes according to predetermined priority criteria when two or more rewrite rules 111 can be applied to one intermediate code at the same time. It is desirable to apply the high rewrite rule first. One preferred embodiment of the priority criteria according to the present invention is as shown in the following [Table 5].

Priority Rewrite Rule Precision and computation One 636 Precision ↑, operation count ↓ 2 510 Operation count ↓ 3 522, 637, 638 Precision ↑ 4 521, 532, 633 No change 5 523, 524, 531, 634, 635 Precision ↓

In Table 5 above, priorities are assigned based on two criteria: precision and computation. The precision was evaluated by the value of the signal-to-quantization noise ratio, and the number of operations was evaluated by the number of nodes in the directional acyclic graph.

For example, both the rewrite rule 523 of FIG. 5 (2.3) and the rewrite rule 638 of FIG. 6 (3.8) can be simultaneously applied to the directional acyclic graph 310 of FIG. 3 (a). If the scaling means 221 removes the node 312 of the scaling shift operation between the node 311 of the multiplication operation and the node 313 of the subtraction operation, the translation means 222 generates a mac instruction that is a compound instruction. can do.

However, in this case, according to Table 5 above, since the priority of the rewriting rule 638 of FIG. 6 (3.8) is higher than that of the rewriting rule 523 of FIG. 5 (2.3), the deforming means 221 of FIG. We will modify the intermediate code according to the rewrite rule 638 of (3.8).

According to a preferred embodiment of the present invention, the deforming means 221 repeatedly applies the rewriting rule 111 until the rewriting rule 111 stored in the memory 102 can no longer be applied to the intermediate code.

7 is a graph showing the percentage reduction of the execution time in one embodiment according to the present invention, Figure 8 is a graph showing the percentage reduction in the size of the code in an embodiment according to the present invention. The following describes experimental results of a preferred embodiment of the present invention illustrating the efficiency of the present invention.

A preferred embodiment of the present invention is implemented in a ZSP compiler. For the experiment, two sets of executables for the ZSP400 processor were generated as benchmark code from the floating-point code provided by DSPstone.

Execution file 1, which is the first set of executable files, includes object code 110 generated by a conventional compiler from fixed-point source code 109 converted from a floating-point type code by an autoscaler.

The second set of executable files, executable file 2, is fixed-point code converted from the floating-point code by the autoscaler, and generated from the source code 109 by the compiler 108 according to the present invention. 110).

From these two sets of executables, the cycle was counted using a simulator to measure execution time, and the utility tool was used to measure the size of the code. The reduction in the execution time of the executable file and the decrease in the size of the code due to the performance improvement according to the preferred embodiment of the present invention were calculated as a percentage using Equation 14, which is shown in FIGS. 7 and 8, respectively.

Figure 7 illustrates the improvement in performance due to a reduction in the execution time of the executable file generated from the preferred embodiment of the present invention in the ZSP400 processor. Figure 6 shows that the performance is improved by up to 21.5%, average 12.7% according to the present invention.

8 shows that the code size of an executable file can be reduced by a preferred embodiment of the present invention. 8 shows that the code size is reduced to a maximum of 16.7% and an average of 10% according to the present invention.

In FIG. 7 and FIG. 8, the vertical axis represents a reduced time and a percentage of code size, and the horizontal axis represents various operations such as a convolution operation or an average calculation. This is a comparison of the performance of the executable in the operation.

The compilation method of the present invention can also be embodied in computer readable code on a computer readable recording medium. The computer-readable recording medium includes all kinds of recording devices in which data that can be read by a computer system is stored. Examples of computer-readable recording media include ROM, RAM, CD-ROM, magnetic tape, floppy disk, optical data storage, and the like, which are also implemented in the form of a carrier wave (for example, transmission over the Internet). It also includes. The computer readable recording medium can also be distributed over network coupled computer systems so that the computer readable code is stored and executed in a distributed fashion.

As described above, according to the present invention has been solved the problem that the conventional compiler could not generate a complex instruction due to the scaling shift operation inserted in the fixed-point code converted from the floating-point code for the DSP system The execution time and code size of an executable file including the object code generated from the compiler can be significantly reduced. Therefore, according to the present invention, the development and use of the DSP processor by the fixed point method will be further facilitated.

Claims (12)

Intermediate code that can be represented as a directed acyclic graph (DAG) containing nodes from a series of programming language statements that contain fixed-point source code with scaling shift operations. Generating step of generating; Transforming the intermediate code according to a predetermined rewrite rule for modifying a pattern of the directional acyclic graph including a node of the scaling shift operation and a node of another algebraic operation by algebraic transformation; And a translation step of translating the modified intermediate code into object code. The scaling rule of claim 1, wherein the rewriting rule is that if the pattern of the directional acyclic graph is a node of the scaling shift operation is adjacent to a node of another scaling shift operation, the nodes of the two scaling shift operations are one scaling shift. And modifying the pattern of the directional acyclic graph to merge into nodes of the operation. The method of claim 1, wherein the rewriting rule is a pattern of the directional acyclic graph, wherein the node of the scaling shift operation is a first node for any one of addition and multiplication, and the second node for addition and multiplication. Compiling the pattern of the directional acyclic graph so that the first node and the second node adjacent to the second node when the second node is located between the first node and the second node. The method of claim 1, wherein said modifying step is repeated until the rewrite rule can no longer be applied. The compilation method as claimed in claim 1, wherein, in the transforming step, when two or more rewrite rules can be applied, a rewrite rule having a higher priority is first applied according to a predetermined priority criterion. 6. The method of claim 5, wherein the priority criterion comprises at least one of a criterion including a value of a signal-to-quantization noise ratio (SQNR) and the number of nodes in the pattern of the directional acyclic graph. Compiling method, characterized in that including. Intermediate, which can be represented as a directed acyclic graph (DAG) containing nodes from a series of programming language statements containing source code by fixed-point method with scaling shift operations. Generating means for generating code); Storage means for storing a predetermined rewrite rule for modifying a pattern of said directional acyclic graph including a node of said scaling shift operation and a node of another algebraic operation by said algebraic transformation; Deforming means for deforming the intermediate code according to the rewrite rule stored in the storing means; Compiler comprising; translation means for translating the modified intermediate code to the object code. 8. The method of claim 7, wherein the rewriting rule is that if the pattern of the directional acyclic graph is a node of the scaling shift operation is adjacent to a node of another scaling shift operation, the nodes of the two scaling shift operations are one scaling shift. And modify the pattern of the directional acyclic graph to merge into nodes of the operation. 8. The method of claim 7, wherein the rewrite rule further comprises: a pattern of the directional acyclic graph, wherein the node of the scaling shift operation is a first node relating to any one of addition and multiplication, and a second node related to any one of addition and multiplication. Computing the pattern of the directional acyclic graph so that when the first node and the second node is adjacent to the second node and located between the first node and the second node. 8. The compiler of claim 7, wherein the modifying means first applies a rewrite rule having a higher priority in accordance with a predetermined priority criterion when two or more rewrite rules can be applied. 8. The compiler of claim 7, wherein the modifying means repeatedly modifies the intermediate code according to the rewriting rule until the rewriting rule can no longer be applied. A recording medium containing a program for realizing the compilation method according to any one of claims 1 to 6.

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