KR20080092075A - Class-d audio amplifier and signal processing method thereof - Google Patents

Abstract

A class D audio amplifier and a signal processing method thereof are provided to improve a noise characteristic curve by rejecting both high frequency and low frequency noises from an output signal. A first integrator(110) integrates a first audio signal and a first feedback signal and outputs a first integrator signal. A second integrator(120) integrates a second audio signal and a second feedback signal and outputs a second integrator signal. A synchronizing unit(405) low-pass filters the first and second integrator signals and then high-pass filters the low-pass filtered result, and outputs first and second synchronous signals. Comparators(410,420) compare the first and second synchronous signals with a reference voltage and output first and second PWM(Pulse Width Modulation) signals. Output units(430,440) amplify the first and second synchronous signals and output first and second output signals. Feedback units(450,460) generate first and second feedback signals in response to the first and second output signals, respectively.

Description

Class-D audio amplifier and signal processing method

BRIEF DESCRIPTION OF THE DRAWINGS In order to better understand the drawings cited in the detailed description of the invention, a brief description of each drawing is provided.

1 shows a partial block diagram of a conventional class D audio amplifier.

FIG. 2 shows frequency input / output characteristics of the synchronization unit shown in FIG. 1.

FIG. 3 shows the noise characteristics of the class D audio amplifier shown in FIG. 1 using fast Fourier transform.

4 is a block diagram of a class D audio amplifier according to an embodiment of the present invention.

FIG. 5 is an example of a circuit diagram of the synchronizer shown in FIG. 4.

6 is another example of a circuit diagram of the synchronizer shown in FIG. 4.

FIG. 7 illustrates frequency input / output characteristics of the synchronizer shown in FIG. 5 or FIG. 6.

FIG. 8 illustrates the noise characteristics of the class D audio amplifier shown in FIG. 4 using a fast Fourier transform.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a class D amplifier, and more particularly, to a self oscillating class D amplifier used in an audio system and a signal processing method of the self oscillating class D amplifier.

The Class-D Audio Amplifier modulates the received audio signal using a Pulse Width Modulation (PWM) scheme and transmits the modulated audio signal to the speaker.

1 shows a partial block diagram of a conventional class D audio amplifier.

Referring to FIG. 1, a self-oscillating class D audio amplifier includes a first integrator 110, a second integrator 120, and a synchronizer 130.

The first integrator 110 receives and integrates the received first audio signal VIP and the first feedback signal FS1 output from the first feedback unit (not shown) to output the first integrated signal IS1. do. The second integrator 120 receives and integrates the received second audio signal VIN and the second feedback signal FS2 output from the second feedback unit (not shown) to output the second integrated signal IS2. do.

In a class D audio amplifier, an audio signal modulated (eg, a PWM signal) includes both high frequency noise and low frequency noise. In particular, in the self-oscillating class D audio amplifier, the modulated audio signal including both the noise of the high frequency component and the noise of the low frequency component is fed back to the first integrator 110 and the second integrator 120, Noise of the high frequency component and noise of the low frequency component may cause timing jitter during the amplification process. The timing jitter may increase noise by distorting the phase of the modulated audio signal.

The class D audio amplifier includes a synchronizer 130 for outputting output signals VOP and VON whose frequency (s) are synchronized with each other. The synchronizer 130 includes a plurality of resistors 143, 145, and 147 and a capacitor 149 to implement a high pass filter.

The high pass filter high pass filters the received first integrated signal IS1 based on a cutoff frequency (eg, cf = fc) and outputs a first synchronous signal VOP. In addition, the high pass filter performs a high pass filtering on the received second integrated signal IS2 based on the cutoff frequency fc and outputs a second synchronization signal VON. Here, the first synchronization signal VOP and the second synchronization signal VON are signals whose frequencies are synchronized with each other. In addition, the cutoff frequency fc is set by the plurality of resistors 143, 145, and 147 and the capacitor 149.

2 illustrates frequency input / output characteristics of the synchronizer 130 illustrated in FIG. 1. As shown in Fig. 2, in the low frequency band, the voltage gain of the self-oscillating class D audio amplifier remains almost constant, but as the frequency increases and the frequency approaches the cutoff frequency fc, the voltage gain decreases. do. As the voltage gain decreases in the self-oscillating Class D audio amplifier, linearity of the modulated audio signal may be reduced, thereby generating noise.

However, if the frequency of the modulated audio signal falls within the audible range (eg, audio band; 20 Hz to 20 KHz) that can be heard by a human, a lot of noise may be generated, so that the frequency of the modulated audio signal is higher than the audible range. Set to band.

That is, the frequency of the modulated audio signal of the self-oscillating class D audio amplifier is set in a band higher than the cutoff frequency fc, and the synchronizer 130 modulates the modulated audio signal based on the cutoff frequency fc. The noise of the low frequency component included in can be removed.

FIG. 3 illustrates the noise characteristics of the self-oscillating class D audio amplifier shown in FIG. 1 using a Fast Fourier Transform (FFT). Fig. 3 shows the application of the respective supply voltages, e.g., 2.65 V (a), 3.6 V (b), and 5.0 V (c) to the self-oscillating class D audio amplifier in the audio band (20 Hz to 20 KHz). The noise generated by the feedback signals according to the respective power supply voltages is represented. In particular, the self-oscillating class D audio amplifier generates high frequency noise in the A portion.

The noise characteristic of the self-oscillating class D audio amplifier is described with reference to the frequency input / output characteristic of FIG. 2. The synchronizer 130 outputs each of the synchronization signals VOP and VON whose frequencies are synchronized with each other by removing noise of low frequency components included in each of the integrated signals IS1 and IS2 based on the cutoff frequency fc. do.

As shown in FIG. 3, each of the synchronization signals VOP and VON of the conventional self-oscillating class D audio amplifier includes noise of a high frequency component included in each of the integrated signals IS1 and IS2. Still includes. Therefore, there is a need for a class D audio amplifier capable of removing high frequency noise.

Accordingly, a technical problem to be achieved by the present invention is to provide a class D audio amplifier and a signal processing method of the class D audio amplifier capable of removing both low frequency noise and high frequency noise.

A semiconductor device for achieving the above technical problem includes a low pass filter and a high pass filter to output synchronization signals in which frequencies of a class D audio amplifier are synchronized with each other.

In order to achieve the above technical problem, a signal processing method of a class D audio amplifier includes a first integrated signal integrating a first audio signal and a first feedback signal, and a second integrated signal integrating a second audio signal and a second feedback signal. Receiving each low pass filtering and outputting a first low pass filtered signal and a second low pass filtered signal (a); And receiving each of the first low pass filtered signal and the second low pass filtered signal and performing high pass filtering, and outputting a first high pass filtered signal and a second high pass filtered signal whose frequencies are synchronized with each other (b). It is provided.

Wherein step (a) outputs the first low pass filtered signal and the second low pass filtered signal based on a first cutoff frequency, and step (b) includes the first high pass based on a second cutoff frequency. And outputs a filtered signal and the second high pass filtered signal, wherein the first cutoff frequency is higher than the second cutoff frequency.

The signal processing method of the class D audio amplifier may further include buffering each of the first low pass filtered signal and the second low pass filtered signal before the high pass filtering.

The class D audio amplifier includes: a first integrator for integrating a first audio signal and a first feedback signal to output a first integrated signal; A second integrator for integrating the second audio signal and the second feedback signal to output a second integrated signal; A synchronizer configured to low pass filter each of the first integrated signal and the second integrated signal, and high pass filter each of the low pass filtered signals to output a first synchronization signal and a second synchronization signal whose frequencies are synchronized with each other; A comparator for comparing the first synchronous signal and the second synchronous signal with a corresponding reference voltage and outputting a first PWM signal and a second PWM signal; An output unit configured to amplify each of the first PWM signal and the second PWM signal and output a first output signal and a second output signal; And a feedback unit configured to generate the first feedback signal and the second feedback signal in response to each of the first output signal and the second output signal.

The synchronizer may include a first low pass filter configured to low pass filter the first integrated signal to output a first low pass filtered signal; A second low pass filter configured to low pass filter the second integrated signal to output a second low pass filtered signal; And a high pass filter for high pass filtering each of the first low pass filtered signal and the second low pass filtered signal to output the first synchronous signal and the second synchronous signal.

The synchronizer may include: a first buffer configured to buffer the first low pass filtered signal connected between the first and second low pass filters and the high pass filter; The display device may further include a second buffer configured to buffer the second low pass filtered signal.

The synchronizer includes: a first low pass filter and a second low pass filter, respectively, for low pass filtering the first integrated signal and the second integrated signal based on a first cutoff frequency; And a high pass filter for high pass filtering the output signal of the first low pass filter and the output signal of the second low pass filter based on a second cutoff frequency, wherein the first cutoff frequency is the second cutoff frequency. Higher than frequency

In order to fully understand the present invention, the operational advantages of the present invention, and the objects achieved by the practice of the present invention, reference should be made to the accompanying drawings which illustrate preferred embodiments of the present invention and the contents described in the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. Like reference numerals in the drawings denote like elements.

4 illustrates a block diagram of a self oscillating class D audio amplifier according to an embodiment of the present invention. Referring to FIG. 4, the self oscillating class D audio amplifier 400 includes a first integrator 110, a second integrator 120, a synchronizer 405, a first comparator 410, and a second comparator. 420, a first output unit 430, a second output unit 440, a first feedback unit 450, and a second feedback unit 460.

The first integrator 110 receives a first audio signal VIP and a first feedback signal FS1 output from the first feedback unit 450 and integrates the received signals VIP and FS1 by integrating the received signals. The first integrated signal IS1 is output. The second integrator 120 receives a second audio signal VIN and a second feedback signal FS2 output from the second feedback unit 460 and integrates the received signals VIN and FS2 by integrating the received signals. The second integrated signal IS2 is output. The first audio signal VIP and the second audio signal VIN are differential signals or complementary signals, but are not limited thereto.

The synchronizer 405 receives the first integrated signal IS1 and the second integrated signal IS2 to perform low pass filtering and high pass filtering to synchronize the frequencies of the first synchronization signal VOP and the second. Output the synchronization signal VON. A detailed description of the synchronizer 405 will be described in detail with reference to FIG. 5.

The first comparator 410 outputs the first PWM signal by comparing the first synchronization signal VOP with the reference voltage vbias. For example, the first comparator 410 outputs a signal having a first level (eg, one of a high level and a low level) when the first synchronization signal VOP is greater than the reference voltage vbias. If the first synchronization signal VOP is less than the reference voltage vbias, a signal having a second level (eg, one of a high level and a low level) is output.

The first output unit 430 amplifies the received first PWM signal to generate a first output signal PWM_P. For example, the first output unit 430 outputs a first output signal PWM_P when the first PWM signal is the signal having the first level, and does not operate when the first PWM signal is the signal having the second level. It is possible and vice versa.

The first feedback unit 450 outputs the first feedback signal FS1 in response to the first output signal PWM_P including noise. The first feedback unit 450 compensates for the nonlinearity by removing a part of the noise included in the first output signal PWM_P, and forms a closed loop to self oscillate.

The second comparator 420 outputs the second PWM signal by comparing the second synchronization signal VON with the reference voltage vbias. Since the operation of the second comparison unit 420 is substantially the same as the operation of the first comparison unit 410, a detailed description thereof will be omitted.

The second output unit 440 amplifies the received second PWM signal to generate a second output signal PWM_N. Since the operation of the second output unit 440 is substantially the same as the operation of the first output unit 430, a detailed description thereof will be omitted.

The second feedback unit 460 outputs a second feedback signal FS2 in response to the second output signal PWM_N including noise. The second feedback unit 460 compensates for the nonlinearity by removing a part of the noise included in the second output signal PWM_N, and forms a closed loop to self oscillate.

FIG. 5 is an example of a circuit diagram of the synchronizer shown in FIG. 4. Referring to FIG. 5, the synchronizer 405 includes a first low pass filter 510, a second low pass filter 520, and a high pass filter 530.

The first low pass filter 510 includes a resistor 513 and a capacitor 515. The first low pass filter 510 low-pass filters the received first integrated signal IS1 based on a first cut-off frequency (eg, cf = fc1) and outputs a first low-pass filtered signal.

The second low pass filter 520 includes a resistor 523 and a capacitor 525. The second low pass filter 520 low pass filters the received second integrated signal IS2 based on the first cutoff frequency (eg, cf = fc1) and outputs a second low pass filtered signal.

The resistance value of the resistance 513 of the first low pass filter 510 is substantially the same as the resistance value of the resistance 523 of the second low pass filter 520, and the resistance value of the first low pass filter 510 The capacitance value of the capacitor 515 may be substantially the same as the value of the capacitor 525 of the second low pass filter 520. That is, the cutoff frequency of the first low pass filter 510 and the cutoff frequency of the second low pass filter 520 may be the same.

The first cutoff frequency fc1 is set by the resistance of the resistor 513 or 523 and the capacitance of the capacitor 515 or 525. That is, each of the low pass filters 510 and 520 removes noise of a high frequency component included in each of the first integrated signal IS1 and the second integrated signal IS2 based on the first cutoff frequency fc1. can do.

The high pass filter 530 includes a plurality of resistors 533, 535, and 537 and a capacitor 539. The high pass filter 530 performs a high pass filtering of the first low pass filtered signal received from each of the low pass filters 510 and 520 based on a second cutoff frequency (eg, cf = fc 2). Outputs the filtered signal (ie, the first synchronization signal VOP) and high-pass filtered the received second low-pass filtered signal to output the second high-pass filtered signal (ie, the second synchronization signal VON). do. The frequency (or phase) of the first synchronization signal VOP of the class D audio amplifier and the frequency (or phase) of the second synchronization signal VON may coincide with each other.

The second cutoff frequency fc2 is set by resistance values of the plurality of resistors 533, 535, and 537 and the capacitance of the capacitor 539. That is, the high pass filter 530 may remove noise of low frequency components included in each of the low pass filters 510 and 520 based on the second cutoff frequency fc2.

That is, the synchronizer 405 has an effect of removing noise of high frequency components and noise of low frequency components included in each of the first integrated signal IS1 and the second integrated signal IS2.

In addition, the synchronizer 405 is configured to pass a signal having a frequency between the first cutoff frequency fc1 and the second cutoff frequency fc2 without attenuation, respectively, of the lowpass filters 510 and 520. The cutoff frequency fc1 may be set higher than the cutoff frequency fc2 of the high pass filter 530.

6 is another example of a circuit diagram of the synchronizer shown in FIG. 4. Referring to FIG. 6, the synchronizer 405 includes a first low pass filter 510, a second low pass filter 520, a first buffer 610, a second buffer 620, and a high pass filter ( 530).

The first buffer 610 is connected between an output terminal of the first low pass filter 510 and a first input terminal of the high pass filter 530 and receives an output signal of the first low pass filter 510. To buffer.

The second buffer 620 is connected between the output terminal of the second low pass filter 520 and the second input terminal of the high pass filter 530 and receives the output signal of the second low pass filter 520. To buffer.

7 illustrates frequency input / output characteristics of the synchronizer 405 illustrated in FIG. 4. The synchronizer 405 rapidly reduces the voltage gain of the self-oscillating class D audio amplifier shown in FIG. 4 based on the first cut-off frequency fc1, thereby allowing the first integrated signal IS1 and the second integrated signal IS2. ) You can remove the noise of the high frequency components included in each. In addition, the synchronizer 405 may remove noise of low frequency components included in each of the first integrated signal IS1 and the second integrated signal IS2 based on the second cutoff frequency fc2.

 That is, the synchronizer 405 removes the noise of the high frequency component and the noise of the low frequency component included in each of the first integrated signal IS1 and the second integrated signal IS2, thereby eliminating the first cut-off frequency fc1. A signal having a frequency between the second cutoff frequencies fc2 can be passed without attenuation.

Hereinafter, noise characteristics according to embodiments of the present invention will be described with reference to FIGS. 4 to 7.

FIG. 8 illustrates the noise characteristics of the self oscillating class D audio amplifier shown in FIG. 4 using a Fast Fourier Transform (FFT). Fig. 8 shows the power supply when the power supply voltages 2.65V (d), 3.6V (e) and 5.0V (f) are applied to the self-oscillating class D audio amplifiers in the audio band (20Hz to 20KHz). It shows the noise characteristic output by the feedback signal according to the voltage.

The noise characteristic of the self-oscillating class D audio amplifier is described with reference to the frequency input / output characteristic of FIG. Each of the first and second output signals PWM_P and PWM_N output from the class D audio amplifier includes noise of a high frequency component and noise of a low frequency component. Therefore, in the class D audio amplifier, even though each of the audio signals VIP and VIN is not applied, each of the feedback signals FS1 and FS2 generated in response to each of the output signals PWM_P and PWM_N are each of the class D audio. It can be the input signal of the amplifier.

8 illustrates a noise characteristic curve of a class D audio amplifier in which noise of a high frequency component is removed by the synchronizer. The synchronizer 405 removes noise of low frequency components included in each of the integrated signals IS1 and IS2 based on the first cutoff frequency fc1. In addition, the synchronizer 405 may remove noise of a high frequency component included in each of the integrated signals IS1 and IS2 based on the second cutoff frequency fc2. Accordingly, the synchronizer 405 may remove the noise of the low frequency component and the noise of the high frequency component together or sequentially. In the portion A of FIG. 3, the noise of the high frequency component is generated, but in the portion B of FIG. 8, the noise of the high frequency component is removed.

Although the present invention has been described with reference to one embodiment shown in the drawings, this is merely exemplary, and those skilled in the art will understand that various modifications and equivalent other embodiments are possible therefrom. Therefore, the true technical protection scope of the present invention will be defined by the technical spirit of the appended claims.

As described above, the class D audio amplifier and the signal processing method of the class D audio amplifier according to the embodiment of the present invention are capable of simultaneously removing the noise of the low frequency component and the noise of the high frequency component included in each of the output signals. There is.

Claims (7)

Receives low pass filtering by receiving a first integrated signal integrating the first audio signal and the first feedback signal, and a second integrated signal integrating the second audio signal and the second feedback signal, and performing low pass filtering. (A) outputting a second low pass filtered signal; And (B) receiving the first low pass filtered signal and the second low pass filtered signal and performing high pass filtering, respectively, and outputting a first high pass filtered signal and a second high pass filtered signal whose frequencies are synchronized with each other; Signal processing method for class D audio amplifiers. The method of claim 1, In step (a), Outputting the first low pass filtered signal and the second low pass filtered signal based on a first cut-off frequency, respectively, In step (b), Outputting the first high pass filtered signal and the second high pass filtered signal, respectively, based on a second cutoff frequency; And the first cutoff frequency is higher than the second cutoff frequency. The signal processing method of claim 1, wherein the signal processing method of the class D audio amplifier comprises: And buffering each of the first low pass filtered signal and the second low pass filtered signal prior to the high pass filtering. A first integrator for integrating the first audio signal and the first feedback signal and outputting a first integrated signal; A second integrator for integrating the second audio signal and the second feedback signal and outputting a second integrated signal; A synchronizer configured to low pass filter each of the first integrated signal and the second integrated signal, and high pass filter each of the low pass filtered signals to output a first synchronization signal and a second synchronization signal whose frequencies are synchronized with each other; A comparator configured to output the first PWM signal and the second PWM signal by comparing each of the first synchronization signal and the second synchronization signal with a corresponding reference voltage; An output unit configured to amplify each of the first PWM signal and the second PWM signal and output a first output signal and a second output signal; And And a feedback unit configured to generate the first feedback signal and the second feedback signal in response to each of the first output signal and the second output signal. The method of claim 4, wherein the synchronization unit A first low pass filter for low pass filtering the first integrated signal to output a first low pass filtered signal; A second low pass filter configured to low pass filter the second integrated signal to output a second low pass filtered signal; And And a high pass filter for high pass filtering each of the first low pass filtered signal and the second low pass filtered signal to output the first synchronization signal and the second synchronization signal. The method of claim 4, wherein the synchronization unit A first low pass filter for low pass filtering the first integrated signal to output a first low pass filtered signal; A second low pass filter configured to low pass filter the second integrated signal to output a second low pass filtered signal; A first buffer buffering the first low pass filtered signal; A second buffer for buffering the second low pass filtered signal; And And a high pass filter for high pass filtering each of the output signal of the first buffer and the output signal of the second buffer to output the first synchronization signal and the second synchronization signal. The method of claim 4, wherein the synchronization unit A first low pass filter and a second low pass filter each of which low pass filters each of the first integrated signal and the second integrated signal based on a first cutoff frequency; And A high pass filter for high pass filtering each of an output signal of the first low pass filter and an output signal of the second low pass filter based on a second cutoff frequency; And a first cut-off frequency higher than the second cut-off frequency.

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