KR20080084056A - Image sensor and method of fabricating the same - Google Patents

Abstract

An image sensor and a manufacturing method thereof are provided to offset a variation of a threshold voltage by controlling regularly an overlapped area between a transfer gate electrode and a threshold voltage control region and an overlapped area between the transfer gate electrode and a photoelectric conversion element. A transfer gate electrode(132) is formed at an upper part of a photoelectric conversion element(110). A threshold voltage control region(136) is formed between the photoelectric conversion element and the transfer gate electrode. One end of the threshold voltage control region positioned at the transfer gate electrode is arranged in one end of the photoelectric conversion element in the threshold voltage control region. A charge detection unit(120) are isolated from the photoelectric conversion element and the threshold voltage control region.

Description

Image sensor and method of manufacturing the same {Image sensor and method of fabricating the same}

1 is a block diagram of an image sensor according to example embodiments.

2 is an equivalent circuit diagram of a unit pixel of an image sensor according to example embodiments.

3 is a schematic layout of a unit pixel of an image sensor according to example embodiments.

4 is a cross-sectional view of the image sensor according to the exemplary embodiment, taken along line IV-IV ′ of FIG. 3.

5A and 5B are enlarged views according to some embodiments of the present disclosure, which enlarges region V of FIG. 4.

6A through 6C are enlarged views according to some exemplary embodiments of the present disclosure, which enlarge the region VI of FIG. 4.

FIG. 7 is a graph showing the relative electric potential (EP) according to the position in the VIII-VIII 'line of FIG.

8 through 12 are cross-sectional views of pixel structures of an image sensor according to other exemplary embodiments.

13 to 17 are cross-sectional views illustrating process steps for describing a method of manufacturing an image sensor according to example embodiments.

18 is a schematic diagram illustrating a processor-based system including a CMOS image sensor according to embodiments of the present invention.

<Explanation of symbols on main parts of the drawings>

101: semiconductor substrate 107: deep well

108: separation well 110: photoelectric conversion element

112: pinning layer 120: charge detection unit

130: charge transfer unit 132: transfer gate electrode

134: gate insulating film 136: threshold voltage control region

138: spacer

The present invention relates to an image sensor and a method of manufacturing the same, and more particularly, to an image sensor and a method of manufacturing the improved device reliability.

Recently, with the development of the computer industry and the communication industry, the demand for improved image sensors in various fields such as digital cameras, camcorders, personal communication systems (PCS), game machines, security cameras, medical micro cameras, etc. is increasing.

The MOS image sensor is simple to drive and can be implemented by various scanning methods. In addition, since the signal processing circuit can be integrated on a single chip, the product can be miniaturized, and the MOS process technology can be used interchangeably to reduce the manufacturing cost. Its low power consumption makes it easy to apply to products with limited battery capacity. Therefore, the use of the MOS image sensor is rapidly increasing as technology is developed and high resolution is realized.

However, in order to satisfy the increased resolution, as the degree of integration of pixels is increased, the area of the photoelectric conversion element per unit pixel becomes smaller, resulting in lower sensitivity and saturation signal amount. Therefore, increasing the photoelectric conversion element area efficiency has emerged as an important problem. To this end, attempts have been made to extend the area of the photoelectric conversion element even under the transfer gate electrode by tilting and implanting ions during formation of the photoelectric conversion element. However, when doped ions lose energy as they pass through the transfer gate electrode, they are implanted into the surface of the semiconductor substrate, thereby creating an unwanted potential profile. This causes a dark current and noise. In addition, when the overlapping area of the photoelectric conversion element and the transfer gate electrode becomes small, signal charge transfer becomes difficult and an image lag phenomenon occurs. Such phenomena lead directly to the deterioration of device reliability of the image sensor.

An object of the present invention is to provide an image sensor with improved device reliability.

Another object of the present invention is to provide a method of manufacturing an image sensor having improved device reliability.

Technical problems of the present invention are not limited to the technical problems mentioned above, and other technical problems not mentioned will be clearly understood by those skilled in the art from the following description.

In accordance with another aspect of the present invention, an image sensor includes a photoelectric conversion element, a transfer gate electrode formed on the photoelectric conversion element, and a threshold voltage control region formed between the photoelectric conversion element and the transfer gate electrode. A threshold voltage control region in which one end of the threshold voltage control region positioned on the transfer gate electrode side is aligned with one end of the photoelectric conversion element, and the photoelectric conversion element and the threshold voltage control around the transfer gate electrode. And a charge detector that is spaced apart from the region and faces the region.

An image sensor according to another embodiment of the present invention for achieving the technical problem is formed on the photoelectric conversion element, the threshold voltage control region formed on the photoelectric conversion element, the upper part of the threshold voltage control region, 20 to 80 of the full width % Includes a transfer gate electrode overlapping the photoelectric conversion element and the threshold voltage control region, and a charge detection unit facing the photoelectric conversion element and the threshold voltage control region with respect to the transfer gate electrode.

In accordance with still another aspect of the present invention, an image sensor includes a first impurity region of a first conductivity type formed in a semiconductor substrate and a second impurity region of a second conductivity type disposed under the first impurity region. And a third impurity region of a second conductivity type disposed to be spaced apart from the first and second impurity regions via the semiconductor substrate.

According to another aspect of the present invention, there is provided an image sensor including a photodiode, a transfer transistor having a source end coupled to the photodiode, and a charge detector coupled to a drain end of the transfer transistor. The channel of the transfer transistor includes a first region coupled with the source terminal, and a second region with one end coupled with the first region and the other end coupled with the drain terminal. The magnitudes of the electric potentials of the charge detector, the second region, and the first region are in the order of the charge detector> second region> first region.

According to another aspect of the present invention, an image sensor includes a charge detector and at least two pixels sharing the charge detector, wherein each pixel includes a photoelectric conversion element and a photoelectric conversion element. A transfer gate electrode formed on the upper portion and a threshold voltage control region formed between the photoelectric conversion element and the transfer gate electrode, wherein one end of the threshold voltage control region located on the transfer gate electrode side is aligned with one end of the photoelectric conversion element. And a threshold voltage control region, wherein the charge detector is spaced apart from the photoelectric conversion element and the threshold voltage control region to face the transfer gate electrode of each pixel.

According to another aspect of the present invention, an image sensor includes a charge detector and two or more pixels sharing the charge detector, wherein each pixel includes a photoelectric conversion element and an upper portion of the photoelectric conversion element. A threshold voltage control region formed on the upper surface of the threshold voltage control region, and a transfer gate electrode formed at an upper portion of the threshold voltage control region and overlapping the photoelectric conversion element and the threshold voltage control region. Is opposite to the photoelectric conversion element and the threshold voltage control region with respect to the transfer gate electrode.

According to another aspect of the present invention, there is provided a method of manufacturing an image sensor, including forming a photoelectric conversion element, forming a threshold voltage control region on the photoelectric conversion element, and Forming a transfer gate electrode thereon, and forming a charge detection unit spaced apart from the photoelectric conversion element and the threshold voltage control region with respect to the transfer gate electrode, wherein the threshold is located on the transfer gate electrode side One end of the voltage control region is aligned with one end of the photoelectric conversion element.

According to another aspect of the present invention, there is provided a method of manufacturing an image sensor, including forming a photoelectric conversion element, forming a threshold voltage control region on the photoelectric conversion element, and forming an upper portion of the photoelectric conversion element. Forming a transfer gate electrode on the substrate, wherein the transfer gate electrode is formed such that 20 to 80% of the entire width of the transfer gate electrode overlaps the photoelectric conversion element and the threshold voltage control region, and the transfer gate electrode is formed around the transfer gate electrode. And forming a photoelectric conversion element and a charge detector facing the threshold voltage control region.

According to another aspect of the present invention, there is provided a method of manufacturing an image sensor, wherein a first impurity region of a first conductivity type is formed in a semiconductor substrate, and a second conductivity type is disposed below the first impurity region. Forming a second impurity region of the second impurity region, and forming a third impurity region of a second conductivity type to be spaced apart from the first and second impurity regions through the semiconductor substrate.

Specific details of other embodiments are included in the detailed description and drawings.

Advantages and features of the present invention and methods for achieving them will be apparent with reference to the embodiments described below in detail with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but will be implemented in various forms, and only the present embodiments are intended to complete the disclosure of the present invention, and the general knowledge in the art to which the present invention pertains. It is provided to fully convey the scope of the invention to those skilled in the art, and the present invention is defined only by the scope of the claims.

Thus, in some embodiments, well known process steps, well known structures and well known techniques are not described in detail in order to avoid obscuring the present invention.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. In this specification, the singular also includes the plural unless specifically stated otherwise in the phrase. As used herein, including and / or comprising includes the presence or addition of one or more other components, steps, operations and / or elements other than the components, steps, operations and / or elements mentioned. Use in the sense that does not exclude. And ″ and / or ″ include each and all combinations of one or more of the items mentioned. In addition, like reference numerals refer to like elements throughout the following specification.

In addition, the embodiments described herein will be described with reference to cross-sectional and / or schematic views, which are ideal illustrations of the invention. Accordingly, the shape of the exemplary diagram may be modified by manufacturing techniques and / or tolerances. Accordingly, the embodiments of the present invention are not limited to the specific forms shown, but also include variations in forms generated by the manufacturing process. In addition, each component in each drawing shown in the present invention may be shown to be somewhat enlarged or reduced in view of the convenience of description.

An image sensor according to embodiments of the present invention includes a charge coupled device (CCD) and a CMOS image sensor. Here, the CCD has less noise and better image quality than the CMOS image sensor, but requires a high voltage and a high process cost. CMOS image sensors are simple to drive and can be implemented in a variety of scanning methods. In addition, since the signal processing circuit can be integrated on a single chip, the product can be miniaturized, and the CMOS process technology can be used interchangeably to reduce the manufacturing cost. Its low power consumption makes it easy to apply to products with limited battery capacity. Therefore, hereinafter, a CMOS image sensor will be described as an image sensor of the present invention. However, the technical idea of the present invention can be applied to the CCD as it is.

1 is a block diagram of an image sensor according to example embodiments.

Referring to FIG. 1, an image sensor according to example embodiments may include an active pixel sensor (APS) array 10 including a photoelectric conversion element, a timing generator 20, and a row decoder 30. ), Row driver 40, correlated double sampler (CDS) 50, analog to digital converter (ADC) 60, latch 70, and column decoder ( column decoder 80).

The APS array 10 includes, for example, a plurality of pixels arranged in a column direction. Each pixel receives an optical signal and converts it into an electrical signal. The APS array 10 is driven by receiving a plurality of driving signals such as a pixel selection signal SEL, a reset signal RX, and a charge transfer signal TX from the row driver 40. The converted electrical signal is also provided to the correlated double sampler 50 via a vertical signal line.

The timing generator 20 provides a timing signal and a control signal to the row decoder 30 and the column decoder 80.

The row driver 40 provides a plurality of driving signals to the active pixel sensor array 10 for driving the plurality of unit pixels according to the result decoded by the row decoder 30. For example, when unit pixels are arranged in a matrix form, a driving signal is provided for each row.

The correlated double sampler 50 receives, holds, and samples electrical signals formed in the active pixel sensor array 10 through vertical signal lines. In other words, the signal level due to the specific noise level and the formed electrical signal is sampled twice, and the difference level corresponding to the difference between the noise level and the signal level is output.

The analog-to-digital converter 60 converts an analog signal corresponding to the difference level into a digital signal and outputs the digital signal.

2 is an equivalent circuit diagram of a unit pixel of an image sensor according to example embodiments. 3 is a schematic layout of a unit pixel of an image sensor according to example embodiments.

2 and 3, the unit pixel 100 includes a photoelectric conversion element 110, a charge detector 120, a charge transfer unit 130, a reset unit 140, an amplifier 150, and a selector. 160. Each unit pixel 100 may include, for example, four transistors as shown in FIG. 2. However, this is only an example, and may include three or five transistors per unit pixel, and the number of transistors may be added or subtracted as necessary.

The photoelectric conversion element 100 absorbs incident light and accumulates charges corresponding to the amount of light. The photoelectric conversion element 100 may include, for example, a photo diode, a photo transistor, a photo gate, a pinned photo diode, or a combination thereof.

The charge detector 120 may be formed of, for example, a floating diffusion region (FD), and receives charges accumulated in the photoelectric conversion element 120. Since the charge detector 120 has parasitic capacitance, charges may be accumulated cumulatively. The charge detector 120 is electrically connected to the gate of the amplifier 150 to control the amplifier 150.

The charge transfer unit 130 transfers charges from the photoelectric conversion element 110 to the charge detection unit 120. The charge transfer unit may be formed of one transistor (transfer transistor), and the gate terminal of the transfer transistor is coupled to the charge transfer signal TG. The source terminal of the transfer transistor is coupled to the photoelectric conversion element 100, and the drain terminal of the transfer transistor is coupled to the charge detector 120, respectively.

The reset unit 140 periodically resets the charge detector 120. The source terminal of the reset unit 140 is connected to the charge detector 120 and the drain terminal is connected to Vdd. The reset unit 140 is driven in response to the reset signal RST.

The amplifier 150 serves as a source follower buffer amplifier in combination with a constant current source (not shown) located outside the unit pixel 100. The amplifier 150 outputs a voltage that changes in response to the voltage of the charge detector 120 to the vertical signal line 111. The source terminal of the amplifier 150 is connected to the drain terminal of the selector 160, and the drain terminal of the amplifier 150 is connected to Vdd.

The selector 160 selects unit pixels to be read in units of rows. The selector 160 is driven in response to the select signal ROW, and the source terminal of the selector 160 is connected to the vertical signal line 111.

In addition, the driving signal lines 131, 141, and 161 of the charge transfer unit 130, the reset unit 140, and the selector 160 extend in the row direction so that the unit pixels included in the same row are simultaneously driven.

4 to 6C will be described to explain the cross-sectional structure of the unit pixel as described above. 4 is a cross-sectional view of the image sensor according to the exemplary embodiment, taken along line IV-IV ′ of FIG. 3. 5A and 5B are enlarged views according to some embodiments of the present disclosure, which enlarges region V of FIG. 4. 6A through 6C are enlarged views according to some exemplary embodiments of the present disclosure, which enlarge the region VI of FIG. 4.

As illustrated in FIG. 4, the pixel unit 100_1 of the image sensor according to the exemplary embodiment may include the semiconductor substrate 101, the photoelectric conversion element 110, the transfer gate electrode 132, and the threshold voltage control region ( 136 and a charge detector 120.

The semiconductor substrate 101 may be a first conductivity type substrate widely applied in the art, or a second conductivity type substrate opposite to the first conductivity type. In addition, the semiconductor substrate 101 may be an epitaxial substrate including an epitaxial layer epitaxially grown in at least a portion of the region. Thus, when referred to herein as "inside of a semiconductor substrate", it may refer to "inside of a bare semiconductor substrate" as well as "inside the epitaxial layer formed thereon." In addition, the semiconductor substrate may be a substrate including both first and second conductivity types. In particular, in the case of an epitaxial substrate, it is free to select a conductive type for each region according to the epitaxial growth process.

Application of various examples to the semiconductor substrate may be easily performed by those skilled in the art. For convenience of description, in the present embodiment, unless otherwise stated, the first conductivity type is P-type, and the second type is P-type. Assuming that the conductivity type is N type, the following description will be mainly given of an example in which a P type bare substrate is applied as a semiconductor substrate.

Deep wells 107 are formed in the bottom of the semiconductor substrate 101. For example, the deep well 107 may be formed at a depth of 3 to 12 μm from the surface of the semi-conducting substrate 101. The thickness of the deep well 107 may be, for example, 1-5 μm. The deep well 107 divides the semiconductor substrate 101 into a lower substrate region 101a and an upper substrate region 101b. The distinction between the deep well 107 and the peripheral lower / top substrate region is due to the doped impurity concentration. For example, deep wells contain P-type impurities, and the doping concentration of the impurities is higher than that of the peripheral semiconductor substrate. Impurity concentrations between the lower substrate region and the upper substrate regions 101a and 101b may be different depending on the introduction of the epitaxial layer, the ion doping, and the like. However, it is assumed herein that the lower / upper substrate regions 101a and 101b are doped with P-type impurities at a low concentration as applied to a general P-type substrate.

The deep well 107 provides a plurality of holes so that the charges generated in the lower substrate region 101a do not flow into the photoelectric conversion element 110, but recombine with the holes. Thus, interpixel crosstalk due to random drift of charges can be reduced.

A separation well 108 is formed in the upper substrate region 101b of the semiconductor substrate 101 to define each pixel unit of the image sensor. Separation well 108 may, for example, contain a higher concentration of P-type impurities than peripheral upper substrate region 101b. Separation well 108 contributes to preventing crosstalk between pixels by preventing charge transfer from one pixel to another. Although the drawing shows that the isolation well 108 is in contact with the underlying deep well 107, they may be separated. If separated, the area will be occupied by the upper substrate area 101b.

The transfer gate structure including the transfer gate electrode 132 is formed on the upper substrate region 101b of the semiconductor substrate 101. The transfer gate structure further includes a gate insulating layer 134 in addition to the transfer gate electrode 132. For example, SiO 2, SiOn, SiN, Al 2 O 3, Si 3 N 4, GexOyNz, GexSiyOz or a high dielectric constant material film may be used as the gate insulating layer 134. Examples of the high dielectric constant material film may include HfO 2, ZrO 2, Al 2 O 3, Ta 2 O 5, hafnium silicate, zirconium silicate, or a combination thereof.

Optionally, the transfer gate structure may further include a spacer 138 formed on sidewalls of the transfer gate electrode 132 and the gate insulating layer 134. The spacer 138 may be made of SiN, for example.

The photoelectric conversion element 110, the threshold voltage control region 136, and the charge detector 120 are formed in the semiconductor substrate 101 under the gate insulating layer 134. The photoelectric conversion element 110 and the charge detector 120 are, for example, regions doped with N-type impurities. In this case, the doping concentration of the N-type impurity may be higher in the charge detector 120 than in the photoelectric conversion element 110. The threshold voltage control region 136 is, for example, a region doped with P-type impurities. The threshold voltage control region 136 increases the threshold voltage of the transfer gate electrode 132, thereby preventing dark current. To this end, the P-type impurity doping concentration of the threshold voltage control region 136 is higher than the P-type impurity doping concentration of the semiconductor substrate 101. The threshold voltage control region 136 constitutes the charge transfer unit 130 together with the transfer gate electrode 132 and the gate insulating layer 134 described above.

With respect to the transfer gate electrode 132, the charge detector 120 is generally located at one side of the transfer gate electrode 132, and the photoelectric conversion element 110 and the threshold voltage control region 136 are generally the transfer gate electrode 132. Located on the other side of Here, "one side" and "other side" mean relative directions that can be reversed. However, unless otherwise specified, the present disclosure will be referred to as “one side” when referring to the right direction of the drawings, and “other side” when referring to the left direction of the drawings. However, it is obvious that the above-mentioned meaning is not limited to the corresponding drawing direction.

The charge detector 120 is substantially aligned with one side of the transfer gate electrode 132 and extends in the outward direction of the transfer gate electrode 132. Thus, the charge detector 120 does not substantially overlap the transfer gate electrode 132. Here, the term "substantially aligned on one side of the transfer gate electrode 132" means not only the case of being completely aligned on one side of the transfer gate electrode 132, but also "the transfer gate electrode ( 132) in the vicinity of one side. In view of the above, the case in which the charge detector 120 is aligned with the spacer 138 formed on the sidewall of the transfer gate electrode 132 should be interpreted as being substantially aligned with one side of the transfer gate electrode 132. Furthermore, even when a part of the region of the charge detector 120 extends toward the transfer gate electrode 132 and includes some overlapped region, the transfer gate is longer than the width of the entire transfer gate electrode. It can be interpreted as being substantially aligned to one side of the electrode 132. Here, the error range that can be exemplified as an interpretation criterion of the actual alignment may be about 10% with respect to the width of the transfer gate electrode 132.

The threshold voltage control region 136 is positioned above the photoelectric conversion element 110. The photoelectric conversion element 110 and the threshold voltage control region 136 are disposed opposite to the charge detector 120 with respect to the transfer gate electrode 132 and extend in the other direction of the transfer gate electrode 132. have. At the same time, the photoelectric conversion element 110 and the threshold voltage control region 136 may overlap at least a portion of the transfer gate electrode 132. The overlapping degree may be determined in consideration of the capacitance of the photoelectric conversion element 110, the magnitude of the threshold voltage, the charge transfer speed, and the distance between the threshold voltage control region 136 and the charge detector 120.

In this regard, for example, the photoelectric conversion element 110 and the threshold voltage control region 136 may overlap the transfer gate electrode 132 by about 20 to 80% of the width of the transfer gate electrode 132. In this case, one end of the threshold voltage control region 136 and one end of the photoelectric conversion element 110 positioned on the transfer gate electrode 132 side respectively transfer the other end of the transfer gate electrode 132 to displacement [0]. When one end of the electrode 132 is defined as the displacement [1], it is located in the displacement [0.2] to the displacement [0.8]. As such, when the transfer gate electrode 132, the threshold voltage region 136, and the photoelectric conversion element 110 overlap each other, the charge transfer speed is changed. Detailed description thereof will be provided later.

The positional relationship is also the basis for providing the spacing between the structures. That is, when the charge detector 120 is substantially aligned with one side of the transfer gate electrode 132 as described above, the photoelectric conversion element 110 and / or the threshold voltage control region 136 may be the charge detector 120. Although located at the same level as, they are spaced apart without touching each other, as illustrated in FIG. 4. The semiconductor substrate 101 is interposed between them. That is, the space is occupied by the semiconductor substrate 101.

Since the semiconductor substrate 101 interposed between the photoelectric conversion element 110 and the charge detection unit 120 includes P-type impurity ions, charge is punched through from the photoelectric conversion element 110 to the charge detection unit 120. Prevent In addition, the semiconductor substrate interposed between the threshold voltage control region 136 and the charge detector 120, as described later, serves to improve the mobility of charge.

Furthermore, in some embodiments of the present invention, one end of the threshold voltage control region 136 and one end of the photoelectric conversion element 110 respectively positioned on the transfer gate electrode 132 side are shown in FIGS. 5A and 5B. Can be aligned together. 5A and 5B also exemplarily show an alignment relationship between one side between the photoelectric conversion element 110 and the threshold voltage control region 136 and their vertical position relationship together. That is, the photoelectric conversion element 110 and the threshold voltage control region 136 may be in contact with each other in the vertical direction as shown in FIG. 5A or may be spaced apart as shown in FIG. 5B. The separation space may be occupied by the upper substrate region 101b of the semiconductor substrate.

Referring back to FIG. 4, a pinning layer 110 doped with a high concentration of P-type impurities may be disposed on the threshold voltage control region 136. One end of the pinning layer 110 positioned on the transfer gate electrode 132 may be substantially aligned with the other side of the transfer gate electrode 132. That is, the pinning layer 112 extends outward from the other side of the transfer gate electrode 132 and may not substantially overlap the transfer gate electrode 132. Accordingly, one end and the bottom of the pinning layer 112 is surrounded by the threshold voltage control region 136. Here, the meaning of “substantially aligned” or “substantially not overlapped” is the same as discussed above in the charge detector 120.

The pinning layer 112 serves to prevent the generation of noise from dangling bonds formed on the surface of the semiconductor substrate 101. That is, the dangling bonds on the surface of the semiconductor substrate 101 easily generate a large amount of charge-hole pairs by stimulation such as thermal energy, and the generated charges may act as signal noise. Therefore, by extinguishing it by the pinning layer 112, the charge noise is prevented from entering the photoelectric conversion element (110). Therefore, the P-type impurity doping concentration of the pinning layer 112 is preferably large, for example, the impurity doping concentration of the pinning layer 112 may be larger than the threshold voltage control region 136. Although not specifically illustrated in the drawings, introduction of the pinning layer 112 is optional and may be omitted in some cases.

Further, in some embodiments of the present invention, the other end of the threshold voltage control region 136 and the other end of the photoelectric conversion element 110 may be aligned with each other as shown in FIGS. 6A to 6C. 6A to 6C show the alignment relationship between the other end of the threshold voltage control region 136, the other end of the photoelectric conversion element 110, and the other end of the pinning layer 112. 6A-6C, the other end of the pinning layer 112 may be aligned with the other end of the threshold voltage control region 136 as in FIG. 6B, but may protrude out of the threshold voltage control region 136 as in FIG. 6A. 6c, the other end of the pinning layer 112 is included in the threshold voltage control region 136 so that the threshold voltage control region 136 surrounds the other end of the pinning layer 112. It may not be aligned to.

FIG. 7 is a graph showing the relative electric potential (EP) according to the position in the VIII-VIII 'line of FIG. In the graph of FIG. 7, the higher the electric potential, the lower the electric potential. A VIII-VIII line of FIG. 7 indicates a movement path of charges from the photoelectric conversion element 110 to the charge detection unit 120.

Looking at the path of charge transfer through the transfer transistor, the charge moves from the source of the transfer transistor to the drain through the channel region. Since the lower region of the transfer gate electrode 132 forms a channel region of the transfer transistor, the threshold voltage control region 136 overlapped with the transfer gate electrode 132 is overlapped with the transfer gate electrode 132. Together with the area, the channel area is configured. Since the source of the transfer transistor is coupled with the photoelectric conversion element 110, and the drain of the transfer transistor is coupled with the charge detection unit 120, the transfer path of charge is eventually coupled to each other. The threshold voltage control region 136, the semiconductor substrate 101, and the charge detector 120 pass through the threshold voltage control region 136.

Here, as described above, the photoelectric conversion element 110 and the charge detector 120 are doped with N-type impurities, but the doping concentration of the charge detector 120 is greater. In addition, although the threshold voltage control region 136 and the semiconductor substrate 101 are doped with P-type impurities, the doping concentration of the threshold voltage control region 136 is greater. Therefore, when these electric potential graphs are displayed in the channel off state, it becomes as shown in FIG. That is, the electric potential profile of the channel region is stepped. Even when the transmission signal is applied to the transfer gate electrode 132 and the channel is turned on, their electric potential profile is lowered, but still maintains the stepped profile.

However, since the flow of charge in the state where the channel is on is mainly caused by the difference in electric potential, the movement of charge is relatively difficult in the interval when the same electric potential interval is long. In other words, when the electric potential profile of the channel region becomes flat, the rate of charge transfer in this section is slow. Therefore, a phenomenon such as an image delay may be caused. However, as described above, when the channel region has a stepped profile, the same electric potential section is short, so that the movement is relatively easy. In particular, the charge is accelerated by the difference of the electric potential at the interface between the threshold voltage control region 136 and the semiconductor substrate 101 constituting the channel region, so that the charge can quickly move toward the charge detector 120. As a result, the mobility of charge can be improved and the image delay phenomenon can be suppressed. Thus, device reliability of the image sensor can be improved.

On the other hand, the threshold voltage control region 136 serves to increase the threshold voltage. Therefore, the larger the area where the threshold voltage control region 136 overlaps with the transfer gate electrode 132, the higher the threshold voltage, so that it is difficult for charge to pass from the photoelectric conversion element 110 to the charge detection unit 120. On the other hand, in the case of the photoelectric conversion element 110, as the area overlapping with the transfer gate electrode 132 increases, the contact area with the channel region increases, thereby lowering the resistance, and the electrical attraction due to the electric field of the transfer gate electrode 132. In the range of influence of the charges, the charges are easily transferred from the photoelectric conversion element 110 to the charge detection unit 120. The overlap area of the threshold voltage control region 136 and the photoelectric conversion element 110 with respect to the transfer gate electrode 132 is already determined at design time.

Here, the overlapping degree of the threshold voltage control region 136 and the photoelectric conversion element 110 is determined in the range of about 20 to 80% of the width of the transfer gate electrode 132 as described above, each of which is independently determined. If so, it may be different from each other due to errors in the manufacturing process. That is, depending on a certain manufacturing condition, the threshold voltage control region 136 overlaps too much, or the photoelectric conversion element 110 overlaps too little, so that the threshold voltage may be high, and conversely, the threshold voltage control depending on certain manufacturing conditions The region 136 may overlap too little, or the photoelectric conversion element 110 may overlap too much, resulting in a lower threshold voltage.

Thus, as in some embodiments of the present invention described with reference to FIGS. 5A and 5B, one end of the threshold voltage control region 136 and one end of the photoelectric conversion element 110 positioned on the transfer gate electrode 132 side. When these are aligned, the areas where they overlap each other with the transfer gate electrode 132 become the same. That is, even if the threshold voltage control region 136 overlaps more than the design target to increase the threshold voltage, the overlapping area of the photoelectric conversion elements 110 aligned therewith also increases, thereby lowering the threshold voltage. It is possible to offset threshold voltage changes caused by misprocessing such as (misalign). The reverse is also true. That is, the structure in which one end of the threshold voltage control region 136 positioned on the transfer gate electrode 132 side and one end of the photoelectric conversion element 110 are offset may change the threshold voltage according to a process error. The reliability of the image sensor can be improved.

Hereinafter, other embodiments of the present invention will be described with reference to FIGS. 8 to 12. 8 through 12 are cross-sectional views of pixel structures of an image sensor according to other exemplary embodiments.

8 illustrates a case in which the pinning layer 112 is in direct contact with the lower photoelectric conversion element 110. That is, in the image sensor 100_2 according to the exemplary embodiment of FIG. 8, the threshold voltage control region 136_2 surrounds only one side of the pinning layer 112, and does not surround the lower portion, which is different from the exemplary embodiment of FIG. 4. Therefore, the width of the threshold voltage control region 136_2 included in the charge transfer unit 130_2 is much smaller than that of FIG. 4. 8 illustrates that the pinning layer 112 is substantially the same thickness as the threshold voltage control region 136_2, but is not limited thereto. The structural difference between the embodiment of FIG. 4 and the embodiment of FIG. 8 may be due to a difference in process conditions, such as a doping condition or a diffusion condition. However, due to their structural differences, differences in charge transfer characteristics and the like are not particularly accompanied, and thus, the embodiment of FIG. 8 includes all the advantages of the embodiment of FIG. 4.

9 illustrates an image sensor 100_3 further including a barrier well 125 under the charge detector 120. The barrier well 125 serves to prevent the charge from being punched through to the charge detector 120. For this purpose, the barrier well 125 is doped with P-type impurities. The barrier well 125 is preferably arranged to block the abnormal charge transfer path except for the charge normal travel path adjacent to the channel side. For example, as shown in FIG. 9, the barrier well 125 may be formed to have a structure surrounding the lower portion of the charge detector. Furthermore, although the barrier well 125 may be in contact with the photoelectric conversion element 110, even if spaced apart as illustrated in FIG. 9, there is no major obstacle in preventing punchthrough of charge. When the barrier well 125 is spaced apart from the photoelectric conversion element 110, the space between them is occupied by the semiconductor substrate 101.

10 is a view for explaining various application examples for device isolation. Separation of the device for preventing crosstalk may be implemented by the isolation well 108 alone as described with reference to FIG. 4, but further includes an element isolation film 106 as in the image sensor 100_4 shown in FIG. 10. It may also be implemented. In another example, the isolation well 108 may be excluded, and device isolation may be performed using only the device isolation layer 106. As the device isolation film 106, for example, a LOCOS film or an STI film may be applied. The device isolation layer 106 may be fragile in view of the generation of dangling bonds, but may be higher than the isolation well 108, since the device isolation layer 106 may be made of an insulating layer. The device isolation layer 106 may sometimes be provided for the purpose of ensuring the uniformity of the chemical mechanical polishing (CMP) applied in the manufacturing process.

11 illustrates a case where an N-type substrate is applied as the semiconductor substrate 101_5. That is, the image sensor 100_5 according to the exemplary embodiment of FIG. 11 has a structure of FIG. 4 except that the lower substrate region 101a_5 and the upper substrate region 101b_5 of the semiconductor substrate 101_5 are doped with N-type impurities. Have substantially the same structure. Due to the difference in the impurity conductivity of these semiconductor substrates, the device characteristics of the image sensor described with reference to FIG. 4 are partially changed. For example, the depletion layer is formed at the interface between the photoelectric conversion element 110 and the upper substrate region 101b_5 in the embodiment of FIG. 4, but is not formed in this embodiment. In addition, in the present embodiment, the photoelectric conversion is performed in the upper substrate region 101b_5, so that the sensing efficiency is increased.

Furthermore, this embodiment differs from the embodiment of FIG. 4 in the electric potential in the charge transfer path. That is, the electric potential of the semiconductor substrate 101_5 is larger than in the case of FIG. However, even in this case, the electric potential of the semiconductor substrate 101_5 is halfway between the surrounding charge detector 120 and the threshold voltage control region 136. Therefore, since the electric potential of the channel region has a stepped profile, the mobility of charge can be improved and the image delay phenomenon can be suppressed.

Although not shown in the figure, in the embodiment of FIG. 11, it is preferable to further include a barrier well for preventing punchthrough as in the embodiment of FIG. However, it is of course not limited to this.

12 is a cross-sectional view for describing a case in which two or more pixels share one charge detector 120. Referring to FIG. 12, the first pixel and the second pixel are symmetrically formed based on the charge detector 120. The first pixel includes the first photoelectric conversion element 110a, the first pinning layer 112a, the first threshold voltage control region 136a, the first transfer gate electrode 132a, the first gate insulating layer 134a, and the first pixel. The spacer 138a and the charge detector 120 may be included. The first threshold voltage control region 136a, the first transfer gate electrode 132a, and the first gate insulating layer 134a constitute the first charge transfer unit 130a. In addition, the second pixel includes the second photoelectric conversion element 110b, the second pinning layer 112b, the second threshold voltage control region 136b, the second transfer gate electrode 132b, and the second gate insulating layer 134b. , A second spacer 138b, a charge detector 120, and the like. The second threshold voltage control region 136b, the second transfer gate electrode 132b, and the second gate insulating layer 134b constitute the second charge transfer unit 130b. It will be readily appreciated that the corresponding structure of each pixel corresponds to the structure described in FIG. 4, and thus will contain all of the advantages mentioned in FIG. 4.

Furthermore, even if the mask used to form the first and second photoelectric conversion elements 110a and 110b and the first and second threshold voltage control regions 136a and 136b is partially misaligned in one direction, the first pixel itself The influence of the first photoelectric conversion element 110a and the influence of the first threshold voltage control region 136a may be canceled with each other, and the same applies to the second pixel, so that it is easy to maintain the designed threshold voltage at each pixel. Do. Therefore, the threshold voltage between adjacent pixels can be prevented from being different.

Embodiments described above may be variously combined with each other.

Hereinafter, a manufacturing method of an image sensor according to embodiments of the present invention as described above will be described with reference to FIGS. 13 to 17. 13 to 17 are cross-sectional views illustrating process steps for describing a method of manufacturing an image sensor according to example embodiments. For convenience of description, a method of manufacturing the image sensor of FIG. 4 will be described. The image sensor according to the remaining embodiments will be described together in a related part that is distinguished. In addition, in the following embodiments, overlapping descriptions of structures, materials, dimensions, concentrations, positional relationships, and the like that can be easily or inferred from the above structural embodiments are omitted or simplified.

Referring to FIG. 13, a P-type semiconductor substrate 101 is first provided. In order to manufacture the image sensor of FIG. 11, an N-type semiconductor substrate is provided.

Next, a pad oxide film 109 is formed on the semiconductor substrate 101. Formation of the pad oxide film 109 can be omitted.

Next, a deep well 107 is formed by implanting P-type impurity ions into the semiconductor substrate 101, thereby dividing the semiconductor substrate 101 into a lower substrate region 101a and an upper substrate region 101b. In addition, the isolation well 108 is formed by implanting P-type impurity ions into the semiconductor substrate 101. Although not shown in the figure, the formation of isolation wells 108 may be accomplished using a doping mask. The order of forming the deep wells 107 and separation wells 108 is interchangeable. The impurity type, doping energy, and dose in each ion implantation process can be variously modified within the range commonly used in the art.

Meanwhile, in order to manufacture the image sensor of FIG. 10, a process of forming the device isolation layer 106 is performed before or after the formation of the isolation well 107. Formation of the device isolation layer 106 may be performed by a LOCOS process or an STI process.

Referring to FIG. 14, a first doping mask 171 is formed on the pad oxide layer 109 to define a region in which the photoelectric conversion element 110 and the threshold voltage control region 135 are formed. The first doped mask 171 may be formed of, for example, a photoresist pattern. Next, the N-type impurity is ion implanted using the first doping mask 171 to form the photoelectric conversion element 110. In addition, the threshold voltage control region 135 is formed by ion implanting P-type impurities using the first doping mask 171. Each of the ion implants does not exclude that a slight tilt is given, but may be implanted at an angle of 90 ° with respect to the semiconductor substrate 101 without any tilt. The formation order of the photoelectric conversion element 110 and the threshold voltage control region 135 is interchangeable.

As such, since the photoelectric conversion element 110 and the threshold voltage control region 135 are formed using the same doping mask (see '171' in FIG. 14), both side ends thereof are aligned with each other and completely overlap each other. In addition, since there are no structures in which the doped ions lose energy on the target region into which ions are implanted, a predicted doping profile can be obtained. Further, since two or more regions are doped using one doping mask, manufacturing cost is reduced.

Referring to FIG. 15, the pad oxide film 109 is removed to form a gate insulating film 134. The gate insulating film 134 is formed by, for example, a thermal oxidation process. Subsequently, the transfer gate electrode 132 is formed on the gate insulating layer 134.

Referring to FIG. 16, a second doping mask 172 defining a region of forming the pinning layer 112 is formed on the resultant. The second doped mask 172 exposes at least a portion of the threshold voltage control region 135. In addition, the second doped mask 172 may be formed to expose a portion of the transfer gate electrode 132. The second doped mask 172 may be, for example, a photoresist pattern.

Subsequently, a relatively high concentration of P-type impurity ions are implanted into the exposed threshold voltage control region 135. The second doping mask 172 is used for the ion implantation. Further, when the second doping mask 172 does not completely cover the transfer gate electrode 132, the transfer gate electrode 132 is also used as a doping mask. . In some cases, the second doping mask 172 may be omitted, and an ion implantation process may be performed using only the transfer gate electrode 132 as a doping mask.

As a result of the ion implantation, a pinning layer 112 doped with a high concentration of P-type impurities is formed on the surface side of the semiconductor substrate 101. When the transfer gate electrode 132 is used as a doping mask to form the pinning layer 112, one end of the transfer gate electrode 132 side of the pinning layer 112 is aligned with the other end of the transfer gate electrode 132. The remaining threshold voltage control region covered by the transfer gate electrode 132 is not further doped in this step, and remains as the threshold voltage control region 136. Here, reference numeral '135' denotes a threshold voltage control region before the pinning layer 112 is formed, and '136' denotes a threshold voltage control region after the pinning layer 112 is formed.

On the other hand, when the doping depth of the impurity for forming the pinning layer 112 is smaller than the doping depth of the impurity for forming the threshold voltage control region 135 described above, the lower portion of the threshold voltage control region 135 is not further doped. Thus remaining in the threshold voltage control region 136. That is, the pinning layer 112 is surrounded by the threshold voltage control region 136 not only on one side but also on the bottom thereof. Although the doping depth of the impurity for forming the pinning layer 112 is the same as the doping depth of the impurity for forming the threshold voltage control region 135 described above, the first doped threshold voltage control region 135 is followed. Since it is further diffused by a heat treatment process (for example, a thermal oxidation process) or the like, the threshold voltage control region 135 is disposed even under the pinning layer 112. Therefore, in order to obtain a profile as in the embodiment of FIG. 8, a method may be selected in which the doping depth for the pinning layer 112 is deeper than the doping depth of the threshold voltage control region 135. .

The second doping mask 172 for forming the pinning layer 112 is different from the first doping mask 171 for forming the photoelectric conversion element 110 and the threshold voltage control region 135 as described above. In other words, these processes are different processes and include different alignment processes. Accordingly, it will be appreciated that the position of the other end of the pinning layer 112 may be variously modified as shown in FIGS. 6A to 6C depending on the alignment error and / or design purpose therebetween.

Referring to FIG. 17, the second doping mask 172 is removed. Next, a third doped mask 173 defining the charge detector 120 is formed. The third doped mask 173 may be formed to expose a portion of the transfer gate electrode 132. The third doped mask 173 may be, for example, a photoresist pattern.

Subsequently, the N-type impurity ions are implanted using the third doping mask 173 to form the charge detector 120. In the ion implantation process for forming the charge detector 120, the transfer gate electrode 132 may be used as a doping mask. Thus, the formed charge detector 120 may be aligned on one side of the transfer gate electrode 132. In some cases, the third doping mask 173 may be omitted, and an ion implantation process may be performed using only the transfer gate electrode 132 as a doping mask.

Meanwhile, for the embodiment of FIG. 9, P-type impurity ions are further implanted to form the barrier well 125. The order of formation of the barrier well 125 and the charge detector 120 may be exchanged.

Subsequently, an insulating film is formed on the resultant product and then etched back to form a spacer 138, thereby completing the image sensor 101_1 of FIG. However, it is apparent that the formation of the spacer 138 may proceed in the previous step, and accordingly, the positional relationship, the alignment relationship, and the like between the regions may be modified.

On the other hand, the image sensor 101_6 according to the embodiment of FIG. 12 is manufactured in substantially the same manner as in FIG. 4 except that the layout is changed.

Hereinafter, a processor substrate system including the image sensor as described above is disclosed. 18 is a schematic diagram illustrating a processor-based system including a CMOS image sensor according to embodiments of the present invention.

Referring to FIG. 18, the processor-based system 201 is a system that processes the output image of the CMOS image sensor 210. The system 201 may illustrate a computer system, a camera system, a scanner, a mechanized clock system, a navigation system, a videophone, a supervision system, an auto focus system, a tracking system, a motion monitoring system, an image stabilization system, etc., but is not limited thereto. It doesn't happen.

Processor-based system 201, such as a computer system, includes a central information processing unit (CPU) 220, such as a microprocessor, that can communicate with input / output (I / O) device 230 via a bus 205. CMOS image sensor 210 may communicate with the system via a bus 205 or other communication link. In addition, processor-based system 201 may include RAM 240, floppy disk drive 250 and / or CD ROM drive 255, and port 260 that may communicate with CPU 220 via bus 205. It may further include. The port 260 may be a port for coupling a video card, a sound card, a memory card, a USB device, or the like, or for communicating data with another system. The CMOS image sensor 210 may be integrated with a CPU, a digital signal processing device (DSP), a microprocessor, or the like. In addition, the memories may be integrated together. In some cases, of course, it may be integrated into a separate chip from the processor.

Although embodiments of the present invention have been described above with reference to the accompanying drawings, those skilled in the art to which the present invention pertains may implement the present invention in other specific forms without changing the technical spirit or essential features thereof. I can understand that. Therefore, it should be understood that the embodiments described above are exemplary in all respects and not restrictive.

According to the image sensor according to some embodiments of the present invention, the threshold voltage control region and the charge detector are spaced apart, and the semiconductor substrate is interposed therebetween, so that the electric potential of the channel region has a stepped profile. Therefore, the charge transfer speed can be improved and the image delay phenomenon can be suppressed. In addition, according to the image sensor according to some embodiments of the present invention, since the overlap area of the transfer gate electrode and the threshold voltage control region and the overlap area of the transfer gate electrode and the photoelectric conversion element can be controlled regularly, The fluctuations in the threshold voltages can cancel each other out. Thus, the reliability of the image sensor can be improved.

Claims (41)

Photoelectric conversion elements; A transfer gate electrode formed on the photoelectric conversion element; A threshold voltage control region formed between the photoelectric conversion element and the transfer gate electrode, wherein one end of the threshold voltage control region positioned on the transfer gate electrode side is aligned with one end of the photoelectric conversion element; And And a charge detector configured to be spaced apart from and face the photoelectric conversion element and the threshold voltage control region with respect to the transfer gate electrode. According to claim 1, The other end of the threshold voltage control region is aligned with the other end of the photoelectric conversion element. According to claim 1, The charge detector is aligned with one side of the transfer gate electrode, but does not overlap the transfer gate electrode. According to claim 1, Further comprising a semiconductor substrate, And the semiconductor substrate occupies a space between the photoelectric conversion element and the threshold voltage control region and the charge detector. According to claim 1, And a barrier well surrounding the charge detector under the charge detector. The method of claim 5, The barrier well includes an impurity of a first conductivity type, and the charge detector includes an impurity of a second conductivity type opposite to the first conductivity type. The method of claim 5, Further comprising a semiconductor substrate, The barrier well is spaced apart from the photoelectric conversion element and the threshold voltage control region, and the separation space is occupied by the semiconductor substrate. According to claim 1, And the photoelectric conversion element is at least partially overlapped with the transfer gate electrode. According to claim 1, Further comprising a pinning layer formed on top of the photoelectric conversion element, And the threshold voltage control region surrounding one end of the charge detection unit side of the pinning layer. Photoelectric conversion elements; A threshold voltage control region formed on the photoelectric conversion element; A transfer gate electrode formed on the threshold voltage control region, and having 20 to 80% of the total width overlapping the photoelectric conversion element and the threshold voltage control region; And And a charge detector configured to face the photoelectric conversion element and the threshold voltage control region with respect to the transfer gate electrode. The method of claim 10, One end of the threshold voltage control region positioned on the transfer gate electrode side is aligned with one end of the photoelectric conversion element. The method of claim 10, And the charge detector is spaced apart from the photoelectric conversion element and the threshold voltage control region. The method of claim 12, Further comprising a semiconductor substrate, And the semiconductor substrate occupies a space between the photoelectric conversion element and the threshold voltage control region and the charge detector. The method of claim 10, And a barrier well surrounding the charge detector under the charge detector. The method of claim 10, Further comprising a semiconductor substrate, The barrier well is spaced apart from the photoelectric conversion element and the threshold voltage control region, and the separation space is occupied by the semiconductor substrate. A first impurity region of a first conductivity type formed in the semiconductor substrate; A second impurity region of a second conductivity type disposed under the first impurity region; And And a third impurity region of a second conductivity type disposed to be spaced apart from the first and second impurity regions via the semiconductor substrate. The method of claim 16, And one end of the second impurity region and one end of the third impurity region opposite to the third impurity region side are aligned with each other. The method of claim 17, And a transfer gate electrode formed on the semiconductor substrate and at least partially overlapping the second impurity region and the third impurity region. The method of claim 17, Further comprising a fourth impurity region of the first conductivity type formed on the surface of the semiconductor substrate, The fourth impurity region has a higher doping concentration than the first impurity region, and the first impurity region surrounds one end of the third impurity region side of the fourth impurity region. The method of claim 19, The first impurity region further surrounds a lower portion of the fourth impurity region. The method of claim 16, The first conductivity type is a P type, the second conductivity type is an N type, and the semiconductor substrate is a P type substrate. Photo diodes; A transfer transistor having a source end coupled to the photodiode; And A charge detector coupled to the drain terminal of the transfer transistor, A channel of the transfer transistor is a first region coupled with the source terminal, and One end is coupled with the first region and the other end is coupled with the drain end; The size of the electric potential of the charge detector, the second region, and the first region is in the order of charge detector> second region> first region. A charge detector; And At least two pixels sharing the charge detector, Each pixel is Photoelectric conversion element, A transfer gate electrode formed on the photoelectric conversion element, and A threshold voltage control region formed between the photoelectric conversion element and the transfer gate electrode, the threshold voltage control region having one end of the threshold voltage control region positioned on the transfer gate electrode side aligned with one end of the photoelectric conversion element. and, And the charge detector is spaced apart from the photoelectric conversion element and the threshold voltage control region with respect to the transfer gate electrode of each pixel. A charge detector; And At least two pixels sharing the charge detector, Each pixel is Photoelectric conversion element, A threshold voltage control region formed on the photoelectric conversion element, and A transfer gate electrode formed on the threshold voltage control region, wherein 20 to 80% of the total width overlaps the photoelectric conversion element and the threshold voltage control region; And the charge detector faces the photoelectric conversion element and the threshold voltage control area about the transfer gate electrode. Forming a photoelectric conversion element, Forming a threshold voltage control region on the photoelectric conversion element; Forming a transfer gate electrode on the threshold voltage control region, Forming a charge detection unit opposed to the photoelectric conversion element and the threshold voltage control region with respect to the transfer gate electrode, And one end of the threshold voltage control region positioned on the side of the transfer gate electrode is aligned with one end of the photoelectric conversion element. The method of claim 25, The forming of the photoelectric conversion element and the threshold voltage control region is performed using the same doping mask. The method of claim 26, Forming the photoelectric conversion element includes implanting impurity ions of a second conductivity type, Forming the threshold voltage control region includes implanting impurity ions of a first conductivity type opposite to the second conductivity type. The method of claim 27, The impurity ions of the first conductivity type and the impurity ions of the second conductivity type are implanted at an angle of 90 degrees. The method of claim 25, And forming a pinning layer on the photoelectric conversion element, wherein the pinning layer surrounds one end of the charge detection unit. The method of claim 29, The forming of the pinning layer may include implanting impurity ions of a first conductivity type into at least a portion of the threshold voltage control region using the transfer gate electrode as a doping mask at a higher concentration than the threshold voltage control region. Method of preparation. The method of claim 25, And the transfer gate electrode is formed to at least partially overlap the photoelectric conversion element. The method of claim 25, The forming of the charge detector includes implanting impurity ions of a second conductivity type using the transfer gate electrode as a doping mask. The method of claim 25, And forming a barrier well surrounding the charge detector under the charge detector, the barrier well including impurities of a first conductivity type opposite to the second conductivity type. The method of claim 33, wherein And the barrier well is formed to be spaced apart from the photoelectric conversion element. Forming a photoelectric conversion element, Forming a threshold voltage control region on the photoelectric conversion element; Forming a transfer gate electrode on the photoelectric conversion element, wherein the transfer gate electrode is formed so that 20 to 80% of the entire width of the transfer gate electrode overlaps the photoelectric conversion element and the threshold voltage control region, And forming a charge detection unit facing the photoelectric conversion element and the threshold voltage control region around the transfer gate electrode. 36. The method of claim 35 wherein The forming of the photoelectric conversion element and the threshold voltage control region is performed using the same doping mask. The method of claim 36, wherein Forming the photoelectric conversion element includes implanting impurity ions of a second conductivity type, Forming the threshold voltage control region includes implanting impurity ions of a first conductivity type opposite to the second conductivity type. The method of claim 37, The impurity ions of the first conductivity type and the impurity ions of the second conductivity type are implanted at an angle of 90 degrees. Forming a first impurity region of a first conductivity type in the semiconductor substrate, Forming a second impurity region of a second conductivity type under the first impurity region, And forming a third impurity region of a second conductivity type to be spaced apart from the first and second impurity regions via the semiconductor substrate. The method of claim 39, The forming of the first impurity region and the second impurity region is performed using the same doping mask. 41. The method of claim 40 wherein Forming the first impurity region and the second impurity region includes implanting the first conductivity type impurity ions and the second conductivity type impurity ions at an angle of 90 ° with respect to the semiconductor substrate, respectively. Method of manufacturing the sensor.

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