KR20080082696A - Method of monitoring a contact opening defect in semiconductor device - Google Patents
Method of monitoring a contact opening defect in semiconductor device Download PDFInfo
- Publication number
- KR20080082696A KR20080082696A KR1020070023254A KR20070023254A KR20080082696A KR 20080082696 A KR20080082696 A KR 20080082696A KR 1020070023254 A KR1020070023254 A KR 1020070023254A KR 20070023254 A KR20070023254 A KR 20070023254A KR 20080082696 A KR20080082696 A KR 20080082696A
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- substrate
- contact
- contact hole
- semiconductor device
- inspection
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
Abstract
Description
1 is a SEM photograph showing a plane of a semiconductor device during a contact open defect inspection of a conventional semiconductor device.
2 is a flowchart illustrating a contact open defect inspection process of a semiconductor device according to an embodiment of the present invention.
3 is a schematic diagram of an optical inspection equipment according to an embodiment of the present invention.
4 is a SEM photograph illustrating a plane of a semiconductor device for identifying a contact open defect according to an embodiment of the present invention.
Explanation of symbols on the main parts of the drawings
200: irradiation light 205: substrate stage
207: substrate 210: reflected light
220: Lens 230: Focus Lens
240: flat lens 250: curved lens
260: image pickup unit 270: display unit
280: control unit
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for inspecting contact not open of a semiconductor device. More specifically, the present invention relates to a contact open defect inspection method using optical inspection equipment.
As semiconductor devices are highly integrated, design rules for manufacturing semiconductor devices are further reduced. That is, the size of the components constituting the semiconductor device is decreasing. One of the most important factors to reduce the size of the chip in the manufacturing method of the semiconductor device is to reduce the size of the contact hole.
In order to make the semiconductor device highly integrated, a film is formed, and the process of processing the film is repeated to form a pattern, and the pattern is formed for each layer and a contact for electrically connecting them is formed. In this case, in order to form the contact, a contact hole is first formed. In addition, a number of processes are required to form and process one film, and each process is essentially inspected to inspect the processing state. Accurate inspection is critical for all processes, as is the contact formation process for the electrical connection of each film.
In general, a contact forming process is performed by forming an insulating layer to apply a conductive region or a conductive pattern, forming a contact hole to expose the conductive region or the conductive pattern by partially etching the insulating layer, and then forming the contact hole as a conductive material. By landfilling. Subsequently, a conductive pattern or the like formed on the upper surface of the buried region is electrically connected to a conductive region or a conductive pattern formed in the lower layer by the contact.
If the contact hole is not fully etched and the conductive region or the conductive pattern of the lower surface is not exposed, the semiconductor device cannot function as a semiconductor device. Therefore, in the contact forming step, it is very important to inspect whether the conductive region or the conductive pattern is completely exposed on the lower surface of the contact hole. However, as the design rule of the semiconductor device decreases, the critical dimension of the contact hole formed in the semiconductor device also decreases rapidly. Therefore, many errors occur in the process of inspecting the contact hole.
In general, whether the bottom of the contact hole is completely exposed is determined by cutting and inspecting a semiconductor substrate including the contact hole. That is, the semiconductor substrate of the portion where the contact hole exists is cut to the side to examine the profile. In this case, the metal material is deposited on the insulating film on which the contact hole is formed in order to clearly observe the transparent property of most of the insulating materials forming the insulating film, and then the inspection is performed. Thus, an additional process of depositing the metal material is required, which not only delays the inspection time but also results in the loss of the metal material itself. In addition, the method requires cutting the semiconductor substrate, resulting in a loss of the semiconductor substrate, thereby increasing the process cost.
Another inspection method is a secondary electron scanning electron microscope (SEM) method. That is, in the contact hole where the insulating film is completely removed, the irradiated electrons are all moved to the substrate so that secondary electrons are not emitted. In the contact hole where the insulating film remains, some of the irradiated electrons are reflected and measured in the form of secondary electrons. In this case, the secondary electron SEM method is inspected as an image, as shown in FIG. 1, the measured secondary electrons are expanded to appear as a large shape (X). The secondary electron SEM method is known as an inspection device with high accuracy, but a separate vacuum state must be formed and processing for maintaining process conditions such as the strength of the vacuum and the electron beam is inconvenient. In addition, the inspection accuracy is quite high, but the use of a small pixel size requires a long time for inspection of the entire surface of the substrate, which delays the manufacturing process of the semiconductor device.
On the other hand, since the contact open defect inspection method of the semiconductor element by the optical inspection equipment does not form a vacuum separately, the inspection time of the semiconductor element is shortened. In addition, it can be inspected in a non-destructive manner because it can be inspected in a planar manner, but it is impossible in principle to inspect a defect that exhibits a voltage contrast such as whether a contact is open, but only a physical structural defect. Therefore, there is a need for a method of increasing the accuracy of inspection while reducing the inspection time.
SUMMARY OF THE INVENTION An object of the present invention for solving the above problems is to provide a method of contact open defect inspection of a semiconductor device in which the inspection time is shortened and the accuracy of the inspection is improved.
In order to achieve the above object, according to the contact open defect inspection method of a semiconductor device according to an embodiment of the present invention, an insulating film is formed on a substrate on which a plurality of conductive patterns are formed. The insulating layer is selectively etched to form contact holes for opening the substrate surface between the conductive patterns. A silicon layer is formed by performing a selective epitaxial growth process on the open substrate surface to fill the contact hole. An optical inspection device is used to determine a portion where the silicon film is not grown as a contact open defect site.
Preferably, the selective epitaxial growth process is performed at a temperature of 500 to 1000 ℃.
According to the present invention, the single crystal silicon film is grown by selective epitaxial growth in the contact hole and represented as a physical structural defect, whereby the site where the single crystal silicon film in the contact hole is not buried can be inspected by the optical inspection equipment. Therefore, the inspection time of the contact open defect in the front surface of the substrate can be shortened, and the accurate analysis can be made, so that the yield and reliability of the semiconductor device can be improved.
Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the present invention is not limited to the following embodiments and may be implemented in other forms. The embodiments introduced herein are provided to make the disclosure more complete and to fully convey the spirit and features of the invention to those skilled in the art. In the drawings, the thicknesses of respective devices or films (layers) and regions are exaggerated for clarity of the invention, and each device may include various additional devices not described herein. If a film (layer) is said to be located on another film (layer) or substrate, it may be formed directly on the other film (layer) or substrate or an additional film (layer) may be interposed therebetween.
2 is a flowchart illustrating a contact open defect inspection process of a semiconductor device according to an embodiment of the present invention. 3 is a schematic diagram of an optical inspection equipment according to an embodiment of the present invention. 4 is a SEM photograph illustrating a plane of a semiconductor device for identifying a contact open defect according to an embodiment of the present invention.
2 to 4, first, a process of forming various elements for forming semiconductor elements such as wells, device isolation, or transistors on a semiconductor substrate is performed, and then an insulating film is formed on the substrate (S100). . An active region may be defined in the substrate, and a plurality of conductive patterns may be formed.
A photoresist pattern for exposing a portion of the insulating film is formed on the insulating film by normal photolithography. Specifically, a photoresist is applied on the insulating film, and then a photoresist pattern is formed through an exposure and development process.
By using the photoresist pattern as an etch mask, an exposed region of the insulating layer is etched to form a contact hole for opening the surface of the substrate on which the contact between the conductive patterns is to be made (S110). The contact hole forms one group based on a predetermined region and is repeatedly formed for each group.
Subsequently, a silicon film is formed by performing a selective epitaxial growth process on the open substrate surface to fill the contact hole (S120).
The selective epitaxial growth process introduces a silicon source gas while heating to a temperature of 500 to 1000 ° C., whereby single crystal silicon is grown only in a portion where a contact open is made. In this case, the silicon film is formed on the entire surface where the contact hole is formed to inspect the contact open defect of the substrate. In this case, the contact open defect may occur because the photoresist pattern is not completely removed from the contact hole or the insulating film in the contact hole is not completely removed. That is, the silicon film is grown into a single crystal silicon film using the substrate as a seed in the contact hole where the lower substrate is completely exposed, and the selective epitaxial growth is not performed in the contact hole where the lower substrate is not exposed. Will remain. Therefore, the contact open defect can be inspected later by checking whether the silicon film is formed.
Subsequently, a planarization process is performed to remove the silicon film on the insulating film so that the silicon film is buried in the contact hole. The planarization process may use an etchback or chemical mechanical polishing process.
Subsequently, a portion where the silicon film is not grown is determined to be a contact open defect site by using optical inspection (S130).
The process of determining the contact open defect will be described in detail using the optical inspection equipment illustrated in FIG. 3. First, a
The
In general, the resolution limited in the manufacturing process of a semiconductor device is defined by Rayleigh's equation (2).
(2) R = k1 (λ (lamda) / NA)
Here, R denotes the maximum resolution of the optical system, lambda denotes the wavelength of light used as the light source, and NA denotes the maximum aberration of the optical lens. K represents a process constant determined by a process other than resolution. In addition, as the NA of the lens increases, more diffracted light can be transferred onto the substrate, thereby achieving higher resolution.
Therefore, referring to Equation (2), the resolution can be improved as the short wavelength is used. That is, observation of a smaller area is possible.
The light source is irradiated after aligning the substrate using a wavelength to be irradiated by a filter.
The intermediate image is represented as the final image by the
The resolution of the CCD camera is about several to several tens of micrometers. The resolution indicates how much area the pixel, which is one minimum image pickup unit of the CCD camera, corresponds to the substrate to be inspected.
When the image is enlarged and visualized at the resolution, a contact hole having a very small critical dimension is also clearly expressed, and the image is expressed as a gray level, which is a level of contrast, to distinguish between a contact open defect and SEG growth in the contact hole. .
Subsequently, as a result of the inspection of the above-described substrate, if there is no contact open defect, a contact etching process is performed on the next substrate as applied to the substrate, and then a conductive layer is deposited and a planarization process is performed.
Meanwhile, as a result of the inspection of the above-described substrate, if a contact open defect exists, an additional etching or cleaning process may be performed to remove the residual film.
'Y' in FIG. 4 indicates that SEG growth is not performed by contact open defects occurring on the SEM image, and appear as black dots.
According to the present invention described above, by performing a process of depositing and planarizing a silicon film through selective epitaxial growth, and then performing contact open defect inspection using optical inspection equipment, accurate defect analysis can be performed in a short time.
According to the present invention as described above, compared to the conventional method using the electron beam can detect the contact open defects in a short time, the reproducibility is good, the reliability of the measurement data can be improved. In this way, the contact open defect can be analyzed accurately, and the yield of the semiconductor device can be improved.
Although described above with reference to a preferred embodiment of the present invention, those skilled in the art will be variously modified and changed within the scope of the invention without departing from the spirit and scope of the invention described in the claims below I can understand that you can.
Claims (2)
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KR1020070023254A KR20080082696A (en) | 2007-03-09 | 2007-03-09 | Method of monitoring a contact opening defect in semiconductor device |
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KR1020070023254A KR20080082696A (en) | 2007-03-09 | 2007-03-09 | Method of monitoring a contact opening defect in semiconductor device |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112017983A (en) * | 2020-07-28 | 2020-12-01 | 中国科学院微电子研究所 | Detection method of contact hole and processing method of semiconductor product |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN112017983A (en) * | 2020-07-28 | 2020-12-01 | 中国科学院微电子研究所 | Detection method of contact hole and processing method of semiconductor product |
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