KR20080065594A - Process for producing flat panel display - Google Patents

Abstract

This invention provides a process for producing a flat panel display (1), comprising the step of providing a substrate (111) on which a group of electrodes (40) having first and second terminal parts (41, 42) have been formed, masking one terminal part (41), selected from the first and second terminal parts (41, 42), which undergoes a smaller influence by masking than the other terminal part (42), while the other terminal part (42) remains unmasked, and depositing an insulator (17a) by chemical vapor deposition on the substrate (111), and the step of removing at least a part of the insulator (171) deposited on the terminal part (42) remaining unmasked.

Description

Manufacturing method of flat panel display {PROCESS FOR PRODUCING FLAT PANEL DISPLAY}

TECHNICAL FIELD This invention relates to manufacture of a flat panel display which coats an electrode by chemical vapor deposition.

Chemical Vapor Deposition (CVD) is a film-forming method for forming a film from a raw material gas by a chemical reaction. The chemical vapor deposition (CVD) is a method of measuring the order of meters from the formation of a thin film of a micro device including a semiconductor device. It is widely applied industrially to coating.

In recent years, the CVD method has come to be used for the manufacture of flat panel displays having a large screen of 1 m or more diagonally. Patent No. 3481142 discloses forming a dielectric layer covering an electrode by plasma CVD in the manufacture of an AC plasma display panel. According to the CVD method, a dielectric layer having a thin and uniform thickness can be obtained and a dielectric layer made of a material such as silicon dioxide or organic silicon oxide, which has a lower relative dielectric constant than that of a low melting glass, which is a general material, is lower than that of a thick film method. Can be formed by temperature.

A parallel flat plate plasma CVD apparatus is suitable for film formation on a relatively large object such as a substrate of a flat panel display. An apparatus of this kind is provided with an upper electrode serving as a nozzle for ejecting a wide range and evenly of source gas, and a lower electrode serving as a support for supporting an object. It is configured to generate a plasma between the lower electrodes.

During the film formation by CVD, when there is a place where film formation is not applied to the object to be formed, masking is performed on the location. Japanese Unexamined Patent Publication No. 2003-324075, which discloses a masking member, discloses a masking member in which a rectangular frame and a thin strip of flesh are combined.

Patent Document 1: Patent No. 3481142

Patent Document 2: Japanese Patent Laid-Open No. 2003-324075

In the manufacture of a plasma display panel in which a dielectric layer having a thickness of several μm to 20 μm is formed by a CVD method on a substrate on which electrodes are arranged, a mask is superimposed on the substrate in order to expose the terminal portions of the electrodes. When masking, the thickness of a dielectric layer may become nonuniform. In detail, as shown in FIG. 1, the phenomenon in which the vicinity of the mask becomes extremely thicker than other parts occurs. 1 (A) and 1 (B) are cases where both of the films are formed on both sides of the mask. However, in Fig. 1A, as shown by curves a1 and a2, the film is thick on both sides of the mask. In Fig. 1B, the film is thick on one side of the mask as shown by curve a4. Curve a3 shows that the film thickness is uniform on the other side of the mask. In Fig. 1A, the source gas flows from the center of the mask to both sides, and both of the left and right mask edges in the drawing are located downstream of the gas flow with respect to the center of the mask. In FIG. 1 (B), source gas flows from the left side to the right side of the mask, and the left edge of the mask is located upstream of the gas flow with respect to the mask center, and is located downstream of the right edge. The film thickness of the locally thick portion may be twice that of the film thickness (set value of film formation) of the portion having a uniform thickness apart from the mask. The locally thick range is about 2 to 3 mm from the mask.

As a cause of such a local increase in the film thickness, it is conceivable that the flow of the source gas from the inlet to the exhaust port in the reaction chamber is inhibited by the mask and the flow velocity is changed at the edge of the mask.

The nonuniformity of the dielectric layer thickness causes a large variation in operating characteristics between the cells constituting the screen. In order to perform stable display at high quality, it is preferable that the thickness of the dielectric layer is uniform.

However, if masking is not performed, after the dielectric is deposited to cover the entire electrode, the dielectric layer must be partially removed to expose the terminal portion of the electrode. For example, it is necessary to perform wet etching. By applying such a process, manufacturing time is long and cost is increased. That is, productivity falls.

An object of the present invention is to achieve uniformity of electrode coating film thickness and to secure productivity by chemical vapor deposition.

A method for manufacturing a flat panel display that achieves the object of the present invention comprises the steps of forming an insulator layer by chemical vapor deposition on a substrate on which an electrode group having first and second terminal portions is formed; The insulator is formed by chemical vapor deposition on an electric substrate on which an electric electrode group is formed while masking is applied to one terminal portion in which the influence of masking is smaller than the other, and not masking the other terminal portion. And depositing at least a portion of the insulator deposited on the unmasked terminal portion.

When masking one of the two terminal portions, there is less insulator that must be removed after the chemical vapor deposition is finished, compared with not masking both sides. To put it simply, the insulator to be removed is 1/2 of the time it is not masked. Therefore, the time and cost (cost) required for removal can be reduced.

 When there is a terminal portion including a common terminal and a terminal portion not including the common terminal connected to the plurality of electrodes, it is preferable to mask the terminal portion not including the common terminal and mask the terminal portion including the common terminal. Do. If even a part of the common terminal is exposed, conductive connection to a plurality of corresponding electrodes can be made. On the other hand, the individual terminals corresponding to one electrode must expose almost the whole in order to ensure the electrically conductive connection to the electrode. That is, high precision is required for the removal of the insulator.

1 is a diagram illustrating a relationship between a mask and a film thickness in conventional film formation.

2 is an exploded perspective view showing an example of a plasma display panel cell structure.

3 is a plan view illustrating a pattern first example of the display electrode.

4 is a plan view showing a region that needs to be exposed in the display electrode group.

5 is a plan view of the mask.

6 is a plan view of a mask and a frame supporting it.

7 is a schematic diagram showing an outline of a plasma CVD apparatus.

8 is a diagram illustrating a manufacturing process of a plasma display panel.

9 is a plan view illustrating a second example of the display electrode pattern.

10 is a plan view showing a region that needs to be exposed in a second example of the pattern of the display electrode.

11 is a plan view illustrating a modification of masking.

Hereinafter, the manufacturing method of this invention is demonstrated taking a plasma display panel as an example of a flat panel display.

A typical plasma display panel has the cell structure shown in FIG. In FIG. 2, a portion including six cells corresponding to three columns is shown in two rows, and the front plate 10 and the back plate are shown for easy understanding of the internal structure. 20 is separated.

The plasma display panel 1 is composed of a front plate 10 and a back plate 20 and a discharge gas (not shown). The front plate 10 includes a glass substrate 11, a first row electrode X, a second row electrode Y, a dielectric layer 17, and a protective film 18. Each of the row electrode X and the row electrode Y is a laminate of the patterned transparent conductive film 14 and the metal film 15. The back plate 20 includes a glass substrate 21, a column electrode A, a dielectric layer 22, a plurality of partitions 23, red (R) phosphors 24, green (G) phosphors 25, and blue (B) The phosphor 26 is provided.

The row electrodes X and the row electrodes Y, which are alternately arranged on the inner surface of the glass substrate 11 as a display electrode for causing surface discharge, are covered by the dielectric layer 17 and the protective film 18. have. The dielectric layer 17 is an essential element for an AC plasma display panel and corresponds to an insulator layer of the present invention. By covering with the dielectric layer 17, surface discharge can be repeated by using the wall charge which accumulates in the dielectric layer 17. FIG. The protective film 18 prevents sputtering of the dielectric layer 17.

Incidentally, in the practice of the present invention, the arrangement of the row electrodes may be either of two widely known forms. One is to enlarge the electrode gap between adjacent rows as shown in FIG. 1 than the electrode gap (surface discharge gap) in each row. The other is to make all the row electrode gaps the same.

3 shows the pattern of the display electrode. The row electrode X and the row electrode Y constituting the display electrode group 40 extend from the screen 60 to the vicinity of the edge of the glass substrate 11, and each of the driving unit and the front end of the display electrode group 40. Terminals Xt and Yt are provided for conductive connection. In FIG. 3, the terminal Xt of the row electrode X is disposed on the left end side of the glass substrate 11, and the terminal Yt of the row electrode Y is the right end () of the glass substrate 11. Iii) is disposed on the side. Since the arrangement pitch of the terminals Xt is different from the arrangement pitch of the row electrodes X on the screen 60, the portion (including the terminal Xt) at the left end of the row electrode X is patterned in a curved band shape. It is. This bent portion is composed of only the metal film 15, not the laminate of the transparent conductive film 14 and the metal film 15. Similarly, the right end portion (including the terminal Yt) of the row electrode Y is patterned in a curved band state, and the curved portion is made of only the metal film 15.

The plasma display panel 1 having the above-described configuration is manufactured in the order in which the front plate 10 and the back plate 20 are separately produced, and after which they are bonded to each other. In general, a mother glass plate having an area of two times or more of the glass substrate 11 is used to manufacture the front plate 10, and a plurality of front plates 10 are produced in a batch. Similarly, the plurality of back plates 20 are also produced in a batch. Prior to bonding the front plate 10 and the back plate 20 to each other, the mother glass plate is divided, and the integrated front plate 10 and the individualized back plate 20 are joined together to form a single body. do.

In the manufacture of the front plate 10, the dielectric layer 17 is formed by the CVD method, and at that time, masking is performed on one of the terminals Xt and Yt. If masking is not performed, the entire display electrode group 40, including both the terminals Xt and Yt, is covered with a dielectric layer 17 having the same thickness, and the terminals Xt and Yt are formed by etching or polishing. It takes a long time to expose). By masking, portions of the dielectric layer 17 to be removed are reduced, and both the terminals Xt and Yt can be exposed to be wired in a relatively short time.

Taking the four surface acquisition (4 in 1) which manufactures four glass substrates from one mother glass plate as an example, the area | region of FIG. 4 is connected when the plasma display panel 1 is connected with a drive circuit. S11) and region S12 must be exposed. In FIG. 4, four display electrode groups 40 are formed in two rows on the quadrangular mother glass plate 111. The part in which each display electrode group 40 in the mother glass plate 111 is arrange | positioned, and its vicinity are corresponded to the front-side glass substrate 11 in one plasma display panel. The region S11 corresponds to the left terminal portion (left end) in the drawings of each display electrode group 40, and the region S12 corresponds to the right terminal portion (in the diagram of each display electrode group 40). Corresponds to the right end. In addition, the area | region S17 in a figure is a area | region which should form a dielectric layer.

In this example, four terminal parts near the center of the mother glass plate 111 among eight terminal parts in total are not masked, but the remaining terminal parts are masked. Two masks 71 and 72 are used for masking as shown in FIG.

These masks 71 and 72 are thin strip | belt-shaped boards which consist of insulating materials, such as ceramics or heat-resistant glass, and are arrange | positioned so that they may overlap with the both ends of the mother glass plate 111. FIG. In detail, the mask 71 masks the left end portions of the two display electrode groups 40 positioned on the left side of FIG. 4, and the mask 72 includes two display electrode groups 40 positioned on the right side of FIG. 4. Mask the right end in). The right end part of the two display electrode groups 40 located on the left side of FIG. 4 and the left end part of the two display electrode groups 40 located on the right side of FIG. 4 are not masked.

The dimensions of the masks 71 and 72 are selected according to the screen size of the plasma display panel. For example, a plasma display panel glass substrate having a diagonal 42-inch screen 60 has a size of about 994 mm x 585 mm. The mother glass plate 111 at the time of producing this glass substrate by two surface acquisition is larger than at least four screens (1988 mm x 1170 mm). The width | variety of the masks 71 and 72 is about 20 mm-30 mm, and the length is a grade similar to the side to which the mother glass plate 111 respond | corresponds. The thickness is about 5 ± 2mm.

In use, the masks 71 and 72 are supported by a quadrangular frame 73 as shown in FIG. The frame 73 is a rigid body made of an aluminum alloy having a thickness of about 20 mm, and is larger and thicker than the mother glass plate 111. For this reason, sufficient mechanical strength is provided in the frame 73 as a pressing member which prevents the mother glass plate 111 from bending by heating.

The deposition of the dielectric layer using the masks 71 and 72 is performed by the parallel plate plasma CVD apparatus 300 shown in FIG. The plasma CVD apparatus 300 includes a chamber (reaction chamber) 310 made of a metal container, a shower plate 320 that ejects material gas in a wide range and evenly, a movable base 330 supporting a film forming object, and the masking described above. Masks 71 and 72 for dragons and a frame 73 for supporting the masks 71 and 72 are provided.

The shower plate 320 serves as an upper electrode for plasma generation, and the movable base 330 also serves as a lower electrode. The movable base 330 is provided with a heater for heating the film forming object.

In the chamber 310, masks 71 and 72 are disposed between the shower plate 320 and the movable base 330. In the illustrated film formation state, the mother glass plate 111 on which the display electrode group 40 is formed is deposited on the movable base 330, and the lower surfaces of the masks 71 and 72 are close to the surface of the display electrode group 40. Doing. Plasma is generated in the space between the display electrode group 40 and the shower plate 320. The distance D between the mother glass plate 111 and the shower plate 320 is selected to be about 10 to 20 mm.

The movable base 330 of this example is a lift type movable up and down. At the time of carrying in and taking out the mother glass plate 111, the movable base 330 descends and falls from the fixedly arranged frame 73. The chamber 310 is provided with a mechanism for loading and unloading having an interlock function.

The outline of the film forming process is as follows.

The inside of the chamber 310 into which the mother glass plate 111 was carried in was pressure-reduced by the pressure of about 2.5-3.5 Torr, for example, and the shower plate was heated in the state which heated the mother glass plate 111 to the temperature of about 200-400 degreeC. The source gas is introduced into the chamber 310 from the introduction hole 321 provided in the center of the 320. In forming a dielectric layer made of silicon dioxide, for example, silane (SiH ₄ ) and nitrogen oxide (N ₂ O) are introduced. The introduced source gas is ejected from the shower plate 310 almost uniformly toward the whole of the mother glass plate 111.

In parallel with the introduction of the source gas, the exhaust gas to the chamber 310 is exhausted through the main exhaust hole 311 located below the movable base 330. The chamber 310 is provided with the vacuum system which is not shown in figure, and the vacuum degree of the chamber 310 is kept constant by controlling the valve of an exhaust system according to the output.

In this way, in the chamber 310 to which a predetermined amount of source gas is supplied, plasma generated by application of high frequency power of 1.5 to 2.5 kW activates the source gas and promotes chemical reaction. Then, a film material generated by the chemical reaction is deposited on the film formation surface S1 of the mother glass plate 111 to form a dielectric layer. The film formation surface S1 in this example is an upper surface in the mother glass plate 111 on which the display electrode group 40 is formed, and is strictly an exposed surface (non-masking surface) of the display electrode group 40. And the substrate surface between the electrodes.

In such a film formation, a gas flow occurs in accordance with the introduction and exhaust of the source gas. The flow starts from the center to the circumference above the film formation surface S1. Therefore, when a mask is arrange | positioned in the center of film-forming surface S1, there exists a possibility that a film thickness may locally increase in the vicinity of the edge of a mask as demonstrated in FIG. On the other hand, even if the masks 71 and 72 are arrange | positioned in the edge part of the film-forming surface S1 downstream of gas flow, the nonuniformity of a film thickness does not arise most. This is because the film formation surface S1 is located upstream with respect to the masks 71 and 72, as described with reference to Fig. 1B. That is, the influence of masking on the edge part of film-forming surface S1 is smaller than the influence of masking on film-forming surface S1 center.

In this example, uniformity of the film thickness is realized by not placing a mask near the center of the plasma generating space in the chamber 310, and by masking placing the masks 71 and 72 only at the end of the plasma generating space, The cost reduction of the process of exposing the terminals Xt and Yt is realized.

It is preferable that the masks 71 and 72 do not come into contact with the display electrode group 40 during masking. This is because damage to the display electrode group 40 does not occur. In addition, since the terminal portion is covered with a thin dielectric layer due to the deposition of gas in the gap between the masks 71 and 72 and the display electrode group 40, the mother glass plate 111 is exposed to the atmosphere or formed after the film formation. There is an advantage that the display electrode group 40 does not oxidize even if heat treatment is applied. If the layer is thin enough, for example, if it is thousands of angstroms or less, the outer conductor and the terminal are broken and the outer conductor and the terminal become conductive by pressing the outer conductor such as a flexible wiring board to the terminal covered therewith, so that it is special for removal. You don't need to do anything, even if you remove it, you can finish it in a short time. The masking in this specification is to intentionally set the film thickness to zero (0) or a value close to the film forming surface S1 by opposing the mask to the film forming surface S1, and includes a form in which the mask is in contact with the film forming surface and a form in which the mask is not contacted. do.

8 is a diagram illustrating a manufacturing process of a plasma display panel.

As shown in Fig. 8A, a plurality of display electrode groups 40 (two shown) are formed on the mother glass plate 111 for multifaceted acquisition. The mother glass plate 111 includes a plurality of substrate members that are the same size as the glass substrate 11 of the front plate 10. Each display electrode group 40 includes two terminal portions 41 and 42 which are both end portions thereof. The first terminal portion 41 is at the edge of the mother glass plate 111. The second terminal portion 42 is located near the center in the left and right directions of the mother glass plate 111 and is adjacent to the terminal portion 42 of the other display electrode group 40. Which electrode these terminal portions 41 and 42 correspond to is determined by the position in the mother glass plate 111 of the corresponding display electrode group 40. In this example, the masked first terminal portion 41 in the display electrode group 40 on the left side includes the terminals Xt of all the row electrodes X in one plasma display panel 1. The second terminal portion 42 includes terminals Yt of all the row electrodes Y in one plasma display panel 1. In contrast, the masked first terminal portion 41 in the display electrode group 40 on the right includes the terminals Yt of all the row electrodes Y in one plasma display panel 1. The two terminal portion 42 includes the terminals Xt of all the row electrodes X in one plasma display panel 1 (see Fig. 3).

As shown in FIG. 8B, the dielectric layer 17a is formed on the mother glass plate 111 on which the plurality of display electrode groups 40 are formed by chemical vapor deposition. In the formation, the plasma CVD apparatus 300 is used, and the terminal portions 41 at both ends of the mother glass plate 111 are covered with masks 71 and 72.

As shown in Fig. 8C, for example, magnesia is deposited as the protective film 18 on the dielectric layer 17a. The illustration shows an example in which the protective film 18 is formed only in a region in contact with the discharge gas in a completed state. Such a film is obtained, for example, by masking during deposition. However, the protective film 18 may be deposited on the entire surface of the dielectric layer 17a without being limited to the examples. Since the protective film 18 is sufficiently thin, the unused portion can be easily removed later.

As shown in FIG. 8D, the mother glass plate 111 is divided into a plurality of glass substrates 11. As a result, the dielectric layers 17a are separated into dielectric layers 17b corresponding to the respective plasma display panels 1.

As shown in Fig. 8E, the back plates 20 separately prepared on the plurality of front plates 10a obtained by the division are bonded to each other. In the step of integrating the front plate 10a and the back plate 20, the terminal portion of one of the front plate 10a is covered with the dielectric 171, so that an external conductor cannot be connected to the terminal portion. By removing this dielectric 171, the plasma display panel 1 shown in Fig. 8F is obtained.

After dividing the mother glass plate 111 and integrating the front plate 10a and the back plate 20 again, the manufacturing sequence of removing the dielectric 171 has the following advantages. It is possible to remove the unnecessary dielectric 171 by advantageous wet etching on the throughput of the process. In addition, there is an advantage that the dielectric 171 prevents oxidation of the electrode in the heat treatment for bonding the back plates 20 together.

Hereinafter, the modification of masking in chemical vapor deposition is demonstrated.

9 is a plan view illustrating a second example of the display electrode pattern. In the display electrode group 40b of this example, the terminal of the row electrode X is the common terminal XT connected to the plurality of row electrodes X. FIG. In the example, the row electrode X is divided into two groups, and in total, two common terminals XT are arranged on the right-right side of the glass substrate 11, one for each group. It is. Since it is common to a some electrode, the common terminal XT is necessarily larger than the terminal Yt (individual terminal corresponding to one electrode) of each row electrode Y.

 FIG. 10 is a plan view showing a region that needs to be exposed in the display electrode group 40b of FIG. 9 when the dielectric layer is formed by the four-side acquisition method.

At the time of connecting the plasma display panel 1 with the driving circuit, the area S12 and the area S13 of Fig. 10 must be exposed. In FIG. 10, four display electrode groups 40b are formed in two rows on the mother glass plate 111. The part in which the display electrode group 40b in the mother glass plate 111 is arrange | positioned, and its vicinity are corresponded to the front side glass substrate 11 in one plasma display panel. The region S12 corresponds to the row electrode Y terminal Yt in each display electrode group 40b, and the region S13 is a common terminal for the row electrode X in each display electrode group 40b. Corresponds to (XT) (see FIG. 9).

The characteristic of this example is that all the area | region to expose arrange | positioned near the center of the mother glass plate 111 left-right direction is set as the area | region S13 corresponding to common terminal XT. In order to obtain this feature, when the four display electrode groups 40b are formed, the display electrode group 40b is disposed so that the display electrode group 40b is reversed to the left and right sides of the mother glass plate 111. Listed. White arrows (indicated by black border lines and white inside) in the drawings indicate the vertical direction.

Also in this example, as in the above example, four terminal portions near the center of the mother glass plate 111 are not masked among the total of eight terminal portions provided with two four display electrode groups 40b. Mask the remaining terminal parts. Two masks 71 and 72 are used for masking as shown in FIG. Formation of the dielectric layer and subsequent manufacturing procedures are the same as in the above examples.

By masking the terminal portion including the individual terminals Yt and not the terminal portion including the common terminal XT, the removal of the unnecessary dielectric 171 (see Fig. 8E) covering the electrode can be eliminated. Simple. This is because, even when a part of the common terminal XT is exposed, it is possible to conduct conductive connection to a plurality of corresponding row electrodes X. Therefore, unlike the individual terminals, it is not necessary to reliably expose the entire terminal. Further, when etching unnecessary dielectric 171, the allowable range of overcoat etching is wide.

In the practice of the present invention, the mask pattern should be selected according to the shape of the film forming target, and is not limited to the patterns illustrated in FIGS. 6 and 11. The present invention is not limited to four-sided acquisition, and the present invention is applied to one-sided acquisition (1 in 1) for producing only one glass substrate from a mother glass plate, or n-side acquisition (n in 1) for producing two or more n glass substrates. It is possible.

The materials, planar dimensions, thicknesses, the number and arrangement of the masks 71 and 72, the configuration of the film forming apparatus, and the like of the masks 71 and 72 and the frame 73 can be appropriately selected within the scope of the present invention. have.

INDUSTRIAL APPLICABILITY The present invention is useful for forming an electrode coating film by chemical vapor deposition and can be used for the manufacture of a flat panel display including a plasma display panel and a liquid crystal panel.

Claims (5)

A method for manufacturing a flat panel display having a plurality of electrodes and an insulator layer covering the plurality of electrodes, the method comprising: On the board | substrate with which the electrode group which has the 1st and 2nd terminal part was formed, it masks with respect to one terminal part among the said 1st and 2nd terminal parts whose influence of masking is smaller than the other, and Depositing an insulator by chemical vapor deposition without masking one terminal portion; And removing at least a part of the insulator deposited on the unmasked terminal portion. An electrode group having first and second terminal portions and a substrate to which the insulator layer covering the electrode group is fixed, wherein the first terminal portion is disposed on one side of the substrate, and the other end of the substrate A method for manufacturing a flat panel display in which the second terminal portion is disposed on the (iii) side. In a mother substrate for multi-face acquisition including a plurality of substrate members having the same size as the substrate, At least two electrode groups having the same pattern as the electrode group are formed side by side such that the first terminal portion in one electrode group and the first or second terminal portion in the other electrode group are adjacent to each other, The mother substrate on which the two electrode groups are formed is disposed in a reaction chamber of a chemical vapor deposition apparatus, In the reaction chamber, an insulator is deposited on the mother substrate on which the two electrode groups are formed, without masking the adjacent terminal portions and masking the remaining terminal portions. A method for manufacturing a flat panel display, characterized in that at least a portion of the insulator deposited on the unmasked terminal portion in the group is removed. The method of claim 2, After depositing an insulator on the mother substrate, the mother substrate is divided into a plurality of substrates each having an electrode group, and thereafter, the flat panel display is manufactured to remove the insulator deposited on the terminal portion of each substrate. Way. And a substrate on which an electrode group having first and second terminal portions and an insulator layer covering the electrode group are fixed, wherein the first terminal portion is disposed on one side of the substrate, and on the other end side of the substrate. A method for manufacturing a flat panel display in which a second terminal portion is disposed, Forming four electrode groups having the same pattern as the electrode group in two rows side by side on a four-side acquisition mother substrate including four substrate members having the same size as the substrate; Disposing the mother substrate on which the four electrode groups are formed in a reaction chamber of a chemical vapor deposition apparatus; In the reaction chamber, the four electrode groups are formed in a state in which the four terminal portions near the center of the mother substrate are not masked and the remaining terminal portions are masked among the total eight terminal portions. Depositing an insulator on the mother substrate, And removing at least a portion of the insulator deposited on the unmasked terminal portions in the four electrode groups. The method of claim 4, wherein The first terminal portion includes a common terminal corresponding to a plurality of electrodes and larger than an individual terminal corresponding to one electrode, When the four electrode groups are formed side by side, the first terminal portion in each electrode group is adjacent to the first terminal portion in the other electrode group, A method for manufacturing a flat panel display in which an insulator is deposited on the mother substrate without masking the first terminal portion and masking the second terminal portion.

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