KR20080053830A - Liquid crystal display device - Google Patents

Abstract

An LCD(Liquid Crystal Display) is provided to prevent the light leakage from generating according to the arrangement error between a TFT(Thin Film Transistor) display panel and a color filter substrate. Plural gate lines(21) are formed on the first insulating substrate and arrayed toward the first direction. Plural data lines(62) are crossed with the gate lines and arrayed toward the second direction. Storage lines(25,26) are arrayed toward the second direction in parallel to the data lines. A pixel electrode(81) is formed at a pixel area defined by the gate line and the data line. A portion of the data line and pixel electrode is overlapped. The pixel electrode includes a protrusion member overlapped with the data line, and the protrusion member is formed between the storage line and the gate line. In the protrusion member, the pixel electrode and the data line are overlapped by 1-10 micrometer. The data line includes a light interception member overlapped with the pixel electrode.

Description

Liquid crystal display device

1 is a layout view of a liquid crystal display according to a first exemplary embodiment of the present invention.

FIG. 2 is a cross-sectional view of the liquid crystal display of FIG. 1 taken along line II-II ′. FIG.

3 is a layout view of a thin film transistor array panel included in the liquid crystal display of FIG. 1.

4 is a cross-sectional view of the thin film transistor array panel of FIG. 3 taken along line IV-IV '.

FIG. 5 is a cross-sectional view of the thin film transistor array panel of FIG. 3 taken along the line VV ′.

6 is a layout view of a color filter substrate included in the liquid crystal display of FIG. 1.

7 is a layout view of a thin film transistor array panel included in a liquid crystal display according to a second exemplary embodiment of the present invention.

FIG. 8 is a cross-sectional view of the thin film transistor array panel of FIG. 7 taken along the line VIII-VIII ′.

9 is a layout view of a thin film transistor array panel included in a liquid crystal display according to a third exemplary embodiment of the present invention.

FIG. 10 is a cross-sectional view of the thin film transistor array panel of FIG. 9 taken along the line X-X '.

<Description of the symbols for the main parts of the drawings>

1: liquid crystal display device 2: thin film transistor display panel

3: common electrode display panel 4: liquid crystal layer

10: first insulating substrate 21: gate line

22: gate electrode 25: vertical portion

26: horizontal portion 30: gate insulating film

40: semiconductor layer 55, 56 resistive contact layer

62: data line 65: source electrode

66: drain electrode 67: light blocking portion

70: shield 72: contact hole

81: pixel electrode 82: protrusion

100: second insulating substrate 120: black mattress

121: extension 130: color filter

140: common electrode

The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device having a structure for preventing light leakage due to an alignment error between a thin film transistor array panel and a color filter substrate.

Liquid crystal display (LCD) is one of the most widely used flat panel display (FPD). It consists of two substrates on which electrodes are formed and a liquid crystal layer interposed therebetween. It is a device for displaying an image by controlling the amount of light transmitted by rearranging the liquid crystal molecules of the liquid crystal layer by applying a voltage to the electrode.

The liquid crystal display includes a common electrode display panel including a common electrode and a thin film transistor array panel including a thin film transistor array. The common electrode panel and the thin film transistor array panel are disposed to face each other, and a liquid crystal layer is interposed between the two display panels. In such a liquid crystal display, when a voltage is applied between two display panels, the liquid crystal molecules of the liquid crystal layer are rearranged to adjust an amount of light transmitted to display an image. However, since the liquid crystal display cannot emit light as a non-light emitting device, a backlight unit for supplying light is disposed under the thin film transistor array panel.

Conventional liquid crystal display devices display an image by controlling the voltage applied to the thin film transistor array panel and the common electrode panel by using light supplied from the backlight. When a slight error occurs in the alignment of the thin film transistor array panel and the common electrode panel, control is performed. Light leakage phenomenon occurs when light does not leak.

Therefore, in order to reduce the failure rate of the liquid crystal display device, a structure capable of preventing light leakage even if an alignment error occurs between the thin film transistor array panel and the common electrode display panel is required.

An object of the present invention is to provide a liquid crystal display device having a structure for preventing light leakage caused by the alignment error between the common electrode display panel and the thin film transistor array panel.

Technical problems of the present invention are not limited to the technical problems mentioned above, and other technical problems not mentioned will be clearly understood by those skilled in the art from the following description.

According to an exemplary embodiment of the present invention, a liquid crystal display device includes a first insulating substrate, a plurality of gate lines arranged in a first direction on the first insulating substrate, and are insulated from and cross the gate lines. And a plurality of data lines arranged in a second direction, a storage wiring arranged in a second direction parallel to the data line, and pixel electrodes formed in the pixel region defined by the gate line and the data line. Some of the pixel electrodes overlap.

Advantages and features of the present invention and methods for achieving them will be apparent with reference to the embodiments described below in detail with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but can be implemented in various different forms, and only the embodiments make the disclosure of the present invention complete, and the general knowledge in the art to which the present invention belongs. It is provided to fully inform the person having the scope of the invention, which is defined only by the scope of the claims. Like reference numerals refer to like elements throughout.

Elements or layers referred to as "on" or "on" of another element or layer are intervened in another layer or other element as well as directly on top of another element or layer. Include all of them. On the other hand, when a device is referred to as "directly on" or "directly on" indicates that no device or layer is intervened in the middle. Like reference numerals refer to like elements throughout.

The spatially relative terms " below ", " beneath ", " lower ", " above ", " upper " It may be used to easily describe the correlation of a device or components with other devices or components. Spatially relative terms are to be understood as including terms in different directions of the device in use or operation in addition to the directions shown in the figures. Like reference numerals refer to like elements throughout.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 and 2, a liquid crystal display according to a first embodiment of the present invention will be described in detail. 1 is a layout view of a liquid crystal display according to a first exemplary embodiment of the present invention, and FIG. 2 is a cross-sectional view of the liquid crystal display of FIG. 1 taken along line II-II ′.

The liquid crystal display device 1 according to the first exemplary embodiment of the present invention includes a liquid crystal panel including a common electrode display panel 3 and a thin film transistor array panel 2 and a backlight assembly (not shown) for supplying light to the liquid crystal panel. It is configured to include.

The thin film transistor array panel 2 is a transistor made by using a thin film formed on the first insulating substrate 10 by vacuum deposition or the like, and serves as a switch to enable recording of an electrical signal on the liquid crystal. The thin film transistor array panel 2 includes the gate lines 21 and 22, the data lines 62, 65, and 66, the pixel electrode 81, and the like.

The common electrode display panel 3 plays a role in which light supplied through the backlight assembly (not shown) passes through the color filter 130 to display a predetermined image. The common electrode panel 3 is configured to distinguish between a color filter 130 for implementing color, a cell for the color filter 130, a black matrix for blocking light, and a voltage across the liquid crystal cell. It is configured to include a common electrode 140 which is a transparent electrode for applying.

The backlight assembly (not shown) serves to supply light to the liquid crystal panel. Such a backlight assembly (not shown) is classified into an edge type in which the lamp is located at the side of the light guide plate and a direct type in which the lamp is located below the diffuser plate, according to the arrangement position of the lamp.

Hereinafter, the thin film transistor array panel 2 included in the liquid crystal display according to the first exemplary embodiment of the present invention will be described in detail with reference to FIGS. 3 to 5. 3 is a layout view of a thin film transistor array panel included in the liquid crystal display of FIG. 1, FIG. 4 is a cross-sectional view of the thin film transistor array panel of FIG. 3 taken along the line IV-IV ′, and FIG. 5 is a view of the thin film transistor array panel of FIG. 3. It is a cross-section taken by the VV 'line.

The thin film transistor array panel 2 according to the first exemplary embodiment of the present invention includes the gate wirings 21 and 22, the storage wirings 25 and 26, the gate insulating film 30, and the semiconductor layer formed on the first insulating substrate 10. 40, resistive contact layers 55 and 56, data lines 62, 65 and 66, passivation layer 70, pixel electrode 81 and the like.

The first insulating substrate 10 is formed of a material having heat resistance and light transmittance, such as transparent glass or plastic.

Gate wirings 21 and 22 and storage wirings 25 and 26 are formed on the first insulating substrate 10, and the two wirings may be formed together on the same layer on the first insulating substrate 10. . The gate wirings 21 and 22 and the storage wirings 25 and 26 may be formed of aluminum-based metals such as aluminum (Al) and aluminum alloys, and silver-based metals such as silver (Ag) and silver alloys, copper (Cu), and copper. Copper-based metals such as alloys, molybdenum-based metals such as molybdenum (Mo) and molybdenum alloys, it may be made of a metallic material such as chromium (Cr), titanium (Ti), tantalum (Ta). In addition, the gate lines 21 and 22 and the storage lines 25 and 26 may have a multilayer structure including two conductive layers (not shown) having different physical properties.

Here, the gate lines 21 and 22 refer to the gate line 21 arranged in the first direction of the first insulating substrate 10 and the gate electrode 22 formed in the form of protrusions on the gate line 21. The wirings 25 and 26 are applied to the storage voltage to form a storage capacitor together with the pixel electrode 81 to be described later.

Specifically, the gate wires 21 and 22 are arranged in a first direction such as a horizontal direction, for example, and the gate electrodes 21 protruding in the form of protrusions from the gate line 21 and the gate line 21 to transmit the gate signal ( 22, and the gate electrode 22 forms a terminal of the thin film transistor together with the source electrode 65 and the drain electrode 66 which will be described later.

The storage wirings 25 and 26 overlap with a portion of the pixel electrode 81 and an interlayer insulator, thereby maintaining a constant pixel voltage. The storage wires 25 and 26 are horizontal parts 26 arranged in the first direction so as to be parallel to the gate wires 21 and 22, and vertical parts connected to the horizontal parts 26 and one end thereof are arranged in the second direction. (25). The vertical portion 25 is formed to overlap a portion of the data lines 62, 65, and 66, which will be described later.

The horizontal portion 26 is arranged in the first direction like the gate line 21, and a storage voltage is applied to form the storage capacitor together with the pixel electrode 81. The horizontal part 26 is disposed such that the pixel electrode 81 and a predetermined portion overlap each other, and the horizontal portion 26 is spaced apart from the gate line 21 and arranged in a first direction in parallel.

The vertical portion 25 partially overlaps the pixel electrode 81 to form a storage capacitor, and is formed of a metallic material, such as a non-transmissive material such as the gate lines 21 and 22, to serve as a light blocking layer. One end of the vertical portion 25 is connected to the horizontal portion 26 and is disposed in a second direction such as a vertical direction. The vertical part 25 is applied with a storage voltage to one end connected to the horizontal part 26, and the other end is formed adjacent to the gate line 21 of the adjacent cell, but is spaced apart at regular intervals to be electrically insulated. do.

A gate insulating layer 30 made of an insulating material such as silicon nitride (SiNx) is formed on the gate lines 21 and 22 and the storage lines 25 and 26.

The semiconductor layer 40 made of hydrogenated amorphous silicon, polycrystalline silicon, or the like is formed on the gate insulating layer 30. The semiconductor layer 40 may have various shapes such as an island shape and a linear shape. For example, the semiconductor layer 40 may be formed in an island shape on the gate electrode 26 as in the present embodiment. In addition, it may be formed linearly having a shape positioned below the data line 62 and extending to an upper portion of the gate electrode 22. In the case of the linear semiconductor layer, it may be formed by patterning the same as the data line 62.

On the semiconductor layer 40, resistive contact layers 55 and 56 made of a material such as n + hydrogenated amorphous silicon doped with a high concentration of silicide or n-type impurities are formed. These ohmic contacts 55 and 56 improve the contact characteristics of the source electrode 65 and the drain electrode 66 and the semiconductor layer 40 which will be described later. Therefore, when the contact characteristics of the semiconductor layer 40, the source electrode 65, and the drain electrode 66 are good, the ohmic contacts 55 and 56 may be omitted.

In addition, the ohmic contacts 55 and 56 may have various shapes such as islands and linear shapes. For example, in the case of the islands resistive contact layers 55 and 56 as in the present embodiment, the drain electrode 66 and the source may be used. Located below the electrode 65, the linear ohmic contact layer may extend to the bottom of the data line 62.

The data lines 62, 65, 66, and the drain electrode 66 are formed on the ohmic contacts 55 and 56 and the gate insulating layer 30. The data lines 62, 65, and 66 refer to the data line 62, the source electrode 65, and the drain electrode 66.

The data line 62 is arranged in a second direction such as a vertical direction to intersect the gate line 21, and receives a data signal and transmits the data signal to the source electrode 65. The data lines 62 may be disposed to overlap the storage lines 25 and 26, and the widths of the lines may be smaller than the widths of the storage lines 25 and 26.

The source electrode 65 is branched from the data line 62 so that one end thereof is connected to the data line 62, and the other end is disposed above the semiconductor layer 40 so that a portion of the source electrode 65 overlaps with the semiconductor layer 40. do.

One end of the drain electrode 66 is disposed above the semiconductor layer 40 so that a portion of the drain electrode 66 overlaps the semiconductor layer 40. The drain electrode 66 is spaced apart from each other at a predetermined interval so as to face the source electrode 65 around the gate electrode 22. Is formed.

The source electrode 65 and the drain electrode 66 form a switching element together with the gate electrode 22 described above. When a voltage is applied to the gate electrode 22, the source electrode 65 and the drain electrode 66 are formed. Current flows between them.

The data lines 62, 65, and 66 may be formed of a single film or a multilayer film made of one or more materials among aluminum, chromium, molybdenum, tantalum, titanium, and the like. That is, the data lines 62, 65, and 66 are preferably made of refractory metals such as chromium, molybdenum-based metals, tantalum, and titanium, and include a lower layer (not shown) such as a refractory metal and an upper layer of a low resistance material disposed thereon. It may have a multilayer film structure consisting of (not shown). Examples of the multilayer film structure include a triple film of molybdenum film, aluminum film, and molybdenum film in addition to the above-described double film of chromium lower film and aluminum upper film or aluminum lower film and molybdenum upper film.

A passivation layer 70 made of an insulating layer is coated on the data lines 62, 65, and 66 and the exposed semiconductor layer 40. The passivation layer 70 is an inorganic material made of silicon nitride or silicon oxide, an organic material having excellent planarization characteristics and photosensitivity, or a-Si: C: O formed by plasma enhanced chemical vapor deposition (PECVD). and a low dielectric constant insulating material such as a-Si: O: F. In addition, when the protective film 70 is formed of an organic material, in order to prevent the organic material of the protective film 70 from contacting a portion where the semiconductor layer 40 between the source electrode 65 and the drain electrode 66 is exposed. It may have a double film structure of a lower inorganic film and an upper organic film made of silicon nitride (SiNx) or silicon oxide (SiO ₂ ).

In the passivation layer 70, a contact hole 72 exposing the drain electrode 66 is formed.

The pixel electrode 81, which is electrically connected to the drain electrode 66 through the contact hole 72, is formed on the passivation layer 70.

The pixel electrode 81 adjusts the transmittance of the pixel, thereby adjusting the light supplied from the backlight assembly (not shown) so that an image is displayed on the liquid crystal panel. The pixel electrode 81 is electrically connected to the drain electrode 66 through the contact hole 72. The pixel electrode 81 to which the data voltage is applied through the drain electrode 66 generates an electric field together with the common electrode of the common electrode display panel 3, thereby providing liquid crystal interposed between the pixel electrode 81 and the common electrode 140. Determine the arrangement of the molecules.

On the other hand, the pixel electrode 81 is made of a transparent conductor such as indium tin oxide (ITO) or indium zinc oxide (IZO) or a reflective conductor such as aluminum. The pixel electrode 81 forms a protrusion 82 where the data line 62 and a predetermined portion overlap each other. The protrusion 82 preferably has an overlapping portion of the pixel electrode 81 and the data line 62 of about 1 to 10 μm, and maintains an interval of 3 to 7 μm from the adjacent pixel electrode 81. . As such, when the pixel electrode 81 is formed to overlap a portion of the pixel electrode 81 and the data line 62, the storage wirings 25 and 26 are not formed to control light even in a portion where light leaks. In addition to preventing light leakage, the area that can actually control light becomes larger.

An alignment layer (not shown) may be coated on the pixel electrode 81 and the passivation layer 70 to culture the liquid crystal layer.

Hereinafter, the common electrode display panel included in the liquid crystal display according to the first exemplary embodiment of the present invention will be described in detail with reference to FIGS. 2 and 6. FIG. 6 is a layout view of a common electrode display panel included in the liquid crystal display of FIG. 1.

The common electrode display panel 3 includes a second insulating substrate 100, a black matrix 120, a color filter 130, an overcoat layer (not shown), and a common electrode 140.

The second insulating substrate 100 is formed of a material having heat resistance and light transmittance, such as transparent glass or plastic. The black matrix 120 is formed on the second insulating substrate 100 to partition the pixel area.

The black matrix 120 defines a pixel area, and serves to prevent light leaking in areas other than the pixel area. The black matrix 120 may be made of a metal such as chromium or chromium oxide or a metal oxide or an organic black resist.

In addition, red, green, and blue color filters 130 are sequentially arranged in the pixel region between the black matrices 120.

The black matrix 120 is to prevent the leakage of light except for the pixel area of the common electrode display panel 3. The black matrix 120 is aligned with the upper portion of the vertical part 25 of the storage wirings 25 and 26. It may be formed thinner than the vertical portion 25 of the 25, 26. In this case, since the leakage of light is prevented by the storage wirings 25 and 26, the portion in which the vertical portion 25 is positioned even when the common electrode display panel 3 slightly misaligns with the thin film transistor array panel 2. Silver light leakage does not occur. In addition, when the black matrix 120 is formed to be thinner than the vertical portion 25 in this way, a decrease in the aperture ratio may be minimized even when an alignment error occurs.

However, since the vertical portion 25 is slightly spaced apart from the gate electrode 22, the portion is extended to the black matrix 120 of the common electrode display panel 3 because the light leakage shape is likely to occur when an alignment error occurs. (121).

The expansion part 121 serves to prevent the leakage of light by preventing a gap between the vertical part 25 and the gate electrode 22, and the common electrode to overlap the vertical part 25 and the gate electrode 22. It is located in the display panel 3. The expansion part 121 is formed of the same material as the black matrix 120 and integrally formed. The size of the expansion unit 121 may be formed differently according to the allowable range of the alignment error, but is preferably about 1 to 15 μm.

The color filter 130 is composed of red, green, and blue filters, and transmits light of a specific color to each filter and mixes them, thereby displaying various colors. The color filter 130 may be arranged in a stripe, mosaic, and delta shape.

An overcoat film (not shown) made of an organic material is formed on the color filter 130. The common electrode 140 made of a transparent conductive material such as ITO or IZO is formed on the overcoat layer.

The common electrode 140 serves as a common counter electrode of all liquid crystal cells, and is formed of ITO and deposited on the entire surface of the common electrode display panel 3.

In addition, a spacer (not shown) may be formed on the pixel electrode 81 to maintain a predetermined distance from the thin film transistor array panel 2, and the liquid crystal layer 4 may be disposed at an interval maintained by the spacer (not shown). It is interposed.

Hereinafter, a liquid crystal display according to a second exemplary embodiment of the present invention will be described with reference to FIGS. 7 and 8. 7 is a layout view of a thin film transistor array panel included in a liquid crystal display according to a second exemplary embodiment of the present invention, and FIG. 8 is a cross-sectional view of the thin film transistor array panel of FIG. 7 taken along line VIII-VIII ′. For convenience of description, members having the same functions as the members shown in the drawings of the first embodiment are denoted by the same reference numerals, and therefore description thereof is omitted. As shown in Figs. 7 and 8, the liquid crystal display of this embodiment has a structure basically the same as that of the liquid crystal display of the first embodiment except for the following.

That is, the liquid crystal display device 1 according to the second embodiment of the present invention includes the light blocking portion 67 in the data line 62.

The light blocking unit 67 blocks light not controlled by the pixel electrode 81 between the storage wirings 25 and 26 and the gate line 21. The storage wirings 25 and 26 and the gate lines 21 are formed of the same material together on the same plane but must be electrically insulated from each other, so that the storage wirings 25 and 26 and the gate lines 21 have a predetermined interval. It can not be formed apart. In addition, since the pixel electrode 81 is not formed in this portion, the light blocking portion 67, which is a physical blocking film, is formed to prevent light leakage, thereby preventing light transmission.

The light blocking portion 67 is formed integrally with the same material as the data line 62. However, in order to block the space between the storage wirings 25 and 26 and the gate line 21, the light blocking part 67 is formed to make the data line 62 somewhat wider.

In this case, since the light blocking part 67 overlaps part of the pixel electrode 81, light that is not controlled by the pixel electrode 81 can not be transmitted.

Hereinafter, a liquid crystal display according to a third exemplary embodiment of the present invention will be described with reference to FIGS. 9 and 10. 9 is a layout view of a thin film transistor array panel included in a liquid crystal display according to a third exemplary embodiment of the present invention, and FIG. 10 is a cross-sectional view taken along line X-X ′ of the thin film transistor array panel of FIG. 9. For convenience of description, members having the same functions as the members shown in the drawings of the first embodiment are denoted by the same reference numerals, and therefore description thereof is omitted. As shown in Figs. 9 and 10, the liquid crystal display of this embodiment has a structure basically the same as that of the liquid crystal display of the first embodiment except for the following.

That is, in the liquid crystal display 1 according to the third exemplary embodiment, the pixel electrode 81 overlaps the data line 62, and the data line 62 blocks the light so that the pixel electrode 81 overlaps the pixel electrode 81. Part 67 is included.

In the process of patterning the thin film transistor array panel 2, an alignment error or a patterning defect may occur. Therefore, in order to prevent leakage of light even when such an error occurs, the pixel electrode 81 is overlapped with the data line 62 so as to expand a region in which light can be controlled, and the data line 62 is arranged in the pixel electrode. It is preferable to further include the light blocking portion 67 extended to overlap with (81).

Although embodiments of the present invention have been described above with reference to the accompanying drawings, those skilled in the art to which the present invention pertains may implement the present invention in other specific forms without changing the technical spirit or essential features thereof. I can understand that. Therefore, it is to be understood that the embodiments and examples described above are exemplary in all respects and not restrictive.

As described above, according to the liquid crystal display according to the exemplary embodiments of the present invention, the light leakage phenomenon due to the alignment error between the common electrode display panel and the thin film transistor array panel can be prevented, and the aperture ratio reduction can be minimized despite the alignment error. It can be effective.

Claims (8)

A first insulating substrate; A plurality of gate lines arranged in a first direction on the first insulating substrate; A plurality of data lines insulated from and intersecting the gate lines and arranged in a second direction; Storage wiring arranged in a second direction parallel to the data line; A pixel electrode formed in the pixel region defined by the gate line and the data line, And a portion of the data line and the pixel electrode overlap each other. The method of claim 1, The pixel electrode includes a protrusion overlapping the data line. The method of claim 2, The protrusion is formed between the storage line and the gate line. The method of claim 2, The protrusion is formed such that the pixel electrode and the data line overlap 1 to 10 μm. The method of claim 1, The data line includes a light blocking unit overlapping the pixel electrode. The method of claim 5, wherein The light blocking unit is formed between the storage line and the gate line. A second insulating substrate; A common electrode formed on the entire surface of the first insulating substrate and serving as an opposite electrode of the liquid crystal cell; And And a black matrix disposed on the first insulating substrate to define a pixel area and to have an extension protruding toward the pixel area. The method of claim 7, wherein The expansion unit has a size of 1 to 15㎛ liquid crystal display device.

Images