KR20080053115A - Packet switching system for load shared switch redundancy - Google Patents

Abstract

A packet switching system for distributed processing redundancy is provided to distribute and transfer traffic load when duplicated switch devices are normal and not to transfer a packet to a switch in an abnormal status when a switch is abnormal, thereby performing switching for fast packet transmission by changing a switching selection bit field and minimizing a packet loss. A packet switching system for distributed processing redundancy comprises packet switch units(100,101), control units(102,103), and plural packet processing units(104~107). The packet switch units include at least two switches, makes the switches duplicated, receives a packet to each of the duplicated switches, and switches and outputs the packet. At least one of the control units is operated in an active mode in the packet switch units. The other of the control units is operated in a standby mode in the packet switch units. Each of the plural packet processing units are connected to each switch in the duplicated packet switch to input the packet to the packet switch units or receive the packet switched and outputted by the packet switch units.

Description

Distributed processing redundant packet switching system {Packet switching system for load shared switch redundancy}

1 is a block diagram showing an example of the configuration of a distributed processing redundant packet switching system according to the present invention.

2 shows an example of the configuration of a packet processing apparatus according to the present invention.

3 illustrates an example of a structure of a packet processing unit according to the present invention.

4 illustrates a switch selection control register structure for packet forwarding in accordance with the present invention.

5 shows a state of a switch selection control method according to a switch state transition.

6 shows a logic diagram for switch path selection control.

TECHNICAL FIELD The present invention relates to communication and computer systems, and more particularly, to a system for providing a packet processing function having high reliability.

Conventional packet switching devices are tightly coupled with packet processing and switch functions, and the system's high reliability and capacity expansion are not easy. It also has the problem that there is no countermeasure in the event of a device failure.

The technical problem to be achieved by the present invention is to provide a distributed processing redundant packet switching system that can be prepared in case of failure while facilitating reliability and capacity expansion to solve the above problems.

In the distributed processing redundant packet switching system according to the present invention for solving the above technical problem, a packet including at least two switches, the switches are duplicated, receiving and switching the packet as an input of each of the redundant switches to output Switch unit; A controller for operating at least one of the packet switch unit in an active mode and the other in a standby mode; And a plurality of packet processing apparatuses connected to each switch in the redundant packet switch, respectively, to receive a packet into the packet switch unit or to receive a packet that is switched and output from the packet switch unit.

The packet switch duplexed with the load balancing structure causes the input packet to be switched and outputted, and the packet processing apparatus processes the packets output from the packet switch unit.

The controller may be configured to prevent an output from being generated from a switch in which an error occurs when an error occurs in the packet switch unit. The controller corresponding to a switch operating in the active mode when the controller is separately present in each switch. Exchanges control messages necessary for packet switching and packet processing with the packet processing apparatuses.

The controller transmits the abnormality among the packet switch units to each of the plurality of packet processing apparatuses so as to ignore the output from the switch in which the abnormality occurs.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a block diagram showing an example of the configuration of a distributed processing redundant packet switching system according to the present invention.

This system includes at least two switches (100, 101), the switches are redundant, the packet switch unit (100, 101) for receiving and switching the input of each of the redundant switches, the minimum of the packet switch unit One is in the active mode, the other is in the standby mode, the control unit (102, 103), respectively connected to each switch in the redundant packet switch to input the packet to the packet switch unit (100, 101) or packet switch unit ( A plurality of packet processing devices (104 to 107) for receiving a packet that is switched and output in the 100, 101.

In FIG. 1, the packet switch unit includes two switches, a packet switch A 100 and a packet switch B 101. Hereinafter, the packet switch unit will be described as having the two packet switches.

Since the double capacity is used for redundancy, it can be seen that the switching system of FIG. 1 according to the present invention can easily expand the packet processing capacity. In addition, the dual packet switching system applied to the present invention as shown in FIG. 1 provides high availability and reliability.

The redundant packet switch devices 100 and 101 are connected to the packet processing devices 104 to 107 through a standardized 10G XAUI interface. Each of the distributed packet processing devices 104 to 107 is connected to the packet switch devices A and B 100 and 101 through two XAUI interfaces, respectively.

At this time, one XAUI interface is connected to the packet switch A (100) and another XAUI interface is connected to the packet switch B (101). The duplicated packet switch performs all packet switching functions in a normal state and performs packet switching through a normal switch in an abnormal state. Therefore, the packet switch system according to the present invention has a load balancing function for distributing and processing packet processing from the packet processing apparatus in a normal state.

The controllers 102 and 103 are main controllers that perform routing protocol performance, state management, and maintenance functions of the packet switching system. The two controllers operate as active and standby by negotiating with each other.

The active control unit exchanges various control messages with the packet processing apparatuses 104 to 107 via the control message transmission path 109. Various table information necessary for packet delivery is also delivered through the control message delivery path. A signal indicating normal / abnormal of the packet switch device is directly connected to each packet processing device through the path of reference numeral 110 to immediately select the switch device in the packet forwarding path for the failure of the switch device.

Reference numeral 111 denotes, for example, an interface of 1 Gbps indicating subscriber network matching.

2 shows an example of the configuration of a packet processing apparatus according to the present invention. The packet processing apparatus includes a packet processing control unit 200, a switch matching unit 201, a packet processing unit 202, and a subscriber multiplexing matching unit 206. The packet processing unit 202 includes a lookup engine 205 and a forwarding memory ( 204 is tightly coupled with the packet memory 203 to store, route, and forward packets.

The packet processing control unit 200 transmits and receives packet forwarding control and table information through the control message paths 109 and the control units 102 and 103 of the switch device, and detects the switch status signal 110 or 207 to transmit the packet switch A. A path control function to the 100 or the B 101 is performed.

The switch matching unit 208 provides two XAUI interfaces 208 and 209 connected with the packet switch A 100 or the B 101. The lookup engine 205 performs a search function on the lookup key according to the delivery policy of the received packet, and delivers the index value corresponding to the matching key to the packet processor 202. The forwarding memory 204 is a memory that stores various tables of forwarding information necessary for forwarding a packet, and includes next hop information, switch path information, and packet forwarding information. The packet memory 203 temporarily stores the received packet until delivered to the next hop by scheduling according to the forwarding information.

The subscriber multiplexing matching unit 205 is connected to a plurality of subscriber stations 210 to multiplex packets from a plurality of subscribers and deliver them to the packet processing unit 202 or to transfer the packets processed by the packet processing unit 202 to a corresponding user terminal. send.

3 illustrates an example of a structure of a packet processing unit according to the present invention.

The packet processing unit 202 inside the packet processing apparatus includes a packet header processing unit 300, a lookup processing unit 301, a forwarding information extraction unit 304, a packet header operation unit 307, and a packet combination unit 308. The switch matching unit 311 is connected to the packet switch A (100) or B (101).

When the IP packet is received, the packet header processing unit 300 analyzes the packet header and extracts a lookup key such as MAC address, IP address, and TCP port information according to an error checking and forwarding policy of the packet header.

The lookup processor 301 transmits the lookup key extracted by the packet header processor 300 to the lookup engine 205 to receive index information corresponding to the key value. An arrow 303 denotes a lookup key transmitted to the lookup engine 205, and an arrow 302 denotes index information received from the lookup engine 205.

The forwarding information extractor 304 fetches the forwarding information stored in the forwarding memory 204 by using the index value received from the lookup processor 301. The forwarding information includes {next hop port information, switch matching port information, next hop MAC information, QoS information, packet acceptance information, etc.}.

In the present invention, the switch redundancy control function of the load balancing redundant switch is performed by using the switch matching port information among such information. An arrow 306 indicates addressing to the forwarding memory 204 and reference numeral 305 indicates fetching the corresponding forwarding information from the forwarding memory 204.

The packet header manipulator 307 utilizes forwarding information extracted by the forwarding information extractor 304 to manipulate a header including a TTL value change, a MAC address change, and a QoS information change for a packet to be delivered to the next hop. Perform the function.

The packet combiner 308 reads the packet from the packet memory 203, combines the changed packet header, and delivers the packet to the switch matcher 311. Arrows 310 and 309 denote pointers and packet data for reading the packet to be delivered, respectively.

4 illustrates a switch selection control register structure for packet forwarding according to the present invention.

Reference numeral 400 denotes two bits indicating a path to switch A and switch B of the forwarding table information stored in the forwarding memory. In this case, when the corresponding bit is 1, it means that the corresponding switch is selected. For example, when switch A and switch B are normal, bit A B = '10' selects switch A, and when AB = '01', selects switch B path. The switch selection control matching unit 401 indicates a function unit for controlling switch selection. When an abnormal state of the switch A or switch B occurs, the switch selection control matching unit 401 is configured from the switch selection bit of the forwarding table and the packet processing control unit 200 that have already been set. The mask selection path and the path control bits that are set are combined to control the switch selection path. Reference numeral 402 denotes a final next hop forwarding register determined by the switch matching unit 401 serving as the switch selection control function. The reference numeral 403 shows a state of the forwarding register controlled by the control unit of the reference numeral 401 according to the state of the switch.

5 shows a state of a switch selection control method according to a switch state transition.

The states of two switches, Switch A and Switch B, which consist of redundancy, can be classified into four states. The state of S0 500 is switch A, switch B is all normal state, S1 (501) is switch A normal, switch B abnormal state, S2 502 states are switch A abnormal, switch B normal state, S3 503 Denotes an abnormal state in both switch A and switch B, respectively.

In each state, two bits A1 B1 represent a switch select bit field fetched from the forwarding memory 204, and two bits of A2 B2 represent a control mask bit according to the switch state. This is used for the mask to not apply the switch select bit fetched from the forwarding table. The two bits of A3 and B3 are used for switch selection control depending on the state of switches A and B.

In the S0 state, both switches are normal, so do not set the forced switch select bit with A2 B2 = 11 without masking as shown at 504 (A3 B3 = 00). If the switch B is abnormal in the S0 state and the switch A is normal, the state transitions to the S1 state and A2 B2 as shown by reference numeral 505 to perform a mask function on two bits of the switch select bit field A1B1 fetched from the forwarding memory 204. Set it to '00' and set two bits A3 B3 = '10' to force switch A to be selected. When the switch B is in the normal state in the S1 state, the state transitions to the S0 state, and as shown by reference numeral 504, each bit is set so that the path is set to the switch set in the forwarding table.

On the other hand, if the switch A becomes abnormal in the S0 state, the state transitions to the S2 state, and the mask function is performed on the two bits of the switch select bit field A1 B1 fetched from the forwarding memory as in reference numeral 506 (A2 B2 = # 00). Set bit 2 A3 B3 = 01 to force selection of switch B. In addition, when the switch A is in the normal state in the S2 state, the state transitions to the S0 state, and each bit is set as shown by reference numeral 504 to set the path to the switch set in the forwarding table.

If switch A and switch B go to abnormal state in both S1 and S2 state (both switches are abnormal state), the state transitions to S3 state, and the control bit is set as indicated by reference numeral 507 to prevent packet forwarding.

In the S3 state, when the switch A becomes normal, the state transitions to the S1 state. When the switch B becomes the normal state, the state transitions to the S2 state, and the packet is delivered to the corresponding switch corresponding to the state.

6 shows a logic diagram for switch path selection control.

As mentioned in FIG. 5, two bits A1 B1 indicate a switch select bit field fetched from the forwarding memory, and two bits A2 B2 indicate a control mask bit according to a switch state. This is used for the mask to not apply the switch select bit fetched from the forwarding table.

A1 operates logically with A2 representing the mask value, and if A2 = 0, the value of A1 is masked and operates with OR, which is set according to the switch state, to determine the bit state of the SA that is the result of the final switch selection. Similarly, B1 operates by AND with B2 representing a mask value. If B2 = 0, the value of B1 is masked and operates with OR with B3 set according to the switch state to determine the bit state of SB that is the result of the final switch selection.

As described above, the present invention can be applied to an easy-to-capacity packet switching system for accommodating a plurality of PON subscribers such as an optical subscriber network. In the case where the packet switch device is normal, the load is distributed and processed for packet traffic. If a failure occurs in the switch device, the packet service that was switched to the failed switch device continues traffic service through the normal switch device.

That is, according to the present invention, if the packet switch device composed of redundancy is normally handled by distributing the load to the packet traffic, if a failure occurs in one switch device, the packet switched to the failed switch device is normally switched. It provides a function to continue the traffic service through.

According to the present invention, a packet switch unit including at least two switches, the switches of which are redundant, receiving and switching the same packet as an input of each of the redundant switches at the same time. The other, the control unit operating in the standby mode; Each packet is connected to each switch in the redundant packet switch, and includes a plurality of packet processing apparatuses for receiving a packet to the packet switch unit or a packet output from the packet switch unit. The load is distributed and transmitted, and when one switch is in an abnormal state, the packet processing device does not transmit the packet to the abnormal state switch. And by changing the switch selection bit field of the forwarding information, it is possible to switch the switch of the fast packet forwarding, and as a result, it is possible to minimize the packet loss.

Claims (11)

A packet switch unit including at least two switches, the switches of which are duplexed to receive a packet as an input of each of the duplexed switches, and to output the packet; A controller for operating at least one of the packet switch unit in an active mode and the other in a standby mode; And And a plurality of packet processing apparatuses connected to each switch in the redundant packet switch, respectively, to input a packet to the packet switch unit or to receive a packet that is switched and output from the packet switch unit. Packet switching system. The method of claim 1, And the controller is configured to switch and output all packets inputted to a normal switch. The method according to claim 1 or 2, And the controller is configured to prevent an output from being generated from a switch in which an error occurs when an error occurs in the packet switch unit. The method according to claim 1 or 2, When the control unit exists separately for each switch, the control unit corresponding to the switch operating in the active mode exchanges a control message for packet switching and packet processing with the packet processing apparatuses. . The method according to claim 1 or 2, The control unit transmits the abnormality in the packet switch unit to each of the plurality of packet processing apparatuses, so that the output is ignored by the switch in which the abnormality occurs. The method according to claim 1 or 2, Each switch of the packet switch unit is connected to each of the packet processing apparatus via a 10G XAUI interface. The method according to claim 1 or 2, Each of the packet processing apparatus, A packet processing control unit for transmitting and receiving packet transmission control and table information to the control unit and controlling a path to each switch in the packet switch by receiving a signal of a switch state; A switch matching unit providing a plurality of interfaces connected to each switch in the packet switch; A packet processing unit which performs packet processing including a function of storing, routing, and forwarding a packet transmitted from the switch matching unit to the switch matching unit; A lookup engine that performs a search function on a lookup key according to a delivery policy of a received packet and delivers an index value corresponding to a matching key to the packet processor; A forwarding memory configured to store a table of forwarding information necessary for forwarding the corresponding packet including next hop information, switch path information, and whether packet forwarding is allowed; A packet memory for temporarily storing the received packet until it is delivered to the next hop by scheduling according to the forwarding information; And A subscriber multiplexing matching unit connected to a plurality of subscriber stations and multiplexing packets from a plurality of subscribers to the packet processing unit or transmitting a packet processed by the packet processing unit to a corresponding user terminal; Processing redundant packet switching system. The method of claim 7, wherein The packet processing unit, A packet header processing unit for analyzing a packet header when an IP packet is received and extracting a lookup key such as MAC address, IP address, and TCP port information according to an error checking and forwarding policy of the packet header; A lookup processing unit which delivers the lookup key extracted by the packet header processing unit to the lookup engine and receives index information corresponding to the key value; A forwarding information extraction unit for fetching forwarding information stored in the forwarding memory using index information of the lookup processing unit; A packet header operation unit configured to perform a header manipulation function including a TTL value change, a MAC address change, and a QoS information change for a packet to be delivered to the next hop by using the forwarding information extracted by the forwarding information extractor; And And a packet combiner which reads a packet from the packet memory and combines the changed packet header with the changed packet header to the switch matching unit. The method of claim 8, The forwarding information includes next hop port information, switch matching port information, next hop MAC information, QoS information, and packet acceptance information. The method of claim 9, Distributed processing characterized in that the switch to forward the packet is determined according to the value of the switch path selection field included in the next hop forwarding table information of the forwarding information and the switch path selection field included in the next hop forwarding register. Redundant Packet Switching System. The method of claim 10, And deciding which switch to forward the packet to by further inputting information on the state of each switch transmitted from the control unit when determining the switch to forward the packet to.

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