KR20080048291A - Digital device consisting of multiple processors and method for multi processing interface - Google Patents

Abstract

A digital processing device including a plurality of processors and a method for connecting the processors are provided to improve performance of a main processor and reduce total power consumption by minimizing the quantity of signals or data processed in the main processor, and realize stable operation of an additional processor by enabling the additional processor to be operated independent of the main processor. An input part(310) receives an input signal. A main processor(330) generates an application operating signal corresponding to the input signal and transfers the application operating signal and the input signal to an additional processor. An additional processor(340) operates an application corresponding to the application operating signal and processes a command corresponding to the input signal in the operated application. The main processor includes an application operator generating the application operating signal corresponding to the inputting signal, a connector transferring the input signal and the application operating signal to the additional processor, a platform installing a predetermined OS(operation System) and the application to the digital processing device, and a command performing connector enabling the application to be operated in the predetermined OS. An auxiliary storage unit(360) stores the data processed by the additional processor.

Description

Digital device consisting of multiple processors and method for multi processing interface

1 is a block diagram illustrating a configuration of a digital processing apparatus including a plurality of conventional processors.

2 is a diagram illustrating a configuration and a connection of a conventional main processor and an additional processor.

3 is a block diagram illustrating a configuration of a digital processing apparatus including a plurality of processors according to an embodiment of the present invention.

4 is a diagram illustrating a configuration and a connection of a main processor and an additional processor according to an exemplary embodiment of the present invention.

5 is a flowchart illustrating an operation sequence of a main processor according to an exemplary embodiment of the present invention.

6 is a flowchart illustrating an operation sequence of an additional processor according to an exemplary embodiment of the present invention.

The present invention relates to a digital processing apparatus and a connection method between a plurality of processors included in the digital processing apparatus, and more particularly, digital processing to enable efficient use of each processor in a digital processing apparatus including a plurality of processors. A method of connection between an apparatus and a plurality of processors is provided.

As an example of a digital processing device, a portable terminal refers to an electronic device that is formed in a small size to facilitate a user's portability in order to perform a function such as a game or a mobile communication. The portable terminal includes a mobile communication terminal, a personal digital assistant (PDA), a portable multimedia player (PMP), and the like.

Among them, a mobile communication terminal is essentially a device implemented so that a mobile user can make a telephone call with a remote receiver. However, due to the development of science and technology, recent mobile communication terminals have additional functions such as a camera function and a multimedia data reproduction function in addition to the essential functions such as a telephone call function, a short message transmission and reception function, and an address book management function.

Digital processing apparatuses having such various functions include digital processing apparatuses, each including a processor for performing essential functions and a processor for performing essential functions in addition to essential functions in one device. It consists.

Hereinafter, a processor required to perform an essential function of the digital processing device is called a main processor, and a processor that performs additional functions will be referred to as an additional processor.

First, a configuration of a digital processing apparatus including a plurality of conventional processors will be described with reference to FIG. 1.

1 is a block diagram illustrating a configuration of a digital processing apparatus including a plurality of conventional processors.

As shown in FIG. 1, the digital processing apparatus 100 including a plurality of processors includes an input unit 110, a display unit 120, a main processor 130, an additional processor 140, a storage unit 150, and an auxiliary unit. The storage unit 160 may be included.

The input unit 110 generates an input signal for performing various functions of the digital processing apparatus 100 and transmits it to the main processor 130.

The display unit 120 displays information including letters, numbers, pictures, and the like of the digital processing apparatus 100. The display unit 130 may preferably be a liquid crystal display (LCD) provided in the digital processing apparatus 100. Since the final result data of the data for performing the actual additional function is processed in the main processor 130, the display unit 130 may be added. The processor 140 and the display unit 120 are not connected.

The main processor 130 controls the overall operation of the digital processing apparatus 100 and performs a function related to a function (for example, a phone call in the case of a mobile communication terminal) according to the original purpose of the digital processing apparatus 100. .

The additional processor 140 performs additional functions such as a camera function and a multimedia data reproduction function in the mobile communication terminal, for example, which are not related to the functions according to the original purpose of the digital processing apparatus 100.

The storage unit 150 is connected to the main processor 130 and stores an operation program, various data, and the like of the digital processing apparatus 100. The storage unit 150 may be configured as a flash memory or an electrically erasable programmable read only memory (EEPROM).

The secondary storage unit 160 stores data processed by the additional processor 140. The secondary storage unit 160 may be a static RAM (SRAM) or a synchronous DRAM (SDRAM).

Although FIG. 1 illustrates that the main processor 130 and the additional processor 140 are connected to separate storage units (storage unit 150 and auxiliary storage unit 160), one storage unit may be connected to the main processor 130. The additional processor 140 may be configured to share.

Each of the processors may also have a storage unit therein for storing the processed data.

On the other hand, the form and quantity of the additional processor 140 may vary depending on what additional functions are provided in the digital processing apparatus 100.

For example, the additional processor 140 for performing a camera function may perform a function such as JPEG encoding or JPEG decoding, and the additional processor 140 for performing a music file reproduction function may be performed. Encoding, decoding, and the like of music files can be performed.

Meanwhile, the main processor 130 is a baseband processor or a main processor, and the additional processor is related to a function for playing and controlling multimedia data (hereinafter, referred to as a 'multimedia function') of various additional functions. Multi Media Processor), but is not limited thereto.

In the conventional digital processing apparatus 100, the configuration and connection of the conventional main processor 130 and the additional processor 140 will be described with reference to FIG.

FIG. 2 is a diagram illustrating a configuration and a connection of a conventional main processor 130 and an additional processor 140. In particular, the additional processor 140 exemplifies a case in which multimedia capability is performed.

As shown in FIG. 2, in the conventional digital processing apparatus 100, the main processor 130 includes an application 200 related to the execution of the additional functions of the additional processor 140 and an API for enabling such applications to actually run. (Application Program Interface) 210, Platform Solution (PS) 220, and MultiMedia Interface (MMI) 230.

First, the application 200 is a command execution unit that generates data by performing a command corresponding to an input signal input through the input unit 110 of the digital processing apparatus 100.

The API 210 is a command execution connection that allows a command that can be executed in the application 200 to operate in a specific operating system (OS).

The PS 220 is a platform that enables a specific operating system and an application 200 to operate in the digital processing apparatus 100 in which a predetermined signal and data processing method is implemented in hardware.

The MMI 230 is a connection for connecting the main processor 130 and the additional processor 140. In particular, the connection for connecting the main processor 100 and the additional processor 140 when the additional processor 140 is related to a multimedia function. to be.

In this configuration of the main processor 130, executing instructions and processing data is performed in the application 200.

However, in order for the command to be executed in the application 200 and the data to be calculated, a number of functions or methods are required, and the library 240 including such functions or methods is included in the additional processor 140.

Therefore, in order to perform the multimedia function, the main processor 130 first transmits an instruction to the additional processor 140, and actually performs the operation in the additional processor 140 using functions and methods of the library 240 of the additional processor 140. To process the data and transmit the processed data to the main processor 130 again.

In the configuration and connection of the conventional main processor 130 and the additional processor 140, the main processor 130 controls the functions of the entire digital processing apparatus 100 as well as the processing of signals and instructions for the original functions. In order to perform the figure, the additional processor 200 should also be involved in processing signals and instructions for the multimedia functions.

To this end, in the related art, not only the software for the basic operation of the digital processing apparatus 100 but also all the resources related to the multimedia functions, the modules for each function actually operated, and the input signals from the user according to each function are provided in the main processor 130. Receive.

Meanwhile, in order for the multimedia function to be performed, the additional processor 140 first receives a command from the main processor 130 and performs only a function according to the received command. When the additional processor 140 completes the execution of the received command, The result data is transmitted to the main processor 130 again.

That is, since the additional processor 140 receives a command from the main processor 130 and performs a lower function according to the received command, and transmits the result data back to the main processor 130, the additional processor 140 receives the main command. A large amount of instruction execution result data should be transmitted to the processor 130.

This conventional connection and operation between the main processor and the additional processor has a problem of excessively increasing the throughput of signals or data depending on the main processor, thereby increasing the power consumption of the entire digital processing apparatus.

When the main processor is processing other signals or data, the operation of the additional processor related functions (for example, the multimedia function) is slowed down and the additional processor is determined by whether the main processor is normally operated to determine whether the additional processor operates. There is a problem that is not stable.

In addition, if all the resources related to the additional functions and the modules for each function actually operating as well as the software for the basic operation of the digital processing apparatus described above are processed in the main memory of the main processor, the capacity of the main memory of the main processor should be increased. There is a problem.

In order to solve the conventional problems as described above, the present invention can improve the performance of the main processor by minimizing the throughput of the signal or data processed in the main processor, and a plurality of the power consumption of the entire digital processing apparatus can be reduced. Disclosed is a digital processing apparatus including a processor and a method of connecting a plurality of processors.

In addition, the present invention proposes a method for connecting a plurality of processors and a digital processing apparatus including a plurality of processors, in which the additional processor may operate independently from the main processor to enable stable operation of the additional processor.

In addition, the present invention proposes a digital processing apparatus including a plurality of processors and a method of connecting the plurality of processors that do not occupy much of the capacity of the main memory of the main processor and thus do not increase the capacity of the main memory.

Still other objects of the present invention will be readily understood through the following description of the embodiments.

In order to achieve the above object, according to an aspect of the present invention, a digital processing device including a plurality of processors is provided.

According to a preferred embodiment of the present invention, a digital processing device including a plurality of processors, the input unit for receiving an input signal; A main processor generating an application driving signal corresponding to the input signal and transmitting the input signal and the application driving signal to an additional processor; And an additional processor for driving an application corresponding to the application operation signal and causing an instruction corresponding to the input signal to be executed in the driven application.

The main processor may include an application driver generating an application driving signal corresponding to the input signal, and a connection unit transmitting the input signal and the application driving signal to the additional processor.

The main processor may include a platform configured to install a specific operating system (OS) and applications in the digital processing apparatus; And a command execution connection for allowing the application to operate in the specific operating system.

The additional processor may include an internal memory, and the instruction may be fetched from the internal memory corresponding to the input signal.

The additional processor may transmit whether to execute the instruction corresponding to the input signal to the main processor.

The additional processor includes an application for executing the command corresponding to the input signal; And a library in which a function and a method used in an operation for executing the command are stored.

The digital processing apparatus may further include a display unit for displaying information consisting of letters, numbers, and pictures, wherein the additional processor is connected to the display unit, and the display unit may display a result of execution of an instruction performed by the additional processor. have.

According to another aspect of the present invention, a method of connecting a plurality of processors in a digital processing apparatus including a plurality of processors is provided.

According to an exemplary embodiment of the present invention, in a method of connecting to an additional processor performed by a main processor in a digital processing apparatus including a plurality of processors, receiving an input signal from an input unit included in the digital processing apparatus ( a); Generating an application driving signal corresponding to the input signal (b); And (c) transmitting the input signal and the application driving signal to the additional processor, wherein the input signal and the application driving signal transmitted to the additional processor correspond to the application operation signal in the additional processor. A method of connecting to an additional processor performed by a main processor is provided so as to drive an application to perform an instruction corresponding to the input signal in the driven application.

According to another preferred embodiment of the present invention, in a digital processing apparatus including a plurality of processors, a method of connecting to a main processor performed by an additional processor, the method comprising: receiving an input signal and an application driving signal from the main processor ( a); (B) driving an application corresponding to the application driving signal; And (c) executing a command corresponding to the input signal in the driven application, wherein the input signal is an input signal input from an input unit included in the digital processing apparatus, and the application driving signal is the main signal. Provided is a method for connecting to a main processor performed by an additional processor, wherein the processor generates a signal corresponding to the input signal.

The additional processor may transmit whether to execute the instruction corresponding to the input signal to the main processor.

The additional processor may include an internal memory, and the instruction may be fetched from the internal memory corresponding to the input signal.

According to another aspect of the present invention, there is provided a recording medium recording a program for implementing a method of connecting a plurality of processors in a digital processing apparatus including a plurality of processors.

According to an exemplary embodiment of the present invention, a program of instructions that may be executed in the digital processing apparatus may be tangibly implemented to perform a method of connecting to an additional processor performed by the main processor in a digital processing apparatus including a plurality of processors. A recording medium recording a program that can be read by the digital processing device, comprising: receiving an input signal from an input unit included in the digital processing device; Generating an application driving signal corresponding to the input signal (b); And (c) transmitting the input signal and the application driving signal to the additional processor, wherein the input signal and the application driving signal transmitted to the additional processor correspond to the application operation signal in the additional processor. There is provided a recording medium which records a program for implementing a method of connecting to an additional processor performed by a main processor, wherein the application is driven and an instruction corresponding to the input signal is executed in the driven application.

According to another preferred embodiment of the present invention, in a digital processing apparatus including a plurality of processors, a program of instructions that may be executed in the digital processing apparatus to perform a connection method with a main processor performed by an additional processor is tangibly. A recording medium having a program recorded thereon, the program being readable by the digital processing device, comprising: receiving an input signal and an application driving signal from the main processor; (B) driving an application corresponding to the application driving signal; And (c) executing a command corresponding to the input signal in the driven application, wherein the input signal is an input signal input from an input unit included in the digital processing apparatus, and the application driving signal is the main signal. There is provided a recording medium recording a connection method with a main processor performed by an additional processor, characterized in that the signal generated by the processor corresponding to the input signal.

The additional processor may transmit whether to execute the instruction corresponding to the input signal to the main processor.

The additional processor may include an internal memory, and the instruction may be fetched from the internal memory corresponding to the input signal.

As the invention allows for various changes and numerous embodiments, particular embodiments will be illustrated in the drawings and described in detail in the written description. However, this is not intended to limit the present invention to specific embodiments, it should be understood to include all modifications, equivalents, and substitutes included in the spirit and scope of the present invention.

In describing the drawings, similar reference numerals are used for similar elements. In the following description of the present invention, if it is determined that the detailed description of the related known technology may obscure the gist of the present invention, the detailed description thereof will be omitted.

Terms such as first and second may be used to describe various components, but the components should not be limited by the terms. The terms are used only for the purpose of distinguishing one component from another.

For example, without departing from the scope of the present invention, the first component may be referred to as the second component, and similarly, the second component may also be referred to as the first component.

The term and / or includes a combination of a plurality of related items or any item of a plurality of related items.

When a component is referred to as being "connected" or "connected" to another component, it may be directly connected to or connected to that other component, but it may be understood that other components may be present in between. Should be.

On the other hand, when a component is said to be "directly connected" or "directly connected" to another component, it should be understood that there is no other component in between.

The terminology used herein is for the purpose of describing particular example embodiments only and is not intended to be limiting of the present invention.

Singular expressions include plural expressions unless the context clearly indicates otherwise. In this application, the terms "comprise" or "have" are intended to indicate that there is a feature, number, step, operation, component, part, or combination thereof described in the specification, and one or more other features. It is to be understood that the present invention does not exclude the possibility or the possibility of additions or numbers, steps, operations, components, components, or combinations thereof.

Unless defined otherwise, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art.

Terms such as those defined in the commonly used dictionaries should be construed as having meanings consistent with the meanings in the context of the related art, and shall not be construed in ideal or excessively formal meanings unless expressly defined in this application. Do not.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings, and the same or corresponding components will be denoted by the same reference numerals regardless of the reference numerals and redundant description thereof will be omitted.

First, a configuration of a digital processing apparatus to which a method for connecting a plurality of processors according to an exemplary embodiment of the present invention may be applied will be described with reference to FIG. 3.

3 is a block diagram illustrating a configuration of a digital processing apparatus including a plurality of processors.

As shown in FIG. 3, the digital processing apparatus 300 including a plurality of processors includes an input unit 310, a display unit 320, a main processor 330, an additional processor 340, a storage unit 350, and an auxiliary unit. The storage unit 360 may be included.

The input unit 310 generates an input signal for performing various functions of the digital processing apparatus 300 and transmits it to the main processor 330.

The display unit 320 displays information including letters, numbers, pictures, and the like of the digital processing apparatus 300. The display unit 330 may be preferably provided in the form of an LCD (Liquid Crystal Display) in the digital processing apparatus 100.

In addition, unlike the conventional digital processing apparatus, the display unit 320 included in the digital processing apparatus 300 according to an exemplary embodiment of the present invention may be connected to the additional processor 340 to process additional functions processed by the additional processor 340. Receive and display related data

The main processor 330 controls the overall operation of the digital processing device 200 and performs a function related to the original purpose of the digital processing device (for example, a phone call in the case of a mobile communication terminal).

In addition, the main processor 330 included in the digital processing apparatus 300 according to an exemplary embodiment of the present invention transmits an input signal received from the input unit 310 to the additional processor 340 and drives an application corresponding to the input signal. Generate a signal.

The additional processor 340 performs additional functions such as a camera function and a multimedia data reproduction function in a mobile communication terminal, for example, which are not related to a function according to the original purpose of the digital processing device 300.

In addition, the additional processor 340 included in the digital processing apparatus 300 according to an exemplary embodiment of the present invention receives an input signal and an application driving signal from the main processor 330 and sends an instruction corresponding to the input signal to the application driving signal. To run in an application that is running according to Connection and configuration of the main processor and the additional processor will be described in more detail with reference to FIG. 4.

The storage 350 is connected to the main processor 330 and stores an operation program, various data, and the like of the digital processing apparatus 300. The storage unit 350 may be configured as a flash memory or an electrically erasable programmable read only memory (EEPROM).

The secondary storage unit 360 stores data processed by the additional processor 340. The secondary storage unit 360 may be a static RAM (SRAM) or a synchronous DRAM (SDRAM).

In FIG. 3, the main processor 330 and the additional processor 340 are connected to separate storage units (storage unit 350 and auxiliary storage unit 360), but one storage unit is connected to the main processor 330. The additional processor 340 may be configured in a shared form.

In addition, each of the processors may be separately provided therein a memory that is a storage unit for storing the processed data.

On the other hand, the form and quantity of the additional processor 340 may vary depending on what additional functions are provided in the digital processing apparatus 300.

For example, the additional processor 340 for performing a camera function may perform a function such as JPEG encoding or JPEG decoding, and the additional processor 340 for performing a music file reproduction function may include a music. Encoding, decoding, etc. of a file can be performed.

In particular, among the additional processors 340 that perform these various functions, in particular, a function related to the playback and control of multimedia data (hereinafter referred to as a 'multimedia function') is also called a multimedia processor (MMP). It is not limited to this.

The configuration and connection of the main processor 330 and the additional processor 340 according to an exemplary embodiment of the present invention in the digital processing apparatus 300 including the plurality of processors will be described with reference to FIG. 4.

4 is a diagram illustrating a configuration and a connection of a main processor 330 and an additional processor 340 according to an exemplary embodiment of the present invention.

Hereinafter, the case in which the additional processor 340 is related to a multimedia function and is a multimedia processor will be described by way of example. However, it is obvious that the additional processor 340 is not limited to the multimedia processor.

As shown in FIG. 4, according to an exemplary embodiment of the present invention, an API (Application Program Interface) 400 and a Platform Solution (PS) which allow an application that performs a multimedia function to be driven, are first executed in the main processor 330. 410, a multimedia interface (MMI) 420, and an application driver 430 may be included.

The API 400 is a command execution connection that allows a command that can be executed in an application to operate in a specific operating system (OS).

The PS 410 is a platform unit that enables a specific operating system and applications to operate in a digital processing apparatus in which a predetermined signal and data processing method is implemented in hardware.

The MMI 420 is a connection for connecting the main processor 330 and the additional processor 340. In particular, the MMI 420 is a connection for connecting the main processor 330 and the additional processor 340 when the additional processor 340 is related to a multimedia function. to be.

The application driver 430 generates an application driving signal as a driver for driving an application corresponding to the input signal input to the input unit 310 included in the digital processing apparatus 300.

On the other hand, the additional processor 340 may include an application (440) and a library (450).

The application 440 is a command execution unit that generates data by performing a command corresponding to an input signal input through the input unit 310 of the digital processing apparatus 300.

The library 450 includes a number of functions or methods required for an instruction to be executed in the application 440 to operate on data, and performs sub functions for performing an actual instruction.

Meanwhile, although not shown in FIG. 4, each processor may further include a core that actually performs operations for processing various data.

In the case of including a multimedia function in the mobile communication terminal, which is the most widely used digital processing device, ARM7, whose core processing speed is 22 MHz, is ARM core as the core of the main processor 330, and ARM core is the core of the additional processor 340. ARM9, which is 100Mhz, is widely used.

This is to make the processing speed of the additional processor 340 for processing the multimedia data, which is generally a large amount of data, faster than the processing speed of the main processor 330, but the configuration and processing speed of the core of each processor is shown in the example. This is only a limitation.

Meanwhile, the present invention proposes a method for increasing the efficiency of each processor without changing the physical internal configuration of the cores of the main processor 330 and the additional processor 340 and the configuration of the digital processing apparatus using the same. .

To this end, first, the application driver 430 included in the main processor 330 generates an application driving signal corresponding to the input signal input to the input unit 310 included in the digital processing apparatus 300 and performs an additional processor together with the input signal. And transmits only the key value of the execution result indicating whether the execution of the instruction executed in the additional processor 340 is successful.

The application 440 and the library 350, which are instruction execution units that perform actual instructions, are included in the additional processor 340 to perform data processing by the additional processor 340.

The additional processor 340 receives the input signal and the multimedia application driving signal, fetches a specific command corresponding to the input signal from the internal memory, and causes the command to be executed in the application 400 driven according to the driving signal. Processing of data related to multimedia functions is performed.

Therefore, the additional processor 340 includes not only an application 400 which performs a multimedia function included in the main processor, but also a module for each function that actually operates with all resources related to the multimedia function.

In addition, the command according to the received input signal actually performs multimedia functions using various functions and methods included in the library 450.

Meanwhile, unlike the conventional method, the additional processor 340 transmits the key value of the execution result indicating whether the instruction is executed to the main processor 330 without transmitting the execution result data of the instruction to the main processor 330.

The main processor 330 that receives the key value of the execution result indicating only whether the command is executed or not, determines whether the additional processor 340 executes the command according to the received key value, and if the command fails, the command is re-executed. Or additionally perform an operation such as displaying a failure to execute an instruction on the display unit 320 of the digital processing apparatus 300.

In addition, as described above, the display unit 320 of the digital processing apparatus 300 may be connected to the additional processor 340 to receive and display data related to the additional functions processed by the additional processor 340.

In addition, according to an exemplary embodiment of the present invention, the application 400 corresponding to the input signal and the input signal input through the input unit 310 of the digital processing apparatus 300 between the main processor 330 and the additional processor 340. ) Transmits only an application driving signal to the additional processor 340 from the main processor 330.

In addition, only an execution result key value indicating whether the instruction is performed is transmitted from the additional processor 340 to the main processor 330.

Accordingly, the main processor 330 does not need to expand the space of the internal memory even when the application 400 for performing the multimedia function, resources related to the multimedia function, and instructions related to the multimedia function are not stored in the internal memory.

In addition, the main processor 330 may transmit only the input signal and the application driving signal received through the input unit 300 of the digital processing apparatus 300 to the additional processor 330 instead of the command. The processing capacity of the main processor 330 is greatly reduced since only the key value is received as a result of the instruction and not the multimedia data.

In particular, as described above, when the processing speed of the additional processor 340 is configured to be faster than that of the main processor 330, the connection and configuration of the main processor 330 and the additional processor 340 may be more effective. Can be.

On the other hand, it is apparent that the components for the connection between the main processor 330 and the additional processor 340 may be implemented in the form of software installed in the main processor 330 and the additional processor (340).

Hereinafter, an operation sequence of the main processor 330 and the additional processor 340 included in the digital processing apparatus 300 according to an exemplary embodiment of the present invention will be described with reference to FIGS. 5 and 6, respectively.

First, FIG. 5 is a flowchart illustrating an operation sequence of the main processor 330 included in the digital processing apparatus 300 according to an exemplary embodiment of the present invention.

As shown in FIG. 5, the main processor 330 included in the digital processing apparatus 300 according to an exemplary embodiment of the present invention first receives an input signal generated by the input unit 310 of the digital processing apparatus 300. In operation S500, an application driving signal is generated according to the received input signal in operation S502.

The received input signal and the generated application driving signal are transmitted to the additional processor 340 (S504), and an execution result key value according to the input signal and the operation signal is received from the additional processor 340 (S506).

Meanwhile, an operation sequence of the additional processor 340 included in the digital processing apparatus 300 according to an exemplary embodiment of the present invention, which receives an input signal and an application driving signal from the main processor 330, will be described with reference to FIG. 6. .

6 is a flowchart illustrating an operation sequence of an additional processor 340 according to an exemplary embodiment of the present invention.

As illustrated in FIG. 6, the additional processor 340 receives an input signal and an application driving signal from the main processor 330 (S600). An instruction corresponding to the received input signal is fetched from the internal memory (S602), and an application 340 corresponding to the received application driving signal is driven (S604).

The additional processor 340 causes the command to be executed in the driven application 400 (S606), and generates whether the command is executed as a key value and transmits the result to the main processor 330 (S608).

Through the operations of the main processor 330 and the additional processor 340, the driving of the application 400, which takes up a large portion of the throughput of the actual processor, and the execution of instructions in the driven application are performed by the additional processor 340. By doing so, the data throughput of the main processor 330 is reduced.

In addition, unlike the related art, an instruction for processing the actual data in the driven application may be stored in the internal memory of the additional processor 340 to reduce the internal memory capacity of the main processor 330.

In addition, since the additional processor 340 may perform the operation independently of the main processor 330, the use and development of the digital processing device capable of performing various additional functions becomes more effective.

For example, according to the conventional method of connecting the main processor and the additional processor, additional functions are performed by interworking by transmitting signals and data of the main processor and the additional processor. It was necessary to determine the addition of a new additional function to the digital processing device in consideration of all the

However, according to the method of connecting the main processor and the additional processor according to an exemplary embodiment of the present invention, a user interface and a data format related to the additional function are determined by considering only the data throughput and the internal memory capacity of the additional processor. It will be possible to develop additional functions.

Preferred embodiments of the present invention described above are disclosed for purposes of illustration, and those skilled in the art will be able to make various modifications, changes, and additions within the spirit and scope of the present invention. Additions should be considered to be within the scope of the following claims.

As described above, according to the digital processing apparatus including the plurality of processors and the method of connecting the plurality of processors according to the present invention, the performance of the main processor is improved by minimizing the throughput of signals or data processed by the main processor. There is this.

In addition, the throughput of the signal or data processed in the main processor is minimized, thereby reducing the power consumption of the entire digital processing apparatus.

In addition, since the additional processor may operate independently from the main processor, the additional processor may operate stably.

In addition, since the main processor does not occupy much of its own memory, it does not need to increase the capacity of its own memory.

In addition, the additional processor may perform arithmetic processing independently of the main processor, thereby making it easy to use and develop various additional functions using the additional processor.

Claims (20)

In the digital processing device comprising a plurality of processors, An input unit for receiving an input signal; A main processor generating an application driving signal corresponding to the input signal and transmitting the input signal and the application driving signal to an additional processor; And And an additional processor for driving an application corresponding to the application operation signal, and causing an instruction corresponding to the input signal to be executed in the driven application. The method of claim 1, The main processor, An application driver generating an application driving signal corresponding to the input signal; And a connection unit for transmitting the input signal and the application driving signal to the additional processor. The method of claim 1, The main processor, A platform unit for installing a specific operating system (OS) and applications in the digital processing device; And And a command execution connection to enable the application to operate on the particular operating system. The method of claim 1, The additional processor includes an internal memory, The instruction is fetched from an internal memory corresponding to the input signal. The method of claim 1, The additional processor, And transmitting whether to execute the command corresponding to the input signal to the main processor. The method of claim 1, The additional processor, An application in which the command corresponding to the input signal is executed; And And a library in which a function and a method used for an operation for executing the instruction are stored. The method of claim 1, And a display unit for displaying information consisting of letters, numbers, and pictures. The method of claim 7, wherein The additional processor is connected to the display unit, And the display unit displays a result of executing an instruction executed in the additional processor. A method of connecting to an additional processor performed by a main processor in a digital processing apparatus including a plurality of processors, (A) receiving an input signal from an input unit included in the digital processing apparatus; Generating an application driving signal corresponding to the input signal (b); And (C) transmitting the input signal and the application driving signal to the additional processor, The input signal and the application driving signal transmitted to the additional processor may drive an application corresponding to the application operation signal in the additional processor, and cause an instruction corresponding to the input signal to be performed in the driven application. The method of connection with an additional processor performed by the main processor. The method of claim 9, And wherein the additional processor transmits whether to execute the command corresponding to the input signal to the main processor. The method of claim 9, The additional processor includes an internal memory, and the instructions are fetched from the internal memory corresponding to the input signal. In the digital processing apparatus including a plurality of processors in the connection method with the main processor performed by the additional processor, (A) receiving an input signal and an application driving signal from the main processor; (B) driving an application corresponding to the application driving signal; And (C) a command corresponding to the input signal is performed in the driven application, The input signal is an input signal input from an input unit included in the digital processing device, And the application driving signal is a signal generated by the main processor corresponding to the input signal. The method of claim 12, And the additional processor transmits whether to execute the command corresponding to the input signal to the main processor. The method of claim 12, The additional processor includes an internal memory, and the instructions are fetched from the internal memory in response to the input signal. In a digital processing apparatus including a plurality of processors, a program of instructions that may be executed in the digital processing apparatus is tangibly implemented to perform a connection method with an additional processor performed by a main processor, and is read by the digital processing apparatus. In a recording medium recording a program that can be, (A) receiving an input signal from an input unit included in the digital processing apparatus; Generating an application driving signal corresponding to the input signal (b); And (C) transmitting the input signal and the application driving signal to the additional processor, The input signal and the application driving signal transmitted to the additional processor may drive an application corresponding to the application operation signal in the additional processor, and cause an instruction corresponding to the input signal to be performed in the driven application. The recording medium recording a program for implementing a connection method with an additional processor performed by the main processor. The method of claim 15, And the additional processor transmits, to the main processor, whether or not the instruction corresponding to the input signal is executed, to the main processor. The method of claim 15, The additional processor includes an internal memory, and the instructions are fetched from the internal memory in response to the input signal. A record for recording a program for implementing a connection method with the additional processor performed by the main processor. media. In a digital processing apparatus including a plurality of processors, a program of instructions that may be executed in the digital processing apparatus is tangibly implemented to perform a connection method with a main processor performed by an additional processor, and is read by the digital processing apparatus. In a recording medium recording a program that can be, (A) receiving an input signal and an application driving signal from the main processor; (B) driving an application corresponding to the application driving signal; And (C) a command corresponding to the input signal is performed in the driven application, The input signal is an input signal input from an input unit included in the digital processing device, And the application driving signal is a signal generated by the main processor corresponding to the input signal. The method of claim 18, And wherein the additional processor transmits whether to execute the command corresponding to the input signal to the main processor. The method of claim 18, The additional processor includes an internal memory, and the instructions are fetched from the internal memory in response to the input signal.

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