KR20080039033A - Plasma display device - Google Patents

Abstract

A plasma display device is provided to remove contact resistance of a connector by integrally forming a scan main board and a scan buffer board, thereby decreasing its electrical connection loss. A plasma display device includes a plasma display panel(11), a chassis base(17) mounted on the panel at one surface, circuit board assemblies mounted on the other surface of the chassis base and electrically connected to the panel, and a scan electrode driving board(15c) controlling scan electrodes. The scan electrode driving board has a scan buffer board(15c2) electrically connected to the scan electrodes extending from the panel, and a scan main board(15c1) integrally formed on the scan buffer board and electrically connected thereto. A scan integrated circuit is mounted on the scan buffer board, and scan electrode driving circuit elements are mounted on the scan main board.

Description

Plasma display device {PLASMA DISPLAY DEVICE}

1 is an exploded perspective view showing the configuration of a plasma display device according to an embodiment of the present invention.

2 is a schematic diagram showing a pattern formation relationship between a scan main board and a scan buffer board constituting the scan electrode driving board.

<Description of the symbols for the main parts of the drawings>

11; Plasma display panel 15; Circuit board assembly

15c; Scan electrode driving board 15c1; Scanning motherboard

15c2; Scanning buffer board

The present invention relates to a plasma display device, and more particularly, to a plasma display device capable of reducing electrical connection loss by improving a coupling relationship between a scan main board and a scan buffer board constituting a scan electrode driving board.

In general, a plasma display device generates a plasma by gas discharge and displays an image using the plasma, a plasma display panel (PDP), a chassis base for supporting the plasma display panel, and a plasma display panel opposite to the chassis base. It includes a plurality of circuit board assemblies mounted on the flexible printed circuit board (FPC) and connected to the sustain electrode, the scan electrode and the address electrode, respectively located inside the plasma display panel through a connector.

Plasma display panels have several tens to millions of pixels arranged in a matrix form according to their size, and are classified into a direct current type and an alternating current type according to the shape of the driving voltage waveform applied and the structure of the discharge cell.

In the DC plasma display panel, the electrode is exposed to the discharge space without being insulated, so that the current flows in the discharge space while the voltage is applied, and there is a disadvantage in that a resistance for current limitation must be made. In contrast, the AC plasma display panel has an advantage that the current is limited by the formation of a natural capacitance component because the dielectric layer covers the electrode, and the life is longer than the direct current type because the electrode is protected from the impact of ions during discharge.

In the AC plasma display panel, scan electrodes and sustain electrodes parallel to each other are formed on one surface thereof, and address electrodes are formed on the other surface in a direction orthogonal to these electrodes. The sustain electrode is formed corresponding to each scan electrode, and one end thereof is connected in common to each other.

In general, the driving method of the AC plasma display panel includes a reset period, an addressing period, a sustain period, and an erase period.

The reset period is a period for initializing the state of each discharge cell in order to smoothly perform the addressing operation on the discharge cell. The addressing period is a discharge cell that is turned on to select a discharge cell that is turned on and a discharge cell that is not turned on. This is a period in which wall charges are accumulated by applying an address voltage to the addressed discharge cells. The sustain period is a period in which discharge for actually displaying an image is performed on the addressed discharge cells by applying a sustain discharge voltage pulse, and the erasing period is a period in which the sustain discharge is terminated by reducing the wall charge of the discharge cell.

On the other hand, in the above circuit board assembly configuration, the scan electrode driving board is composed of a scan main board and a scan buffer board on which a scan IC (or a scan driver IC) is mounted. The reason is that the electrode coming from the plasma display panel is connected to the scanning buffer board through the flexible circuit board. In this configuration, the addressing of the plasma display panel is performed by the operation of the scan IC on the scan buffer board, and the output of the scan IC corresponds 1: 1 with the scan electrode located on the plasma display panel. Therefore, the vertical length of the scanning buffer board is usually provided to be equal to or slightly smaller than the vertical length of the panel.

However, in recent years, the plasma display panel has been enlarged, and thus the size of the scan buffer board has increased. The scan main board and the scan buffer board are designed and mounted separately in the chassis base, and the scan main board and the scan buffer board are electrically connected through a connector.

In the hardware design of the scan main board and the scan buffer board, there are layout problems due to the pin connection between the scan main board and the scan buffer board, or a price problem depending on the size of the scan main board and the scan buffer board.

For example, since the pattern must be defined for the connector connection for electrically connecting the scan main board and the scan buffer board in a state separated from each other, there is a problem in that an area in which the effective pattern is lost on the substrate is generated.

An object of the present invention is to improve the electrical connection structure of the scanning main board and the scanning buffer board constituting the scanning electrode driving board to provide a plasma display device that can reduce the electrical connection loss between the scanning main board and the scanning buffer board. There is.

In order to achieve the above object, the present invention provides a plasma display panel, a chassis base to which a plasma display panel is attached to one surface, circuit board assemblies electrically mounted to another surface of the chassis base and electrically connected to the plasma display panel, and a circuit board assembly. A scan electrode driving board for controlling the scan electrodes and a scan electrode driving board electrically connected to the scan electrodes drawn from the plasma display panel, and a scan buffer board and a scan buffer board on which a scan integrated circuit (IC) is mounted. It is preferable to include a scanning main board which is formed integrally and electrically connected and to which the scan electrode driving circuit element is mounted.

In the above configuration, the apparatus may further include a signal transmission member electrically connecting between the scan electrode terminal drawn out from the plasma display panel and the scan buffer board, wherein the signal transmission member may be configured as a flexible printed circuit board (FPC). Can be.

The scanning main board and the scanning buffer board are formed differently from each other in the longitudinal direction and the width direction of each board, and the scanning main board is formed shorter than the scanning buffer board in the longitudinal direction and longer than the scanning buffer board in the width direction. Can be.

The circuit board assemblies generate an address buffer board for controlling the address electrode, a sustain electrode driving board for controlling the sustain electrode, a control signal for driving the address electrode, and a control signal for driving the sustain electrode and the scan electrode, respectively. It may include an image board for supplying the electrode driving board and the scan electrode driving board, a power board for supplying power for driving the circuit board assemblies.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. While many specific details are set forth in order to provide a more general understanding of the invention, such as the following description and the annexed drawings, these specific details are illustrated for the purpose of illustrating the invention and are meant to limit the invention to those details. It is not. And a detailed description of known functions and configurations that may unnecessarily obscure the subject matter of the present invention will be omitted.

1 is an exploded perspective view showing the configuration of a plasma display device according to a first embodiment of the present invention.

A configuration of a plasma display device according to an embodiment of the present invention will be described with reference to FIG. 1.

Plasma display device according to an embodiment of the present invention is the plasma display panel 11, the thermal conductive sheet 13, the circuit board assembly (15; 15a ~ 15e, PBA; Printed circuit Board Assembly), chassis base 17, chassis base A scan electrode driving board 15c mounted on the other surface of the substrate 17 and electrically connected to the scan electrodes of the plasma display panel 11 is included.

First, the plasma display panel 11 includes a front panel and a rear panel which are integrally bonded by a sealing material. The plasma display panel 11 includes discharge cells therein so that any visible light can be emitted through plasma generation. Implement color images. The plasma display panel 11 is configured to display an image by using gas discharge, and the present invention relates to the coupling relationship between the plasma display panel 11 and other components. Detailed description will be omitted.

The thermal conductive sheet 13 is interposed between the plasma display panel 11 and the chassis base 17 to conduct heat generated by the plasma display panel 11 to cause gas discharge in the planar direction of the plasma display panel 11. Diverge.

The circuit board assembly 15 includes an image board 15a, an address buffer board 15b, a scan electrode drive board 15c (scan main board 15c1, a scan buffer board 15c2), a sustain electrode drive board 15d, It includes a power board 15e, and is electrically connected to the plasma display panel 11 to drive the plasma display panel 11. The image board 15a generates a control signal for driving the address electrode, a control signal for driving the sustain electrode and the scan electrode, and generates the address buffer board 15b, the sustain electrode driving board 15d, and the scan electrode driving board 15c, respectively. To feed. The address buffer board 15b controls the address electrode, and the scan electrode driving board 15c controls the scan electrode. The scan main board 15c1 is integrally formed with the scan buffer board 15c2 and electrically connected thereto, and the scan electrode driving circuit element 18 is mounted. The scan buffer board 15c2 is electrically connected to the scan electrodes drawn from the plasma display panel 11, and the scan integrated circuit 16 is mounted. In addition, the sustain electrode driving board 15d controls the sustain electrode, and the power board 15e supplies power required for driving the above-described circuit board assemblies.

The chassis base 17 attaches and supports the plasma display panel 11 to the front thereof with double-sided tape, and supports the circuit board assemblies 15 to the rear thereof.

The embodiment of the present invention shows a pattern connection relationship between the scan main board 15c1 and the scan buffer board 15c2 constituting the scan electrode driving board 15c among the circuit board assemblies 15. Explain.

2 is a schematic diagram showing a pattern forming relationship between a scan main board and a scan buffer board of a scan electrode driving board.

1 and 2, an electrical connection relationship between a scan main board and a scan buffer board constituting a scan electrode driving board according to an exemplary embodiment of the present invention will be described.

First, as illustrated in FIG. 1, the scan buffer board 15c2 and the plasma display panel 11 have a signal transmission member 14 mounted therebetween to form an electrical connection relationship. The signal transmission member 14 is formed to contact the surfaces of the electrode terminals provided in the plasma display panel 11 and the scan buffer board 15c2, respectively, so that the plasma display panel 11 and the scan buffer board 15c2 can be contacted. Connect electrically. The scan IC 16 is mounted on the scan buffer board 15c2, and has a connection terminal to connect the scan electrodes withdrawn from the plasma display panel 11. That is, the scan electrode terminal is drawn out from the plasma display panel 11, and the connection terminal is formed on the scan buffer board 15c2. The signal transmission member 14 electrically connects the scan electrode terminal and the connection terminal. In addition, the signal transmission member 14 may be configured as a flexible printed circuit board (FPC) in consideration of the coupling relationship between the plasma display panel 11 and the scanning buffer board 15c2.

On the other hand, the scan main board 15c1 and the scan buffer board 15c2 constituting the scan electrode driving board 15c are integrally formed. The scan main board 15c1 and the scan buffer board 15c2 may have different sizes. For example, the sizes of the scanning main board 15c1 and the scanning buffer board 15c2 may be different from each other in the longitudinal direction (y-axis direction) and the width direction (x-axis direction) of each board. The scanning main board 15c1 according to the embodiment of the present invention is formed shorter than the scanning buffer board 15c2 in the longitudinal direction. The scanning main board 15c1 is formed longer than the scanning buffer board 15c2 in the width direction.

The circuit connection between the scanning main board 15c1 and the scanning buffer board 15c2 is performed by the respective patterns 22 at the boundary 20 between the scanning main board 15c1 and the scanning buffer board 15c2, as shown in FIG. Can be connected to each other. As the scan main board 15c1 and the scan buffer board 15c2 are integrally formed, a pattern connecting the scan main board 15c1 and the scan buffer board 15c2 can be designed in a wider area, and the output potential is stabilized. You can.

In the above configuration, the addressing of the plasma display panel 11 is performed by the operation of the scan integrated circuit 16 on the scan buffer board 15c2, and the output of the scan integrated circuit 16 is located in the plasma display panel 11. It is preferable to correspond to the scanning electrode in a 1: 1 ratio.

On the other hand, the detailed description of the present invention has been described with reference to specific embodiments, of course, various modifications are possible without departing from the scope of the invention.

In the exemplary embodiment of the present invention, the sizes of the scanning main board 15c1 and the scanning buffer board 15c2 are different from each other. However, those skilled in the art may understand the scanning main board 15c1 and the scanning buffer board. The shape of 15c2 can be changed into design in various forms.

For example, the scan main board 15c1 and the scan buffer board 15c2 may have the same size, and may have the same length in one direction (x-axis direction or y-axis direction).

Therefore, the scope of the present invention should not be limited to the described embodiments, but should be defined not only by the claims below but also by the equivalents of the claims.

As described above, the plasma display apparatus according to the present invention may reduce the electrical connection loss by removing the contact resistance of the connector by integrally manufacturing the scan main board and the scan buffer board.

In addition, since the connector is not used for the electrical connection between the scan main board and the scan buffer board, the output pattern can be more secured to stabilize the output potential.

In addition, it is possible to reduce the occurrence of pattern loss due to the electrical connection between the scanning main board and the scanning buffer board, and to reduce the material cost. And, there is an effect that can reduce the circuit board assembly manufacturing process.

Claims (7)

A plasma display panel; A chassis base to which the plasma display panel is attached to one surface; Circuit board assemblies mounted on the other surface of the chassis base and electrically connected to the plasma display panel; A scan electrode driving board constituting the circuit board assembly and controlling the scan electrodes; The scan electrode driving board A scan buffer board electrically connected to the scan electrodes drawn from the plasma display panel and mounted with a scan integrated circuit (IC); And a scan main board integrally formed with the scan buffer board and electrically connected to the scan buffer board and mounted with a scan electrode driving circuit element. The method of claim 1, And a signal transmission member electrically connecting the scan electrode terminal drawn out from the plasma display panel and the scan buffer board. The method of claim 2, The signal transmission member is a plasma display device consisting of a flexible printed circuit board (FPC). The method of claim 1, And the scanning main board and the scanning buffer board are formed to have different length and width directions of the respective boards. The method of claim 4, wherein And the scanning main board is formed shorter than the scanning buffer board in the longitudinal direction. The method of claim 4, wherein And the scanning main board is formed longer than the scanning buffer board in the width direction. The method of claim 1, The circuit board assemblies An address buffer board for controlling the address electrodes; A sustain electrode driving board controlling the sustain electrodes; An image board for generating a control signal for driving the address electrode and a control signal for driving the sustain electrode and the scan electrode and supplying the control signal to the address buffer board, the sustain electrode driving board, and the scan electrode driving board, respectively; Plasma display device comprising a power board for supplying power for driving the circuit board assemblies.

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