KR20080030211A - Driving mathod of liquid crystal display device - Google Patents

Abstract

A method for driving an LCD device is provided to compensate for the variation of threshold voltages of switching elements due to a turn off voltage applied for a long time by turning on the switching elements during a blanking period. An LCD(Liquid Crystal Display) device includes plural pixels having a liquid crystal capacitor(Clc) and a first switching element(Q1) for delivering a data voltage to the liquid crystal capacitor according to a gate signal. By turning on the first switching element, the data voltage is stored in the liquid crystal capacitor. Images are displayed according to the charged data voltage. The variation of threshold voltages is compensated by turning on the first switching element. The LCD device further includes a second switching element(Q2) for switching between the first switching element and liquid crystal capacitor.

Description

DRIVING MATHOD of LIQUID CRYSTAL DISPLAY DEVICE}

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

2 is an equivalent circuit diagram of one pixel of a liquid crystal display according to an exemplary embodiment of the present invention.

3 is a signal waveform diagram illustrating an operation of a liquid crystal display according to an exemplary embodiment of the present invention.

4 is a graph illustrating threshold voltage change compensation of a switching device according to an exemplary embodiment of the present invention.

The present invention relates to a liquid crystal display device.

In recent years, with the reduction in weight and thickness of personal computers and televisions, display devices are also required to be lighter and thinner, and cathode ray tubes (CRTs) are being replaced by flat panel displays.

Such flat panel displays include liquid crystal displays (LCDs), field emission displays (FEDs), organic light emitting displays, plasma display panels (PDPs), and the like. There is this.

In general, in an active matrix flat panel display, a plurality of pixels are arranged in a matrix form, and an image is displayed by controlling the light intensity of each pixel according to given luminance information. Among them, the liquid crystal display includes two display panels including a pixel electrode and a common electrode, and a liquid crystal layer having dielectric anisotropy interposed therebetween. The liquid crystal display applies an electric field to the liquid crystal layer through a switching element which is sequentially turned on in accordance with the gate signal, and adjusts the intensity of the electric field to adjust the transmittance of light passing through the liquid crystal layer to obtain a desired image.

The switching element of the liquid crystal display is turned on for a short time and remains turned off for a long time after transferring the data voltage. At this time, the threshold voltage is changed by the turn-off voltage supplied to the gate terminal of the switching element.

An object of the present invention is to provide a liquid crystal display device that can compensate for a change in threshold voltage of a switching element.

According to another aspect of the present invention, there is provided a method of driving a liquid crystal display device including a plurality of pixels including a liquid crystal capacitor and a first switching element configured to transfer a data voltage to the liquid crystal capacitor according to a gate signal. In the method of driving a liquid crystal display device, turning on the first switching device to charge the data voltage in the liquid crystal capacitor, displaying an image according to the charged data voltage, and the first switching device Turning on to compensate for the threshold voltage change.

The liquid crystal display may further include a second switching element that connects / blocks the first switching element and the liquid crystal capacitor according to a control signal.

The data voltage charging step and the image display step may be sequentially performed according to pixel rows.

In the data voltage charging step and the image display step, the second switching device may be turned on.

In the threshold voltage change compensation step, the second switching device may maintain a turn off state.

The threshold voltage change compensation step may be a blanking period between frames.

The liquid crystal display may further include a data driver configured to supply the data voltage to the pixel, and in the threshold voltage change compensation step, the data driver may have a higher impedance than in the data voltage charging step.

DETAILED DESCRIPTION Embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like parts are designated by like reference numerals throughout the specification. When a part of a layer, film, region, plate, etc. is said to be "on" another part, this includes not only the other part being "right over" but also another part in the middle. On the contrary, when a part is "just above" another part, there is no other part in the middle.

First, a liquid crystal display according to an exemplary embodiment of the present invention will be described in detail with reference to FIGS. 1 and 2.

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 2 is an equivalent circuit diagram of one pixel in the liquid crystal display according to an exemplary embodiment of the present invention.

Referring to FIG. 1, a liquid crystal display according to an exemplary embodiment of the present invention includes a liquid crystal panel assembly 300, a gate driver 400, and a data driver 500. And a gray voltage generator 800, a back light unit 900, and a signal controller 600.

Referring to FIG. 1, the liquid crystal panel assembly 300 is connected to a plurality of signal lines G ₁ -G _n , D ₁ -D _m in an equivalent circuit and arranged in a substantially matrix form. A plurality of pixels PX is included. On the other hand, in the structure shown in FIG. 2, the liquid crystal panel assembly 300 includes lower and upper panels 100 and 200 facing each other and a liquid crystal layer 3 interposed therebetween.

The signal lines G ₁ -G _n and D ₁ -D _m are a plurality of gate lines G ₁ -G _n for transmitting a gate signal (also called a “scan signal”) and a plurality of data lines for transmitting a data voltage ( D ₁ -D _m ). The gate lines G ₁ -G _n extend substantially in the row direction and are substantially parallel to each other, and the data lines D ₁ -D _m extend substantially in the column direction and are substantially parallel to each other. In addition, the signal lines G ₁ -G _n and D ₁ -D _m include a plurality of common gate lines Gcom ₁ -Gcom _n that transmit a common gate signal, and the common gate lines Gcom ₁ -Gcom _n are approximately It extends in a row direction and is substantially parallel to each other and connected to each other.

Each pixel PX, for example, is connected to the i-th (i = 1, 2, ..., n) gate line G _i and the j-th (j = 1, 2, ..., m) data line D _j . The pixel PX includes a switching element Q1 connected to the signal lines G _i and D _j , a switching element Q2 connected to the common gate line Gcom _i , a liquid crystal capacitor Clc connected thereto, and a sustain element. Storage capacitor (Cst). Holding capacitor Cst can be omitted as needed.

The switching element Q1 is a three-terminal element of a thin film transistor or the like provided in the lower panel 100, and a control terminal thereof is connected to the gate line G _i , and an input terminal is connected to the data line D _j . The output terminal is connected to the switching element Q2.

The switching element Q2 is also a three-terminal element, the control terminal of which is connected to the common gate line Gcom _i , the input terminal of which is connected to the switching element Q1, and the output terminal of the liquid crystal capacitor Clc and It is connected to the holding capacitor Cst.

The liquid crystal capacitor Clc has two terminals, the pixel electrode 191 of the lower panel 100 and the common electrode 270 of the upper panel 200, and the liquid crystal layer 3 between the two electrodes 191 and 270 is a dielectric material. Function as. The pixel electrode 191 is connected to the switching element Q2, and the common electrode 270 is formed on the entire surface of the upper panel 200 and receives a common voltage Vcom. Unlike in FIG. 2, the common electrode 270 may be provided in the lower panel 100. In this case, at least one of the two electrodes 191 and 270 may be formed in a linear or bar shape.

The storage capacitor Cst, which serves as an auxiliary part of the liquid crystal capacitor Clc, is formed by overlapping a separate signal line (not shown) and the pixel electrode 191 provided on the lower panel 100 with an insulator interposed therebetween. A predetermined voltage such as the common voltage Vcom is applied to the separate signal line. However, the storage capacitor Cst may be formed such that the pixel electrode 191 overlaps the front gate line G _i-1 directly above the insulator.

On the other hand, in order to implement color display, each pixel PX uniquely displays one of the primary colors (spatial division) or each pixel PX alternately displays the primary colors over time (time division). The desired color is recognized by the spatial and temporal sum of these primary colors. Examples of the primary colors include three primary colors such as red, green, and blue. 2 illustrates that each pixel PX includes a color filter 230 representing one of the primary colors in an area of the upper panel 200 corresponding to the pixel electrode 191 as an example of spatial division. . Unlike in FIG. 2, the color filter 230 may be disposed above or below the pixel electrode 191 of the lower panel 100.

The liquid crystal panel assembly 300 is provided with at least one polarizer (not shown).

Referring back to FIG. 1, the gray voltage generator 800 generates a total gray voltage related to the transmittance of the pixel PX or a limited number of gray voltages (hereinafter referred to as a “reference gray voltage”). The reference gray level voltage may include a positive value and a negative value with respect to the common voltage Vcom.

A gate driver 400, a gate line (G ₁ -G _n) and is connected to the gate turn-on voltage (Von), and a gate signal consisting of a combination of a gate-off voltage (Voff), a gate line (G ₁ of the liquid crystal panel assembly 300 -G _n ). In addition, the gate driver 400 applies a common gate signal formed of a combination of the gate-on voltage Von and the gate-off voltage Voff to the common gate lines Gcom ₁ -Gcom _n .

Data driver 500 is connected with the data lines (D ₁ -D _m) of the liquid crystal panel assembly 300, select a gray voltage from the gray voltage generator 800 and the data lines do this as a data voltage (D ₁ -D _m ). However, when the gray voltage generator 800 does not provide all of the gray voltages but provides only a limited number of reference gray voltages, the data driver 500 divides the reference gray voltages to generate a desired data voltage.

The lighting unit 900 irradiates light to the liquid crystal panel assembly 300. The lighting unit 900 may include a light source (not shown) for generating light, and a fluorescent lamp or a light emitting diode (LED) may be used as the light source (not shown).

The signal controller 600 controls the gate driver 400, the data driver 500, and the like.

Each of the driving devices 400, 500, 600, and 800 may be mounted directly on the liquid crystal panel assembly 300 in the form of at least one integrated circuit chip, or may be a flexible printed circuit film (not shown). It may be mounted on the liquid crystal panel assembly 300 in the form of a tape carrier package (TCP) or mounted on a separate printed circuit board (not shown). Alternatively, these driving devices 400, 500, 600, and 800 are connected to the liquid crystal panel assembly 300 together with the signal lines G ₁ -G _n , D ₁ -D _m and the thin film transistor switching elements Q1 and Q2. It may be integrated. In addition, the driving devices 400, 500, 600, and 800 may be integrated into a single chip, in which case at least one of them or at least one circuit element constituting them may be outside the single chip.

3 and 4, the operation of the liquid crystal display will be described in detail.

3 is a signal waveform diagram illustrating an operation of a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 4 is a graph illustrating threshold voltage change compensation of a switching element according to an exemplary embodiment of the present invention.

The signal controller 600 receives input image signals R, G, and B and an input control signal for controlling the display thereof from an external graphic controller (not shown). The input image signals R, G, and B contain luminance information of each pixel PX, and the luminance is a predetermined number, for example, 1024 (= 2 ¹⁰ ), 256 (= 2 ⁸ ), or 64 (= 2 ⁶ ) It has gray. Examples of the input control signal include a vertical sync signal Vsync, a horizontal sync signal Hsync, a main clock signal MCLK, and a data enable signal DE.

The signal controller 600 properly processes the input image signals R, G, and B according to operating conditions of the liquid crystal panel assembly 300 based on the input image signals R, G, and B and the input control signal, and controls the gate. After generating the signal CONT1 and the data control signal CONT2, the gate control signal CONT1 is sent to the gate driver 400, and the data control signal CONT2 and the processed image signal DAT are transmitted to the data driver 500. Export to).

The gate control signal CONT1 includes a scan start signal STV indicating a scan start and at least one clock signal controlling an output period of the gate-on voltage Von. The gate control signal CONT1 may also further include an output enable signal OE that defines the duration of the gate-on voltage Von.

The data control signal CONT2 applies an analog data voltage to the horizontal synchronization start signal STH and the data lines D ₁ -D _m indicating the start of the transmission of the digital image signal DAT for one row of pixels PX. Includes a load signal LOAD and a data clock signal HCLK. The data control signal CONT2 also inverts the signal RVS which inverts the polarity of the data voltage with respect to the common voltage Vcom (hereinafter referred to as "polarity of the data voltage" by reducing the "polarity of the data voltage with respect to the common voltage"). It may further include.

According to the data control signal CONT2 from the signal controller 600, the data driver 500 receives the digital image signal DAT for the pixel PX in one row and corresponds to each digital image signal DAT. By selecting the gray scale voltage, the digital image signal DAT is converted into an analog data voltage and then applied to the corresponding data lines D ₁ -D _m .

Referring to FIG. 3, the gate driver 400 applies the gate-on voltage Von to the gate lines G ₁ -G _n in response to the gate control signal CONT1 from the signal controller 600. The switching element Q1 connected to G ₁ -G _n ) is sequentially turned on. In addition, the gate driver 400 applies a gate-on voltage Von to the common gate lines Gcom ₁ -Gcom _n . Therefore, the switching elements Q2 of all the pixels PX remain turned on.

Then, the data voltage applied to the data lines D ₁ -D _m is applied to the corresponding pixel PX through the switching elements Q1 and Q2 turned on.

The difference between the data voltage applied to the pixel PX and the common voltage Vcom is shown as the charging voltage of the liquid crystal capacitor Clc, that is, the pixel voltage. The arrangement of the liquid crystal molecules varies depending on the magnitude of the pixel voltage, thereby changing the polarization of light passing through the liquid crystal layer 3. This change in polarization is represented by a change in the transmittance of light by the polarizer, through which the pixel PX displays the luminance represented by the gray level of the image signal DAT.

This process is repeated in units of one horizontal period (also referred to as "1H" and equal to one period of the horizontal sync signal Hsync and the data enable signal DE), thereby all the gate lines G ₁ -G _n. ), A gate-on voltage Von is sequentially applied, and a data voltage is applied to all the pixels PX to display an image of one frame T1.

While the image of one frame T1 is displayed, the gate driver 400 applies the gate-on voltage Von to the common gate lines Gcom ₁ -Gcom _n , and the switching elements Q2 of all the pixels PX The turn-on state is maintained during the frame T1.

The liquid crystal display has a blanking period T2 after one frame T1 ends and before the next frame T1 begins.

During the blanking period T2, the gate driver 400 applies the gate-on voltage Von to all the gate lines G ₁ -G _n , and the gate-off voltage Voff to the common gate lines Gcom ₁ -Gcom _n . Is applied. Accordingly, all the switching elements Q1 remain in the turn on state, and all the switching elements Q2 remain in the turn off state. Therefore, even when the switching element Q1 is turned on and any voltage is transmitted through the data lines D ₁ -D _m , the switching element Q2 maintains the turned-off state so that the arbitrary voltage is applied to the liquid crystal capacitor Clc. It can be prevented from being applied. In addition, since the output terminal of the data driver 500 has a higher impedance in the blanking period T2 than in the frame T1, an arbitrary voltage can be prevented from being output to the data lines D ₁ -D _m . have.

According to FIG. 3, each switching element Q1 is turned on only during one horizontal period 1H of one frame T1, and the other period is turned off. Therefore, as shown in FIG. 4, as the switching element Q1 receives the turn-off voltage Voff for a long time, the voltage V-current I curve of the transistor moves from f1 to f2. As a result, the threshold voltage of the transistor is changed so that the data voltage is not exactly transmitted to the liquid crystal capacitor Clc. The change in the threshold voltage is greater in a liquid crystal display for a car navigation system (CNS) requiring a high temperature, high light emission unit.

Accordingly, by turning on the switching elements Q1 of all the pixels PX during the blanking period T2, the voltage V-current I curve is moved toward f3 to compensate for the threshold voltage change.

On the other hand, since each switching element Q2 remains turned on for one frame T1, the voltage V-current I curve of the transistor moves from f1 to f3. Accordingly, by turning off the switching element Q2 during the blanking period T2, the voltage V-current I curve is moved toward f2 to compensate for the change in the threshold voltage of the switching element Q2.

When the blanking period T2 ends, the next frame starts and the state of the inversion signal RVS applied to the data driver 500 is changed such that the polarity of the data voltage applied to each pixel PX is opposite to that of the previous frame. Controlled ("frame inversion"). At this time, even in one frame, the polarity of the data voltage flowing through one data line is periodically changed (eg, row inversion and point inversion) according to the characteristics of the inversion signal RVS, or the polarity of the data voltage applied to one pixel row is also changed. They can be different (eg invert columns, invert points).

As described above, the driving method of the liquid crystal display according to the present invention may compensate for the threshold voltage change according to the turn-off voltage applied for a long time by turning on the switching element during the blanking period.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

Claims (7)

In the driving method of the liquid crystal display device including a plurality of pixels including a liquid crystal capacitor and a first switching element for transmitting a data voltage to the liquid crystal capacitor in accordance with a gate signal, Turning on the first switching element to charge the data voltage in the liquid crystal capacitor; Displaying an image according to the charged data voltage, and Compensating the threshold voltage change by turning on the first switching device Method of driving a liquid crystal display comprising a. In claim 1, The liquid crystal display device further comprises a second switching element for connecting / blocking the first switching element and the liquid crystal capacitor. In claim 2, The data voltage charging step and the image display step are sequentially performed according to the pixel row. In claim 3, And the second switching element is turned on in the data voltage charging step and the image display step. In claim 4, And the second switching device maintains a turn-off state in the threshold voltage change compensation step. In claim 5, Compensating for the threshold voltage change is a blanking period between frames. In claim 6, The liquid crystal display further includes a data driver configured to supply the data voltage to the pixel. The data driver in the threshold voltage change compensation step has a higher impedance than the data voltage charging step.

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