KR20080028058A - Apparatus for basestation modem in communication system - Google Patents

Abstract

A modem for a BS in a communication system is provided to perform a software function in a DSP(Digital Signal Processor) and a hardware function in an FPGA(Field Programmable Gate Array) when data is transceived in a physical layer and an MAC layer, thereby transceiving the data at high speed and modifying the data for improving the performance. A demodulation unit(114) receives first and second reception samples to restore CQI(Channel Quality Information) and HARQ(Hybrid Automatic Repeat request) ACK/NACK(Acknowledgement/Negative Acknowledgement) signals during data transceiving, and performs Fourier transformation, descrambling, channel estimation and CINR(Carrier to Interference and Noise Ratio) estimation processes to generate a soft sample. A scheduler(110) receives CQI and HARQ response signals during the data transceiving to generate the scheduling information of a downlink. An L-MAC(Low MAC) unit(112) converts an MAC PDU(Media Access Control Protocol Data Unit) inputted from a network into a data burst by using the scheduling information and converts a decrypted PDU into the MAC PDU during data receiving. A hardware unit(116) performs channel coding to output a sub packet after encrypting the data burst during the data transceiving, and decrypts the decoded burst to output the decode burst to the L-MAC unit after receiving and decoding the soft sample. A modulation unit(106) performs the sub channel mapping, scrambling, and reverse Fourier transformation of the sub packet to generated an OFDMA(Orthogonal Frequency Division Multiple Access) during the data transceiving.

Description

Modem device of base station in communication system {APPARATUS FOR BASESTATION MODEM IN COMMUNICATION SYSTEM}

1 is a block diagram of a base station modem using four receive antennas in a communication system according to the present invention;

2 is a block diagram of a base station modem using two receive antennas in a communication system according to the present invention;

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a base station modem apparatus in a communication system, and more particularly, to a plurality of digital signal processors (DSPs) and a field programmable gate array (FPGAs). The present invention relates to a device of a soft modem configured to process transmission / reception data in a physical layer and a media access control layer.

In the 4th Generation (hereinafter referred to as '4G') communication system, services having various quality of service (hereinafter referred to as 'QoS') having a transmission rate of about 100 Mbps Active research for providing users is in progress. In particular, in 4G communication systems, broadband wireless such as a wireless local area network (hereinafter, referred to as a 'LAN') system and a wireless metropolitan area network (hereinafter, referred to as a 'MAN') system are used. A new system separate from the conventional system for supporting high-speed services in a form of guaranteeing mobility and quality of service in a broadband wireless access communication system is being researched and developed.

Taking the cellular-based communication system as an example of the conventional system, the cellular-based communication system is a mobile communication system for a voice call, and a base station modem is composed of a plurality of voice-based channels and data channels. The data channels have a supportable data rate of about 1 Mbps per channel, so that the cellular communication system can support only low-speed data communication, and because of low bandwidth, many users cannot accommodate it. Therefore, there is a problem that it is difficult to implement a portable Internet that supports a high data rate with a conventional voice-based communication system.

Accordingly, in the broadband wireless communication system, there is a need for a modem device of a base station capable of supporting high-speed data transmission unlike the conventional system.

In order to solve the above problems, an object of the present invention is to provide a base station modem device in a communication system.

Another object of the present invention is to provide a soft modem apparatus of a base station for processing transmission and reception data in a physical layer and a media access control layer in a communication system.

It is still another object of the present invention to provide a base station modem apparatus in which a software function is implemented in a DSP and a hardware function is implemented in an FPGA in a communication system.

According to the first aspect of the present invention for achieving the above objects, the base station modem apparatus in the communication system, when receiving the first and second reception samples, and transmits the data, the channel quality information and HARQ (Hybrid Automatic Repeat Request) response A demodulator for restoring an (ACK / NACK) signal and performing a Fourier transform, descrambling, channel estimation, and carrier to interference and noise ratio (CINR) estimation procedures to generate a soft sample; A scheduler configured to receive the channel quality information and the HARQ response signal to generate downlink scheduling information, and a data unit (MAC PDU) of a media access control layer input from a network using the scheduling information when the data is transmitted. A L-MAC (Low MAC) unit for converting into a data burst and converting a decrypted PDU to the MAC PDU upon receiving the data; In transmission, after encrypting the data burst, channel coding is performed to output a subpacket, and when the data is received, the soft sample is received and decrypted. Then, the decoded burst is decrypted to decode the L packet. And a hardware function unit for outputting to the MAC unit, and a modulation unit for generating OFDMA samples by receiving the subpackets, performing subchannel mapping, scrambling, and inverse Fourier transform.

According to a second aspect of the present invention for achieving the above objects, in a communication system, a base station modem apparatus receives channel quality information and a hybrid automatic repeat request (HARQ) response (ACK / NACK) when receiving a received sample and transmitting data. A demodulator for restoring a signal and performing Fourier transform, descrambling, channel estimation and CINR (Carrier to Interference and Noise Ratio) estimation procedures, and data received from the demodulator when the data is received. A codec for converting to a sample, and when the data is transmitted, receives the channel quality information and the HARQ response signal, performs a corresponding downlink scheduling, and converts a data unit (MAC PDU) of a media access control layer input from a network into a data burst. A scheduling and data processing unit for converting and converting a decrypted PDU to the MAC PDU upon receiving the data; Data transmission, encrypts the data burst, performs channel coding, changes the data into sub-packets, outputs the data burst, and receives the soft sample, performs decryption after receiving the soft sample, and decrypts the decoded burst. And a modulator configured to generate an OFDMA sample by performing subchannel mapping, scrambling, and inverse Fourier transform upon receiving the subpacket during the data transmission.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. In describing the present invention, when it is determined that a detailed description of a related known function or configuration may unnecessarily obscure the subject matter of the present invention, the detailed description thereof will be omitted.

Hereinafter, a description will be given of an apparatus of a soft modem of a base station configured with a plurality of DSPs and FPGAs in a communication system to process transmit and receive data of a physical layer and a low medium access control layer.

Hereinafter, the soft modem of the present invention transmits and receives signals between the DSP and the FPGA by using a cluster bus and a low voltage differential signal (LVDS). In other words, the DSP and the DSP are connected to the cluster bus in a shared form to transmit data and control signals, and the data signal is transmitted by being connected one-to-one to the LVDS, and the DSP and the FPGA are connected to the LVDS. Transmit the data signal.

In addition, in the present invention, the respective functions are divided into hardware functions and software functions in consideration of operating characteristics, data processing speeds, and data transmission capacity of each function in the base station modem apparatus, and the software functions are configured as the DSP. The hardware function is configured as the FPGA. Here, the operation characteristics of each function means a characteristic that can indicate whether the function is more efficient when implemented in hardware or when implemented in software. The software functions include a transmitter scheduler, subchannel mapping, scrambling and Inverse Fast Fourier Transform (IFFT) and a receiver Fourier Transform (FFT), descrambling (de-). scrambling, channel estimation, and carrier to interference and noise ratio (CINR) estimation, and the hardware functions include encryption and encoding of the transmitter, decryption, and decoding of the receiver. have.

1 is a block diagram of a base station modem using four receive antennas in a communication system according to the present invention. The base station modem may include a network processing unit (NPU) 100, a dual port RAM 102, a synchronous dynamic RAM 104, a modulation DSP 106, Demodulation and Codec DSP 108, Scheduler DSP 110, L-MAC (Low MAC) DSP 112, Demodulation DSP 114, FPGA 116, Code and Decoder 118, Encrypt and Decryptor And 120.

Referring to FIG. 1, first, the network processor unit 100 is responsible for connecting a network to a modem and controlling the modem. In particular, the network processor unit 100 is responsible for outputting network data to be transmitted to the dual port RAM 102 and receiving the received data from the dual port RAM 102 to the network.

The dual port RAM 102 serves as a bridge for transmitting and receiving data and control signals between the network processor unit 100 and the modem to transmit transmission data input from the network processor unit 100 to the L-MAC DSP. 112, and outputs the received data input from the L-MAC DSP 112 to the network processor unit 100.

When the synchronous dynamic RAM 104 operates a hybrid automatic repeat request (HARQ), the synchronous dynamic RAM 104 is responsible for storing received data that has failed decoding.

In the data transmission mode, the modulation DSP 106 receives a subpacket from the FPGA 116 and performs subchannel mapping, scrambling, and inverse Fourier transform, that is, a modulation procedure, to divide the subpacket into orthogonal frequency division multiple access. After converting into Orthogonal Frequency Division Multiplex Access (SPC) samples, the converted OFDMA samples are output to the FPGA 116 through the LVDS.

The demodulation and codec DSP 108 receives a received sample from the FPGA 116 in the data transmission mode, and controls channel quality information (hereinafter, referred to as 'CQI') and HARQ- as control information. The ACK / NACK signal is recovered to output the recovered CQI and ACK / NACK signals to the scheduler DSP 110 using the LVDS. Here, the ACK / NACK signal is a signal indicating whether a previous transmission packet is successfully received when HARQ is applied, and is included in the received sample only when HARQ is applied.

In addition, the demodulation and codec DSP 108 receives a received sample from the FPGA 116 and performs channel compensation by performing Fourier transform, descrambling, channel estimation, and CINR estimation in the reception mode of the data. After the received sample (14 bit) generates a soft sample (6 bit), the generated soft sample is output to the FPGA 116 through the LVDS. In addition, the demodulation and codec DSP 108 converts the data of the demodulation DSP 114, which is input through the modulation DSP 106, into a soft sample in the reception mode of the data, and converts the data of the demodulation DSP 114 into soft samples. )

In the data transmission mode, the scheduler DSP 110 receives the restored CQI and ACK / NACK signals, checks the downlink and uplink channel states, and determines whether the terminal properly receives the downlink data burst. can do. In addition, the MCS level of the downlink and uplink data bursts is determined, and a scheduling operation such as retransmission is performed. Thereafter, the scheduling information generated by the scheduling task is output to the L-MAC DSP 112 using the LVDS.

In the data transmission mode, the L-MAC DSP 112 receives the scheduling information from the scheduler DSP 110 and receives a data unit received from the network through the dual port RAM 102, that is, a MAC PDU (Packet). Data Units are processed to form a burst in the form of data of a physical layer, and the configured bursts are transmitted to the FPGA 116 using the LVDS. In this case, the L-MAC DSP 112 performs a role of generating data to be input to an encoder performed by a conventional codec so that the received sample input from the demodulation DSP 114 does not pass through the codec. Data input to the encoder 118 of 116 may be generated.

In addition, the L-MAC DSP 108 restores a decrypted PDU input from the FPGA 116 to the MAC PDU in the reception mode of the data, and then restores the restored MAC PDU to the cluster bus. Output to the dual port RAM (102) using.

The demodulation DSP 114 receives the received sample from the FPGA 116 in the data transmission mode, restores the CQI and HARQ-ACK / NACK signals, which are control information, and restores the restored CQI and ACK / NACK to the LVDS. Output to the scheduler DSP using. Here, the ACK / NACK signal is a signal indicating whether the previous transmission packet is successfully received when the HARQ (Hybrid Automatic Repeat Request) is applied and is included in the received sample only when the HARQ is applied.

In addition, the demodulation DSP 114 receives the received sample from the FPGA 116 in the data reception mode, and performs a Fourier transform, descrambling, channel estimation, and CINR estimation to perform channel compensation. It outputs to the demodulation and codec DSP 108 via a modulation DSP 106. The reason why the demodulation DSP 114 passes through the modulation DSP 106 without directly inputting the result of the processing of the demodulation DSP 114 to the demodulation and codec DSP 108 is because of the demodulation DSP 114 and the demodulation and codec DSP 108. Is not directly connected to the LVDS.

The FPGA 116 includes the code and decoder 118 and the encryptor and decoder 120, so that in the data transmission mode, from the L-MAC DSP 112 using the encryptor and the decoder 120. The input bursts are encrypted, and channel coding is performed through the coder and the decoder 118 to change to an encoded burst, that is, a subpacket. Thereafter, the FPGA 116 outputs the changed subpacket to the modulation DSP 106, receives an OFDMA sample from the modulation DSP 106, and transmits the OFDM subsample to another FPGA connected to the FPGA 116.

In addition, the FPGA 116 receives the soft sample from the demodulation and codec DSP 108 and performs CTC decoding or Viterbi decoding using the code and decoder 118 in the data reception mode. The decrypted burst is decrypted using an encryptor and decryptor 120 to output the decrypted PDU to the L-MAC DSP 112.

2 is a block diagram of a base station modem using two receive antennas in a communication system according to the present invention. The base station modem may include a network processing unit (NPU) 200, a dual port RAM 202, a synchronous dynamic RAM 204, a modulation DSP 206, Including L-MAC (Low MAC) and Scheduler DSP 208, Codec DSP 210, Demodulation DSP 212, FPGA 214, Sign and Decoder 216, Encrypter and Decryptor 218 It is composed. In the case of using the two receiving antennas, the number of received samples is reduced by half compared to the case of using the four antennas, so that the path for receiving the received samples is one.

Referring to FIG. 2, first, the network processor unit 200 is responsible for connecting a network with a modem and controlling the modem. In particular, the network processor unit 200 is responsible for outputting network data to be transmitted to the dual port RAM 202, receiving the received data from the dual port RAM 202, and outputting the received data to the network.

The dual port RAM 202 acts as a bridge to exchange data and control signals between the network processor unit 200 and the modem, and transmits the L-MAC and the scheduler DSP data transmitted from the network processor unit 200. And outputs the received data input from the L-MAC and the scheduler DSP 212 to the network processor unit 200.

When the synchronous dynamic RAM 204 operates a hybrid automatic repeat request (HARQ), the synchronous dynamic RAM 204 is responsible for storing received data that has failed decoding.

In the data transmission mode, the modulation DSP 206 receives an encoded burst, i.e., a subpacket, from the FPGA 214 and performs subchannel mapping, scrambling, and inverse Fourier transform procedures to convert the subpackets into OFDMA samples. The converted OFDMA sample is then output to the FPGA 214 via the LVDS.

In the data transmission mode, the L-MAC and the scheduler DSP 208 receive the restored CQI and ACK / NACK signals to check the downlink and uplink channel states, and the terminal receives the downlink data burst correctly. To judge. In addition, the MCS level of the downlink and uplink data bursts is determined, and a scheduling operation such as retransmission is performed. Subsequently, the data unit received from the network through the dual port RAM 102, that is, MAC PDUs (Packet Data Units) is processed by using the scheduling information generated by the scheduling task, and a burst in the form of data of a physical layer is used. ) And transmit the configured bursts to the FPGA 214 using the LVDS.

In addition, the L-MAC and the scheduler DSP 208 restores the decrypted PDU input from the FPGA 214 to the MAC PDU in a data reception mode, and then restores the restored MAC PDU to the cluster. The bus outputs the dual port RAM 102.

In the data reception mode, the codec DSP 210 converts data input from the demodulation DSP 212 into a soft sample which is input data of a decoder 216 in the FPGA 214 through the LVDS. Output to the FPGA (116).

The demodulation DSP 212 receives a received sample from the FPGA 214 in the data transmission mode, the data transmission mode, and receives channel quality information (CQI), which is control information. And the HARQ-ACK / NACK signal to recover the output CQI and ACK / NACK signal to the L-MAC and the scheduler DSP 208 using the LVDS. Here, the ACK / NACK signal is a signal indicating whether a previous transmission packet is successfully received when HARQ is applied, and is included in the received sample only when HARQ is applied.

In addition, the demodulation DSP 212 receives the received sample from the FPGA 214 in the data receiving mode, and performs a Fourier transform, descrambling, channel estimation, and CINR estimation to perform channel compensation. Output to codec DSP 210.

The FPGA 214 includes the code and decoder 216 and the encryptor and decoder 218, so that in the data transmission mode, the L-MAC and scheduler DSP 218 using the encryptor and decoder 218 in the data transmission mode. The bursts inputted from the N-B are encrypted, and channel coding is performed through the coder and the decoder 216 to change to an encoded burst, that is, a subpacket. Thereafter, the FPGA 214 outputs the changed subpacket to the modulation DSP 206, receives an OFDMA sample from the modulation DSP 206, and transmits the OFDMA sample to another FPGA connected to the FPGA 214.

In addition, the FPGA 214 receives the soft sample from the codec DSP 212 in the reception mode of the data, performs CTC decoding or Viterbi decoding using the code and decoder 216, and then the encryption and The decoder 218 is used to decrypt the decoded burst and output the decrypted PDU to the L-MAC DSP 112.

Meanwhile, in the detailed description of the present invention, specific embodiments have been described, but various modifications are possible without departing from the scope of the present invention. Therefore, the scope of the present invention should not be limited to the described embodiments, but should be determined not only by the scope of the following claims, but also by the equivalents of the claims.

As described above, the present invention divides each function necessary for data transmission between the physical layer and the media access control layer into a software function and a hardware function in a base station modem of a communication system, and performs the software function as a DSP and the hardware function as an FPGA. By designing a base station modem device, high-speed data transmission is possible, and there is an effect that upgrades and modifications for specification changes or performance improvements are possible.

Claims (14)

An apparatus for transmitting a base station modem in a communication system, Upon receiving the first and second received samples, the channel quality information and the HARQ (Hybrid Automatic Repeat Request) response (ACK / NACK) signal are restored when the data is transmitted, and upon receiving the data, Fourier transform, descrambling, channel estimation, and CINR are received. A demodulator configured to generate a soft sample by performing a carrier to interference and noise ratio estimation procedure; A scheduler which receives the channel quality information and the HARQ response signal and generates downlink scheduling information when the data is transmitted; When the data is transmitted, the data unit (MAC PDU) of the media access control layer input from the network is converted into a data burst by using the scheduling information, and when the data is received, the decrypted PDU is converted into the MAC PDU. L-MAC (Low MAC) part to say, In the data transmission, after encrypting the data burst, and performing channel coding to output a sub-packet, when receiving the data, after receiving the soft sample to perform decryption, and then decrypt the decoded burst (decryption) A hardware function unit for outputting to the L-MAC unit; And a modulator configured to receive the subpacket, perform subchannel mapping, scrambling, and inverse Fourier transform to generate an OFDMA sample when the data is transmitted. The method of claim 1, The demodulator, the scheduler, the L-MAC unit and the modulator are configured as a digital signal processor device. And the hardware function unit is configured as a field programmable gate array. The method of claim 2, The digital signal processing device is characterized in that for transmitting and receiving data and control signals using four low voltage differential signals and one common bus. The method of claim 2, And the field programmable gate array is connected to the digital signal processing device by a low voltage differential signal to transmit and receive data and control signals. The method of claim 1, The demodulation unit, A first digital signal processor configured to receive the first received sample and perform the channel quality information and HARQ response signal recovery, Fourier transform, descrambling, channel estimation, and CINR estimation procedure; And a second digital signal processor configured to receive the second received sample and perform the channel quality information and HARQ response signal recovery, Fourier transform, descrambling, channel estimation, and CINR estimation procedure. The method of claim 3, wherein The first digital signal processing unit, And a codec unit for receiving the data processed by the first digital signal processor and the second digital signal processor to generate the soft sample to be decoded upon receiving the data. The method of claim 1, And a network unit configured to output network data to the L-MAC unit when transmitting the data, and to receive the MAC PDU from the L-MAC unit and output the network data to the L-MAC unit. The method of claim 7, wherein The network unit, A call processing processor unit which connects a network to the modem to output data received from the network to a dual port RAM, and outputs data input from the dual port RAM to the network; And the dual port RAM outputting data input from the call processing processor unit to the L-MAC unit and outputting data input from the L-MAC unit to the call processing processor unit. An apparatus for transmitting a base station modem in a communication system, Receives the received sample and restores the channel quality information and the HARQ (Hybrid Automatic Repeat Request) response (ACK / NACK) signal when data is transmitted.Fourier transform, descrambling, channel estimation and carrier to interference A demodulator for performing a noise ratio (ESD) estimation procedure, A codec for converting data output from the demodulator into a soft sample when the data is received; When the data is transmitted, the channel quality information and the HARQ response signal are received to perform downlink scheduling to convert a data unit (MAC PDU) of a medium access control layer input from a network into a data burst, and upon receiving the data, A scheduling and data processing unit for converting a decrypted PDU into the MAC PDU; In the data transmission, after encrypting the data burst, and performing channel coding to change to a sub-packet, and output the data, when receiving the data, after receiving the soft sample to perform decryption, decrypt the decoded burst (decryption) With hardware function to do, And a modulator configured to receive the subpacket, perform subchannel mapping, scrambling, and inverse Fourier transform to generate an OFDMA sample when the data is transmitted. The method of claim 9, The demodulator, the codec, the scheduling and data processor, and the modulator are configured of a digital signal processor device. And the hardware function unit is configured as a field programmable gate array. The method of claim 10, The digital signal processing device is characterized in that for transmitting and receiving data and control signals using four low voltage differential signals and one common bus. The method of claim 10, And the field programmable gate array is connected to the digital signal processing device by a low voltage differential signal to transmit and receive data and control signals. The method of claim 9, And a network unit configured to output network data to the scheduling and data processing unit when the data is transmitted, and to receive the MAC PDU from the scheduling and data processing unit and output the network data to the network. The method of claim 13, The network unit, A call processing processor unit which connects a network to the modem to output data received from the network to a dual port RAM, and outputs data input from the dual port RAM to the network; And the dual port RAM outputting data input from the call processing processor unit to the scheduling and data processing unit, and outputting data input from the scheduling and data processing unit to the call processing processor unit.

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