KR20080025480A - Front end module - Google Patents

Abstract

A front end module is provided to realize high-efficiency amplification operation in case of both high-power and low-power modes by controlling load impedance of a PAM(Power Amplification Module), thereby reducing an amount of power consumption as extending battery use time. A transceiving separator(360) separates RF(Radio Frequency) transceiving signals to deliver the separated signals. A PAM(330) amplifies the RF transmission signal to deliver the amplified RF transmission signal to the transceiving separator. An impedance control circuit(340) controls load impedance by being connected between the transceiving separator and the PAM. The impedance control circuit consists of more than one element of a resistor, a capacitor, and a diode, and changes output impedance in low power.

Description

Front End Module

1 is a graph showing the output change of the power amplifier module when the general CDMA front-end module is operated in a high power mode and a low power mode.

2 is a block diagram schematically illustrating the components of an RF communication system to which a front end module according to an embodiment of the present invention is applied;

3 is a block diagram schematically illustrating components of a front end module according to an embodiment of the present invention;

4 is a circuit diagram illustrating an equivalent circuit of a pin diode provided in an impedance adjusting circuit according to an embodiment of the present invention.

5 is a graph showing a form in which the output of the power amplifier module provided in the front end module according to an embodiment of the present invention is adjusted in accordance with the change of the load impedance.

6 is a graph illustrating a load impedance when the power amplifier module provided in the front end module according to the embodiment of the present invention is operated in a high power mode and a low power mode.

<Explanation of symbols for main parts of drawing>

200: diplexer 300: front end module

310: transmit and receive processing unit 320: Tx BPF

330: power amplifier module 331: bias circuit

332: input matching circuit 333: drive amplifier (DA)

334: intermediate matching circuit 335: power amplifier (PA)

340: impedance adjustment circuit 350: output matching circuit

360: transmission and reception separation unit (duplexer) 370: Rx BPF

400: baseband processor 500: GPS BPF

The present invention relates to a front end module.

A front end module (FEM) is a transmitting / receiving device that controls radio signals used on a mobile communication terminal, and is a complex component in which various electronic components are serially implemented on one substrate to minimize integration space. Means.

For example, a general CDMA front end module is a switching circuit that separates and transmits a GPS signal and a CDMA signal received from an antenna, a duplexer that separates and transmits a transmission / reception signal, and modulates and demodulates an intermediate frequency signal and a digital signal and performs AD / DA conversion. Transmission and reception processing module, transmission bandpass filter for filtering transmission signal, reception bandpass filter for filtering reception signal, power amplification module for amplifying transmission signal, low noise amplification module for amplifying reception signal, multimedia data by analyzing digital signal And a baseband processor for generating and gain controlling the power amplification module and a GPS filter for extracting only the band frequency signal by filtering the GPS signal.

The modulated CDMA signal in the transmit / receive processing module is amplified in the power amplification module to reach the base station. It is important that the signal is linearly amplified without distortion.

At this time, the current consumption of the power amplifier module has a large influence on the efficiency of the front end module, in order to reduce the effect, the conventional power amplifier module divides the current used into two, low power mode (LPM; Low Power) Mode) and High Power Mode (HPM).

FIG. 1 is a graph illustrating a change in output of a power amplification module when a general CDMA front end module is operated in a high power mode and a low power mode.

The x-axis of the graph shown in FIG. 1 is a numerical value of the power, and the y-axis is a numerical value of the current. The display line shown to the left of the reference line "A" corresponds to the case of operating in the low power mode, and the display line shown to the right of the graph This is the case when operating in the high power mode.

The reference line "A" is located on 16 dBm of the x-axis, and as shown in Figure 1, the conventional power amplifier module has a high current consumption compared to the power, the efficiency is very low, such as 5% to 6%.

If the current is not significantly reduced in the range of 5 dBm to 15 dBm, which is the use band of the mobile communication terminal, the efficiency of the entire system becomes weak, and in particular, in the low power mode, the amplification efficiency is considerably inferior.

In addition, it can be confirmed that the linearity of the output signal is poorly measured in both the high power mode and the low power mode.

Due to such a decrease in efficiency, the current of the RF terminal including the power amplifier module is consumed considerably, and the battery capacity is limited according to the miniaturization trend of the mobile communication terminal, so the user has to frequently charge the battery and the call quality is also unstable. There is a problem that suffers a lot of inconvenience in using the communication service, such as termination.

The present invention provides a front end module in which the amplification operation is improved while consuming lower power in the low power mode and the high power mode by increasing the amplification efficiency of the power amplification module.

The front end module according to the present invention includes a transmission and reception separation unit for separating and transmitting the RF transmission and reception signals; A power amplifying module for amplifying an RF transmission signal and transmitting the amplified RF signal to the transceiver; And an impedance adjustment circuit connected between the transmission and reception separation unit and the power amplifier module to adjust load impedance.

Hereinafter, a front end module according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

2 is a block diagram schematically illustrating the components of the RF communication system 1000 to which the front end module 300 is applied according to an embodiment of the present invention.

2, the RF communication system 1000 according to the embodiment of the present invention includes an antenna 100, a diplexer 200, a front end module 300, a baseband processor 400, and a GPS global positioning (BPF). It comprises a System Band Pass Filter (500), the front end module 300 is a transmission and reception processor 310, Tx BPF (Transmitter Band Pass Filter) 320, a power amplifier module (PAM) 330, an impedance adjustment circuit 340, a discrete output matching circuit 350, a transmission / reception separation unit 360 (hereinafter referred to as a “duplexer”), and an Rx BPF (Receiver Band Pass Filter) 370. It is made, including.

The transmission and reception processor 310, the Tx BPF 320, the power amplification module 330, the impedance adjusting circuit 340, the output matching circuit 350 and the duplexer 360 constituting the front end module 300 are in chip form. The substrate is mounted on a substrate. The substrate is a multilayered substrate, in which patterns such as via holes, transmission patterns, routing patterns, bonding patterns, and terminal patterns are formed, and various concentrating elements and distribution elements are mounted over several layers.

The front end module 300 implemented on the substrate is implemented as a single package device through a molding process.

Hereinafter, the connection configuration and operation of each component of the RF communication system 1000 according to the embodiment of the present invention will be described.

The antenna 100 receives a GPS signal and a CDMA signal and transmits the same to the diplexer 200. The diplexer 200 separates the GPS signal and the CDMA signal and transmits the GPS signal to the GPS filter 500. The CDMA signal is transmitted to the duplexer 360.

The diplexer 200 may include a high pass filter (HPF) and a low pass filter (LPF) configured of a high performance passive device (IPD), and the HPF is received from the antenna 100. Among the received signals, the relatively high-band CDMA signal is passed to the duplexer 360, and the LPF filters the low-band GPS signal to the GPS filter 500.

In addition, the diplexer 200 may be provided as a single pole double throw (SPDT) switch, and the SPDT switch is a kind of integrated circuit (IC) switch, and has two positive control voltages at DC. It operates up to about 3GHz and has a very low control voltage that allows it to open and close at 2.4V.

The duplexer 360 separates the CDMA signal into a transmission signal and a reception signal and transfers the CDMA signal to a reception processor (RF Receiver) provided in the diplexer 200 or the transmission / reception processor 310, respectively.

The transmission and reception processing unit 310 includes a GPS signal processing unit (Asynchronous GPS), a transmission processing unit (RF Transmitter), a receiving processing unit (RF Receiver), a low noise amplifier (LNA; Low Noise Amplifier) and the like (configuration of the transmission and reception processing unit 310) The unit is not shown). For reference, the input terminal of the Rx BPF 370 is connected to the low noise amplifier and the output terminal is connected to the receiving processor (see FIG. 2 for this reason). Shown in connection with the processor 310).

The GPS signal passing through the GPS filter 500 is transmitted from the GPS signal processing unit of the transmission / reception processing unit 310 to the baseband processing unit 400 through a process such as RF amplification, intermediate frequency conversion, intermediate frequency amplification, and the like.

On the other hand, the baseband processor (commonly referred to as "BBA (Base Band Analog)") 400 includes a D / A converter, a CPU, a digital modulator, a channel encoder / decoder, etc. Code / filter the signal and convert it to a digital signal.

In addition, the baseband processor 400 encodes / decodes a CDMA signal or a GPS signal, processes the signal as multimedia data, and controls an input / output device such as a display device and a keypad to provide a user interface.

Hereinafter, the front end module 300 according to the embodiment of the present invention will be described in detail with reference to FIG. 3.

3 is a block diagram schematically illustrating the components of the front end module 300 according to an embodiment of the present invention.

The Tx BPF 320 is located between the transmission processing unit and the power amplification module 330 of the transmission and reception processing unit 310, and blocks the noise component signal and the adjacent band signal generated during the conversion / processing of the transmission signal to the CDMA band. Filter only the transmission signal of, and transmits it to the power amplification module 330.

The power amplification module 330 amplifies the filtered CDMA transmission signal and transfers it to the output matching circuit 350. In this case, the load impedance is changed by the impedance adjusting circuit 340 to perform a low power high efficiency amplification operation. .

Referring to FIG. 3, the power amplifier module 330 includes a bias circuit 331, an input matching circuit 332, a drive amplifier 333, and an intermediate matching circuit. (Inter stage matching circuit) 334 and a power amplifier (PA) 335.

In general, when the RF transmission signal is amplified, both gain amplification and power amplification must be performed. It is difficult to design a single amplifier to satisfy two aspects of amplification.

Accordingly, the driving amplifier 333 having a high gain value performs first order amplification at the front end, and the power amplifier 335 second amplifies the power of the gain amplified signal.

The input matching circuit 332 compensates and matches the damage of the filtered RF signal, and the intermediate matching circuit 334 performs a function of matching impedance between the driving amplifier 333 and the power amplifier 335.

The bias circuit 331 is a circuit for stabilizing and supplying a bias voltage, and provides a voltage point to a series of transistors constituting the driving amplifier 333 and the power amplifier 335.

That is, the bias circuit 331 provides a DC voltage in a state where an input voltage is not applied to the driving amplifier 333 and the power amplifier 335 so that a constant current flows, thereby making it a reference point of the input signal. Compensation for deterioration of the semiconductor junction point of the transistor is suppressed to suppress thermal runaway (increasing the collector current of the transistor increases the temperature of the semiconductor junction point, which in turn causes an increase in the current, causing thermal runaway).

The bias circuit 331 has four input terminals. The "VREF" terminal is a terminal for receiving a reference voltage to generate a bias voltage, and the "VCC1" terminal and the "VCC2" terminal are connected to a power supply terminal.

The "Vstep" terminal is a terminal to which a control signal is applied from the baseband processor 400, and the bias circuit 331 performs a stabilization operation by the control signal.

The output matching circuit 350 is a matching circuit element located outside the power amplifier module 330 and performs a function of matching impedance between the power amplifier 335 and the duplexer 360.

The impedance adjusting circuit 340 is connected in parallel between the output matching circuit 350 and the power amplifier module 330, the capacitor (C), the pin diode (D), the first resistor (R1), the second resistor ( R2).

The first resistor R1 and the capacitor C constituting the impedance adjusting circuit 340 constitute a series circuit, and one side of the first resistor R1 is connected to the “Vstep” terminal of the bias circuit 331. One side of the capacitor C is connected to the output terminal of the power amplifier 335.

A second resistor R2 and a pin diode D are connected in parallel between the first resistor R1 and the capacitor C, and one side of the second resistor R2 and the pin diode D are respectively connected to each other. It is connected to the ground terminal.

When the power amplification module 330 is operated in a low power mode, a voltage of about 2.5 V is applied to the “Vstep” terminal of the bias circuit 331, and a voltage between the first resistor R1 and the second resistor R2 is applied. When this reaches about 0.7V or more, the pin diode D of the impedance adjusting circuit 340 is operated.

4 is a circuit diagram illustrating an equivalent circuit of the pin diode D provided in the impedance adjusting circuit 340 according to an embodiment of the present invention.

When the pin diode D is operated, it is operated with an equivalent circuit as shown in FIG. 4, which has a configuration in which the capacitor b and the current source a are connected in parallel.

The capacitor (b) component of the pin diode (D) forms a parallel circuit with the capacitor (C) of the impedance adjustment circuit 340, so that the output (load) impedance is changed in a low power state and a low power high efficiency amplification operation is performed. Can be.

Therefore, the load impedance is adjusted without changing the internal circuit of the power amplifier module 330, thereby improving the operating characteristics of the power amplifier module 330.

5 is a graph showing a form in which the output of the power amplifier module 330 provided in the front end module 300 according to an embodiment of the present invention is adjusted according to the change of the load impedance, and FIG. 6 is an embodiment of the present invention. The load impedance when the power amplification module 330 provided in the front end module 300 according to the example is operated in a high power mode and a low power mode.

Referring to FIG. 5, it can be seen that the impedance value l2 of the high power mode and the impedance value l1 of the low power mode are displayed on the mitt chart, and are evenly distributed with linear characteristics.

Referring to FIG. 6, the reference line E of the low power mode and the high power mode is formed at a position of 16 dBm of the x-axis coordinate representing the power value, and the measured values of the high power mode and the low power mode are shown to the left and right of the reference line E. Two lines are shown each.

The dotted lines l1 and l2 of the two lines show the case of the power amplification module 330 according to the present invention, and the other lines m1 and m2 show the case of the conventional power amplification module.

According to FIG. 6, it can be seen that the amplification efficiency is improved in both the high power mode l1 and the low power mode l2. In particular, the efficiency is greatly improved toward the low power mode.

In addition, it can be seen that the linearity of the amplification operation is also improved.

Although the present invention has been described above with reference to the embodiments, these are only examples and are not intended to limit the present invention, and those skilled in the art to which the present invention pertains may have an abnormality within the scope not departing from the essential characteristics of the present invention. It will be appreciated that various modifications and applications are not illustrated. For example, each component specifically shown in the embodiment of the present invention can be modified. And differences relating to such modifications and applications will have to be construed as being included in the scope of the invention defined in the appended claims.

According to the front end module according to the present invention, by controlling the load impedance of the power amplifier module it is possible to implement a high efficiency amplification operation in both the high output mode and the low output mode.

In addition, as the high efficiency amplification operation is implemented, power consumption may be reduced, and battery life may be increased and efficiency of the entire communication system may be increased, thereby improving call quality.

Claims (5)

Transmission and reception separation unit for separating and transmitting the RF transmission and reception signal; A power amplifying module for amplifying an RF transmission signal and transmitting the amplified RF signal to the transceiver; And And an impedance adjustment circuit connected between the transmission and reception separation unit and the power amplifier module to adjust load impedance. The method of claim 1, wherein the impedance adjustment circuit A front end module comprising at least one of resistors, capacitors and diodes and varying the output impedance at low power. The method of claim 1, wherein the impedance adjustment circuit A capacitor connected to the power amplifier module; A diode connected with the capacitor; And And at least one resistor constituting a parallel circuit between said capacitor and said diode. The method of claim 1, The power amplifier module comprises a power amplifier, a bias circuit, The impedance adjusting circuit is connected to the output terminal of the power amplifier and the control signal input terminal of the bias circuit. The method of claim 1, An output matching circuit is connected between the transmission and reception separation unit and the power amplifier module, And the impedance adjusting circuit is connected between the power amplifying module and the output matching circuit.

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