KR20080020713A - Thin film transistor substrate and display panel having the same - Google Patents

Abstract

A TFT(Thin Film Transistor) substrate and a display panel having the TFT substrate are provided to form test switching elements at the edge of a TFT substrate to perform reliable test without increasing the size of a display panel and omit a process of cutting the edge of the TFT substrate. A TFT substrate includes a base substrate(10) and a plurality of signal lines and a plurality of test switching elements. The plural signal lines are arranged on the base substrate in an intersecting manner to define a display region. The plural test switching elements are formed in a peripheral region located at one side of the display region. Each of the test switching elements includes a first control electrode(21), a source electrode(23) to which a test signal is applied, a drain electrode(25) electrically connected to the signal line, and a second control electrode(27) formed on an active layer(50) disposed between the source electrode and the drain electrode.

Description

Thin film transistor substrate and display panel having the same {THIN FILM TRANSISTOR SUBSTRATE AND DISPLAY PANEL HAVING THE SAME}

1 is a plan view of a thin film transistor substrate according to an embodiment of the present invention.

FIG. 2 is an enlarged view of a first peripheral region of the thin film transistor substrate illustrated in FIG. 1.

3 is a cross-sectional view of the thin film transistor substrate illustrated in FIG. 2 taken along the line II ′.

4 is a graph illustrating turn-on current characteristics of a dual gate thin film transistor and a single gate thin film transistor.

5 is a plan view of a thin film transistor substrate according to an embodiment of the present invention.

6 is a plan view of a display panel according to an exemplary embodiment of the present invention.

<Explanation of symbols for the main parts of the drawings>

10: thin film transistor substrate 11: inspection gate line

15: shorting bar 17: data pad portion

19: gate pad portion 20: inspection thin film transistor

21: first control electrode 23: input electrode

25 output electrode 27 second control electrode

30 gate insulating film 50 active layer

60: protective film DA: display area

NDA: Non-display area DSL: Display signal line

DL: Data line GL: Gate line

TFT: thin film transistor PE: pixel electrode

The present invention relates to a thin film transistor substrate, a display panel having the same, and an inspection method thereof. More particularly, the present invention relates to a thin film transistor substrate having an inspection switching element, a display panel having the same, and an inspection method thereof.

In general, the liquid crystal display includes a liquid crystal display panel, a gate driving circuit, and a data driving circuit. The gate driving circuit and the data driving circuit may be mounted or integrated in the form of a chip on the edge of the liquid crystal display panel. Control signals are applied to the gate driving circuit and the data driving circuit from the panel driving circuit section, respectively.

In order to detect whether the liquid crystal display panel is defective, various tests such as an open / short test, an array test, and a visual inspection of the liquid crystal display panel are performed at a specific stage of the manufacturing process. This inspection applies inspection signals to data lines and / or gate lines through inspection wiring patterns formed on the thin film transistor substrate, and detects whether or not signals respond to the inspection pad unit, or visually checks whether each pixel operates normally. It can be done in a way to check.

Meanwhile, a laser trimming process of cutting a portion of a thin film transistor substrate on which an inspection wiring pattern is formed with a laser has been performed, but recently, inspection switching is performed for the purpose of simplifying a process for reducing the cost of small and medium-sized panels. A process of omitting the laser trimming process by forming an element on a substrate has been developed.

The source electrode of the inspection switching element is electrically connected to the shorting bar, and the drain electrode is electrically connected to the data line or the gate line. However, in order to apply the same inspection signal as the driving signal of the final liquid crystal display panel to the data line or the gate line through the inspection switching element, the channel area of the inspection switching element must be made larger. However, this has a problem in countering the trend to reduce the area of the display panel by reducing the outer margin of the display panel and the size of the drive chip.

Accordingly, the technical problem of the present invention is to solve such a conventional problem, and an object of the present invention is to provide a thin film transistor substrate having an inspection switching element with an increased turn-on current.

Another object of the present invention is to provide a display panel including the thin film transistor substrate.

In order to achieve the above object of the present invention, a thin film transistor substrate includes a base substrate, a plurality of display signal lines, and a plurality of inspection switching elements. The plurality of display signal lines cross each other on the base substrate to define a display area. A plurality of inspection switching elements are formed in the peripheral area along one side of the display area. The inspection switching element includes a first control electrode, a source electrode to which an inspection signal is applied, a drain electrode facing the source electrode and electrically connected to the display signal line, and a second control electrode formed on the active layer between the source electrode and the drain electrode. .

In order to realize the above object of the present invention, the display panel according to the exemplary embodiment includes a thin film transistor substrate, an opposing substrate facing the thin film transistor, and a liquid crystal layer interposed between both substrates. The thin film transistor substrate includes a base substrate and a plurality of first inspection switching elements. A plurality of gate lines and data lines are formed on the base substrate to cross each other to define a display area. The first inspection switching element is formed in the first peripheral area along one side of the display area. The first inspection switching element includes a first control electrode, a source electrode formed on the first control electrode, a drain electrode facing the source electrode and electrically connected to the data line, and a second control formed on the active layer between the source electrode and the drain electrode. An electrode.

According to the thin film transistor substrate and the display panel having the same, the number and size of manufacturing processes of the thin film transistor substrate and the display panel can be reduced.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

Thin film transistor  Board

1 is a plan view of a thin film transistor substrate according to an embodiment of the present invention.

Referring to FIG. 1, the thin film transistor substrate 100 includes a base substrate 10, a plurality of display signal lines DSL, and a plurality of inspection switching elements 20.

The base substrate 10 may be a glass substrate having optically isotropy. The display signal line DSL defines the display area DA on the base substrate 10. The display signal line DSL includes a plurality of gate lines GL for transmitting a gate signal (also referred to as a "scan signal") and a plurality of data lines DL for transmitting a data signal.

The gate lines GL are disposed substantially parallel to each other in the substantially row direction. The data lines DL are arranged substantially parallel to each other in the column direction. The display area DA is defined as an area where the gate line GL and the data line DL cross each other. A peripheral portion surrounding the display area DA is defined as a non-display area. The non-display area is disposed along one side of the display area DA and is in contact with the end of the data line DL as the first non-display area NDA1, and is disposed along the other side of the display area DA. The area in contact with the end of the gate line GL is defined as the second non-display area NDA2.

In the present embodiment, a plurality of inspection switching elements 20 are disposed in the first non-display area NDA1. The inspection switching element 20 applies an inspection signal to the data line DL.

FIG. 2 is an enlarged view of a first peripheral region of the thin film transistor substrate illustrated in FIG. 1. 3 is a cross-sectional view of the thin film transistor substrate illustrated in FIG. 2 taken along the line II ′.

2 and 3, the gate line GL and the data line DL cross each other to form a plurality of unit pixel areas in the display area DA. An inspection gate line 11 parallel to the gate line GL is formed in the first non-display area NDA1.

In each unit pixel region, the gate electrode GE protrudes from the gate line GL in a substantially column direction, and a plurality of first control electrodes 21 protrude from the inspection gate line 11 in a substantially column direction. . The gate line GL, the gate electrode GE, the inspection gate line 11, and the first control electrode 21 may be formed of silver (Ag), silver alloy, or aluminum (Al) having low resistivity. Alternatively, it may be made of a single film made of aluminum alloy, and in addition to the single film, other films made of materials such as chromium (Cr), titanium (Ti), and tantalum (Ta) having good physical and electrical contact characteristics may be included. It may be made of a multilayer film.

The thin film transistor substrate 100 further includes a gate insulating layer 30 and an active layer 50. The gate insulating layer 30 is made of silicon nitride, and covers the gate line GL, the gate electrode GE, the inspection gate line 11, and the first control electrode 21.

The active layer 50 is formed on the gate insulating film 30 corresponding to the first control electrode 21 and the gate electrode GE. The active layer 50 includes a semiconductor layer 51 and an ohmic contact layer 55. The semiconductor layer 51 forms a channel portion of the thin film transistor TFT and is made of amorphous silicon or polycrystalline silicon. The ohmic contact layer 55 is separated from both sides of the semiconductor layer 51 and is made of n + hydrogenated amorphous silicon in which silicide or n-type impurities are heavily doped.

The data line DL is formed on the gate insulating film 30. The source electrode SE protrudes from the data line DL in a substantially row direction, and a drain electrode DE spaced apart from the source electrode SE is formed.

The input electrode 23 and the output electrode 25 of the inspection switching element 20 are formed in the same layer as the data line DL. The input electrode 23 extends substantially in the column direction in the first non-display area NDA1. The output electrode 25 extends substantially in the column direction and is electrically connected to the data line DL.

The data line DL, the source electrode SE, the drain electrode DE, the input electrode 23 and the output electrode 25 may be made of aluminum or silver having a low specific resistance, and may be different from the gate line GL. It may include a conductive material having excellent contact properties with the material.

 The pair of source electrode SE, the drain electrode DE, the input electrode 23 and the output electrode 25 are at least partially positioned on the top of the corresponding active layer 50, respectively, and the gate electrode GE and the first control electrode. It is located opposite to each other with respect to (21).

In the first non-display area NDA1, a shorting bar 15 for applying a test signal to the test switching devices 20 is further formed. The shorting bar 15 may be formed in parallel with the gate line GL, and may be formed on the same layer as the data line DL, the same layer as the gate line GL, or another layer. The input electrodes 23 of the inspection switching elements 20 are electrically connected in parallel to the shorting bar 15.

The thin film transistor substrate 100 further includes a protective film 60 made of silicon oxide or silicon nitride. The passivation layer 60 covers the data line DL, the source electrode SE, the drain electrode DE, the input electrode 23, and the output electrode 25. The first contact hole CT1 exposing a part of the first control electrode 21 is formed in the passivation layer 60 and the gate insulating layer 30, and the part of the drain electrode DE is exposed in the passivation layer 60. The second contact hole CT2 is formed.

The pixel electrode PE is further formed in the unit pixel area on the passivation layer 60. The pixel electrode PE may be a transparent conductive material, for example, indium tin oxide (ITO), indium zinc oxide (IZO), or amorphous indium tin oxide (a-ITO). Or the like. The pixel electrode PE extends into the second contact hole CT2 and is electrically connected to the drain electrode DE.

The second control electrode 27 of the inspection switching element 20 is further formed on the same layer as the pixel electrode PE. The second control electrode 27 is formed on the passivation film 60 on the channel region between the input electrode 23 and the output electrode 25. The second control electrode 27 partially overlaps the input electrode 23 and the output electrode 25, respectively. The second control electrode 27 is formed of the same transparent material as the pixel electrode PE and is formed together with the pixel electrode PE.

The second control electrode 27 extends into the first contact hole CT1 and is electrically connected to the first control electrode 21. Therefore, the same control signal is simultaneously applied to the first control electrode 21 and the second control electrode 27. In another embodiment, the first control electrode 21 and the second control electrode 27 may be insulated, and different control signals may be applied to each other.

On the other hand, a data pad portion 17 is further formed in the first non-display area NDA1 corresponding to the inspection switching element 20 and the display area DA. The data pad unit 17 provides a terminal to which the data driving chip is electrically connected. An opening for contact is formed in the passivation layer 60, and the data pad part 17 extends to the opening and is electrically connected to the data line DL. The data pad unit 17 may be made of a transparent conductive material or metal.

In addition, a gate pad portion 19 is further formed in the second non-display area NDA2. The gate pad portion 19 provides a terminal to which the gate driving chip is electrically connected.

The inspection switching element 20 includes the first control electrode 21, the active layer 50, the input electrode 23, the output electrode 25, and the second control electrode 27 described above. The display thin film transistor TFT includes a gate electrode GE, an active layer 50, a source electrode SE, and a drain electrode DE.

An inspection signal may be applied to the inspection switching device 20 to inspect whether wirings and devices such as the gate line GL, the data line DL, and the display thin film transistor TFT are normally formed.

For example, from the outside, the inspection unit 105, as shown in FIG. 1, is connected to the shorting bar 15 and the inspection gate line 11, respectively. The inspection unit 305 applies a turn-on voltage to the inspection gate line 11, and applies a data voltage to the shorting bar 15, respectively. Accordingly, a data voltage is applied to each data line DL. In addition, the second test unit may be electrically connected to the terminals of the gate pad unit 19 to apply a gate turn-on signal. As a result, a data voltage is applied to each pixel electrode PE. When the thin film transistor substrate 100 is coupled to the lower substrate of the display panel, a visual inspection of normal operation of each pixel may be performed by the above method.

The inspection switching element 20 is a dual gate thin film transistor including two control electrodes, that is, the first control electrode 21 and the second control electrode 27. On the other hand, the thin film transistor TFT connected to the pixel electrode PE is a single gate thin film transistor having only one gate electrode GE.

4 is a graph illustrating turn-on current characteristics of a dual gate thin film transistor and a single gate thin film transistor.

In FIG. 4, the horizontal axis represents the turn-on voltage Vgs applied to the control electrode in the thin film transistor, and the vertical axis represents the turn-on current Ids flowing through the active layer 50.

Referring to FIG. 4, as the turn-on voltage Vgs increases, the turn-on current Ids also increases. When the turn-on voltage Vgs increases above a certain value, the turn-on current Ids is increased. It can be seen that the linear increase with respect to the turn-on voltage (Vgs). In addition, it can be seen that the dual gate thin film transistor has a larger turn-on current (Ids) than the single gate thin film transistor.

Meanwhile, in the inspection of the thin film transistor substrate 100 or the display panel including the same, in order to apply the same voltage as the data voltage applied to the final display panel, the width and length of the channel region of the inspection switching element 20 are sufficiently sufficient. It should be large. However, when the size of the channel region of the inspection switching element 20 increases, the area of the non-display region of the thin film transistor substrate 100 increases, which is a problem against the trend of reducing the size of the display panel.

Therefore, the same voltage as in the actual driving may be applied to each pixel electrode PE without increasing or decreasing the size of the channel region of the inspection switching element 20, that is, the size of the inspection switching element 20. It is necessary to form an inspection switching element 20 that can be inspected.

In the present exemplary embodiment, the inspection switching element 20 is a dual gate thin film transistor, and the turn-on current Ids is larger than that of the single gate thin film transistor for the same turn-on voltage Vgs. Sufficient voltage may be applied to each of the pixel electrodes PE without increasing the size of. Therefore, the size of the thin film transistor substrate 100 and the display panel can be reduced.

5 is a plan view of a thin film transistor substrate according to an embodiment of the present invention.

Referring to FIG. 5, the thin film transistor substrate 300 includes a base substrate 310, a plurality of display signal lines DSL, a first inspection switching element 320, and a second inspection switching element 420. The thin film transistor substrate 300 is substantially the same as the thin film transistor substrate 100 shown in FIGS. 1 to 3 except that the second inspection switching device 420 is further formed.

The first inspection switching element 320 is the same as the inspection switching element 20 illustrated in FIGS. 1 to 3. The second inspection switching element 420 is formed in the second non-display area NDA2. The second inspection switching element 420 is a dual gate type device similar to the first inspection switching element 320.

The second inspection switching element 420 may include a third control electrode, an active layer, an input electrode, an output electrode, and a fourth control electrode. In the layered structure, the third control electrode corresponds to the first control electrode of the first inspection switching element 320, and the fourth control electrode corresponds to the second control electrode. The output electrode of the second inspection switching element 420 may be electrically connected to the gate line GL through the gate pad part 419.

A second inspection gate line 411 and a second shorting bar 415 are further formed on the thin film transistor substrate 300. The third control electrode protrudes from the second inspection gate line 411, and the input electrode of the second inspection switching element 420 is electrically connected to the second shorting bar 415. The second inspection gate line 411 and the second shorting bar 415 are electrically connected to the second inspection unit 405.

In order to inspect the thin film transistor substrate 300, a turn-on signal is applied to the first inspection gate line 311 by the first inspection unit 305, and to the input electrode of the first inspection switching element 320. A data voltage can be applied. In addition, the turn-on signal may be applied to the second inspection gate line 411 by the second inspection unit 405, and the gate signal may be applied to the input electrode of the second inspection switching element 420.

Display panel

6 is a plan view of a display panel according to an exemplary embodiment of the present invention.

Referring to FIG. 6, the display panel 700 includes a thin film transistor substrate 710, an opposing substrate 800, and a liquid crystal layer.

The thin film transistor substrate 710 is substantially the same as the thin film transistor substrate 300 illustrated in FIG. 5. Accordingly, the thin film transistor substrate 710 may include a base substrate 710, a gate line GL, a data line DL, and a dual gate type first inspection switching element 720 and a second inspection switching element 820. It includes.

The opposing substrate 800 may face the thin film transistor substrate 710, and a common electrode may be formed on the opposing substrate 800 to face the pixel electrode of the thin film transistor substrate 710. The opposing substrate 800 may further include a color filter corresponding to each unit pixel area.

The liquid crystal layer is interposed between the thin film transistor substrate 710 and the opposing substrate 800. The arrangement of the liquid crystal layer is changed by an electric field formed between the common electrode and the pixel electrode, so that the display panel 700 displays an image of a desired gray scale.

The display panel 700 may further include a data driver chip 708 and a gate driver chip 808. The data driver chip 708 and the gate driver chip 808 are electrically connected to the data pad part and the gate pad part, respectively.

In order to inspect the display panel 700, a turn-on signal is applied to the first inspection gate line 711 by the first inspection unit, and a data voltage is applied to an input electrode of the first inspection switching element 720. can do. In addition, the turn-on signal may be applied to the second inspection gate line 811 by the second inspection unit, and the gate signal may be applied to the input electrode of the second inspection switching element 820.

In addition, when the first inspection gate line 711 and the second inspection gate line 811 are turned off, the first inspection switching element 720 and the second inspection switching element 820 are turned off. The operation of the data driver chip 708 and the gate driver chip 808 has no effect, respectively. Therefore, the process of cutting the edges of the thin film transistor substrate 710 on which the first inspection switching element 720 and the second inspection switching element 820 are formed may be omitted.

In this case, both the first inspection switching device 720 and the second inspection switching device 820 are dual gate thin film transistors and have a larger turn-on current than single gate thin film transistors. Therefore, the size of the thin film transistor substrate 710 is not increased without cutting the edges of the thin film transistor substrate 710 on which the first inspection switching element 720 and the second inspection switching element 820 are formed.

As described in detail above, according to the present invention, when the dual gate type inspection switching element is formed at the edge of the thin film transistor substrate, the size of the display panel is not increased, and the actual driving of the thin film transistor substrate or the display panel having the same is performed. By applying the same signal as can be performed a reliable inspection, it is possible to omit the step of cutting the edge of the thin film transistor substrate on which the inspection switching element is formed.

In the detailed description of the present invention described above with reference to the preferred embodiments of the present invention, those skilled in the art or those skilled in the art having ordinary skill in the art will be described in the claims to be described later It will be understood that various modifications and variations can be made in the present invention without departing from the scope of the present invention.

Claims (13)

A base substrate; A plurality of display signal lines intersecting each other on the base substrate to define a display area; And A first control electrode, a source electrode to which a test signal is applied, a drain electrode facing the source electrode and electrically connected to the display signal line, and between the source electrode and the drain electrode; A thin film transistor substrate comprising a plurality of inspection switching elements including a second control electrode formed on the active layer of the. The display device of claim 1, wherein the display signal line includes a gate line and a data line crossing the gate line. A gate insulating layer covering the first control electrode and the gate line; And And a passivation layer covering the source electrode, the active layer, the drain electrode, and the data line formed on the gate insulating layer. The thin film transistor substrate of claim 2, wherein the second control electrode formed on the passivation layer extends into a contact hole formed in the passivation layer and is electrically connected to the first control electrode. The display device of claim 3, further comprising a pixel electrode electrically connected to the gate line and the data line. The second control electrode is a thin film transistor substrate, characterized in that made of the same material as the pixel electrode. The thin film transistor substrate of claim 2, wherein the drain electrode is electrically connected to the data line. The thin film transistor substrate of claim 5, further comprising a data pad part formed in the peripheral area to electrically connect the drain electrode and the data line. The thin film transistor substrate of claim 2, wherein the drain electrode is electrically connected to the gate line. The thin film transistor substrate of claim 7, further comprising a gate pad part formed in the peripheral area to electrically connect the drain electrode and the gate line. The thin film transistor substrate of claim 1, further comprising a shorting bar connected in parallel to the source electrodes of the plurality of inspection switching elements to apply the inspection signal. A base substrate having a plurality of gate lines and data lines crossing each other to define a display area, a first control electrode formed on a first peripheral area along one side of the display area, and a source electrode formed on the first control electrode A thin film transistor substrate including a plurality of first inspection switching elements facing the source electrode and including a drain electrode electrically connected to the data line and a second control electrode formed on an active layer between the source electrode and the drain electrode; An opposing substrate facing the thin film transistor substrate; And And a liquid crystal layer interposed between the thin film transistor substrate and the opposing substrate. The method of claim 10, wherein the thin film transistor substrate A data pad part formed in the first peripheral area to electrically connect the drain electrode and the data line; And And a data driving chip electrically connected to the data pad part. The method of claim 11, wherein the thin film transistor substrate A third gate electrode formed on a second peripheral area along the other side of the display area; A source electrode formed on the third gate electrode; A drain electrode facing the source electrode and electrically connected to the gate line; And And a plurality of second inspection switching elements including a fourth gate electrode formed on the active layer between the source electrode and the drain electrode. The method of claim 12, A gate pad portion formed in the second peripheral region to electrically connect a drain electrode and a gate line of the second inspection switching element; And And a gate driving chip electrically connected to the gate pad part.

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