KR20080004911A - Plasma display device - Google Patents

Abstract

A plasma display apparatus is provided to apply a voltage and a control signal between address buffer boards by directly contacting and connecting ends of the address buffer boards. A plasma display panel(105) displays an image. The plasma display panel is attached to a surface of a chassis base(115). The chassis base supports the plasma display panel. A circuit board assembly is mounted on the other surface of the chassis base to drive the plasma display panel. The circuit board assembly includes a power supply board(132), a logic board(134), and an address buffer board(133). The power supply board applies power. The logic board generates a control signal. The address buffer board is connected to the power supply board and the logic board. The address buffer board includes plural buffer boards(133a,133b,133c). The buffer boards receive a voltage supplied from the power supply board and the control signal applied from the logic board. A sending unit is formed on an end surface of one of the buffer boards. A receiving unit is formed on the other surface of the remaining buffer board. A fixing unit connects the sending unit to the receiving unit.

Description

Plasma Display Device {PLASMA DISPLAY DEVICE}

1 is an exploded perspective view schematically showing a plasma display device according to a first embodiment of the present invention.

2 is a plan view of FIG. 1.

3 is a cross-sectional view illustrating a plane taken along line III-III of FIG. 2.

4 is an exploded cross-sectional view illustrating an address buffer board of the plasma display device according to the first embodiment of the present invention.

5 is a cross-sectional view illustrating an address buffer board of the plasma display device according to the second embodiment of the present invention.

<Description of the symbols for the main parts of the drawings>

105: plasma display panel 110: thermal diffusion sheet

115: chassis base 120: boss

125: set screw 130: circuit board assembly

131: sustain electrode driving board 132: power supply board

133: address buffer board 133a: first buffer board

133b: second buffer board 133c: third buffer board

134: logic board 135: scanning electrode drive board

140: power cable 145: SMPS

300: set screw 401: receiver

401a: first receiver 401b: second receiver

401c: third receiving unit 402: transmitting unit

402a: first transmitter 402b: second transmitter

403c: third transmission unit 405: screw hole

The present invention relates to a plasma display device, and more particularly, to a plasma display device for applying voltage and control signals to each other by directly contacting ends of address buffer boards.

In general, a plasma display panel displays an image by using discharge. Since the display capacity, brightness, contrast, afterimage, and viewing angle are excellent as well as thin, the plasma display panel is made of a thin film. It is attracting the spotlight as a display device that can replace the TV using).

Such a plasma display panel is provided with an electrode, and discharge is generated between the electrodes by a direct current or an alternating voltage applied to the electrode, and plasma is generated by the discharge, and the phosphor is activated by the generated plasma light. Visible light is generated from the activated phosphors and thus an image is realized.

The plasma display panel includes a sustain electrode and a scan electrode inside the front substrate, and an address electrode and a partition wall are formed on the rear substrate. The sustain electrodes and the scan electrodes are arranged in pairs with respect to one discharge cell, and discharge occurs when a voltage is applied between the sustain electrodes and the scan electrodes. Usually, the sustain electrode and the scan electrode are composed of a transparent electrode and a bus electrode connected to the transparent electrode.

In general, the sustain electrode, the scan electrode, and the address electrode are formed in a stripe shape on the front substrate and the rear substrate, and cross each other at right angles to each other when the front substrate and the rear substrate are assembled to each other.

On the other hand, a dielectric layer and a protective film are sequentially stacked on the sustain electrode and the scan electrode provided on the inner surface of the front substrate. A dielectric layer is formed on the address electrode provided on the inner surface of the rear substrate, and a partition wall is formed on the upper surface of the dielectric layer, and the discharge cell is partitioned by the partition wall.

An inert gas such as neon (Ne) and xenon (Xe) is filled in the discharge cell, and phosphors are coated on the inner surface of the partition wall and the surface of the dielectric layer forming each discharge cell.

Referring to the operation of the plasma display panel, first, when an address voltage and a scan voltage are applied to the address electrode and the scan electrode, wall charges are formed on the inner surface of the discharge cell, that is, the dielectric layer, at the intersection of the address electrode and the scan electrode. do. Next, when a sustain voltage is applied between the sustain electrode and the scan electrode in addition to the wall charge, discharge occurs in the discharge cell while exceeding the discharge start voltage.

In general, a plasma display apparatus includes a plasma display panel 105 for implementing an image, a chassis base for supporting the panel, and a plurality of printed circuit board assemblies mounted on the chassis base. Include.

Meanwhile, the circuit board assembly provided in the chassis base drives the plasma display panel. The circuit board assembly includes a sustain electrode driving board for applying a driving signal to the sustain electrode, a scan electrode driving board for applying a driving signal to the scan electrode, an address buffer board for applying an address voltage to the address electrode, and receiving an image signal from the outside. It includes a logic board for applying control signals required to drive the panel and a power supply board for supplying power.

The sustain electrode driving board and the scan electrode driving board are respectively connected to the sustain electrode and the scan electrode drawn out from the inside of the plasma display panel, and the address buffer board is connected to the address electrode drawn out from the inside of the plasma display panel. Each is connected through a flexible circuit and a connector.

The sustain electrode driving board and the scan electrode driving board are power switching elements such as power transistors, field effect transistors (FETs), or intelligent power modules (IPMs) for easily applying driving signals to the sustain electrodes and the scan electrodes. And a circuit element for driving the power switching element, a protection circuit for protecting the power switching element, and the like.

In addition, a power supply board is equipped with a switching mode power supply (SMPS), in general, SMPS is a power supply for converting the power supplied from the outside to suit various electrical equipment.

The role of a general power supply device is to mitigate electric shock by intermittently controlling high frequencies above a commercial frequency using switching characteristics of a semiconductor. It is largely divided into linear power supply and SMPS. Especially SMPS is advantageous for miniaturization and high efficiency.

As described above, the SMPS is mounted on the power supply board, and the SMPS applies an address voltage to the address buffer board.

On the other hand, as the plasma display panel is enlarged, the processing capacity of the address buffer board also increases significantly. In addition, the length of the address buffer board is increased. As a result, the address buffer board is divided into a plurality.

In a plasma display device, a circuit board assembly includes a power supply board for supplying power to each board, a logic board for generating a control signal according to an image signal, and applying an address voltage to an address electrode (not shown) according to the control signal. It includes an address buffer board. In addition, the circuit board assembly includes a scan electrode driving board, a sustain electrode driving board, and the like, which receive a control signal from a logic board and apply a driving signal to a scan electrode (not shown) and a sustain electrode (not shown).

For example, the address buffer board is formed long on the lower side of the chassis base, and the address buffer board is divided into three. That is, the address buffer board includes a first buffer board, a second buffer board, and a third buffer board.

A cable is mounted between the first buffer board and the second buffer board and between the second buffer board and the third buffer board, and the cable applies a voltage or a control signal.

Since the plasma display device requires a separate cable and connector for connecting a plurality of buffer boards, not only additional work time is required during production, but also additional components are required. This increases the manufacturing cost of the plasma display device.

The present invention was devised to solve the above problems, and its object is to configure an address buffer board with a plurality of buffer boards, and directly connect the ends of the buffer boards to control voltage and control between the buffer boards. It is to provide a plasma display device for transmitting a signal.

In order to achieve the above object, a plasma display apparatus according to the present invention includes a plasma display panel on which an image is implemented, a chassis base on which one surface of the plasma display panel is attached and supported, and a plasma display panel mounted on another surface of the chassis base. And a circuit board assembly for driving a display panel, wherein the circuit board assembly includes a power supply board for applying power, a logic board for generating a control signal, and an address buffer board connected to the power supply board and the logic board. The address buffer board may include a plurality of buffer boards receiving a voltage supplied from the power supply board and a control signal applied from a logic board, and at one end of the buffer board of one of the buffer boards. A transmitter is formed, and One surface of one of said buffer board is formed with a receiving unit, and a fastener for adhesive connection to the receiver and the transmitter.

The fixture is formed by a set screw fastened to the buffer board plasma display device. The buffer board includes a screw hole to which the set screw is fastened. And a set screw coupled to the screw hole. And a transmitter unit and a receiver unit.

Hereinafter, various embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is an exploded perspective view schematically showing a plasma display device according to a first embodiment of the present invention. 2 is a plan view of FIG. 1.

Referring to this figure, the plasma display apparatus is provided on the plasma display panel 105 for displaying an image by using gas discharge, and is disposed on the back surface of the plasma display panel 105 to conduct heat generated by gas discharge in a planar direction. It includes a thermal diffusion sheet 110 to diffuse. It also includes a chassis base 115 attached to the back of the plasma display panel 105 to support the plasma display panel 105, and a circuit board assembly mounted to the back of the chassis base 115 to drive the panel. do.

The plasma display panel 105 displays an image by using gas discharge. Embodiments of the present invention relate to the coupling relationship between the plasma display panel 105 and other components, and thus, detailed description of the panel is omitted here. do.

The chassis base 115 is attached to the back of the plasma display panel 105 to support them, and on the opposite side circuit board assemblies are mounted to support them as well. The chassis base 115 thus has mechanical rigidity capable of supporting the plasma display panel 105 and the circuit board assemblies.

A plurality of bosses 120 protrude from the rear surface of the chassis base 115. In addition, the circuit board assembly is tightly fixed to the boss 120 by the set screw 125.

That is, the circuit board assembly includes a sustain electrode driving board 131 for applying a driving signal to a sustain electrode (not shown) and a sustain electrode driving board 131 for applying a driving signal to a scan electrode (not shown). In addition, an address buffer board 133 that applies an address voltage to an address electrode (not shown), receives an image signal from the outside, generates a control signal required to drive the address electrode, the sustain electrode, and the scan electrode, and then applies it to the corresponding board. And a power supply board 132 for supplying power for driving the circuit board assembly.

In addition, although not shown in the drawing, a front cover (not shown) and a back cover (not shown) are installed on the front side of the plasma display panel 105 and the rear side of the chassis base 115 to form an external appearance of the plasma display apparatus.

The sustain electrode driving board 131, the scan electrode driving board 135, and the address buffer board 133 are connected to the sustain electrode of the plasma display panel 105 through a flexible printed circuit and a connector. Are electrically connected to the scan electrode (not shown) and the address electrode (not shown).

The address buffer board 133 is formed long on the lower side of the chassis base 115, and the address buffer board 133 is divided into three. That is, the address buffer board 133 is divided into a first buffer board 133a, a second buffer board 133b, and a third buffer board 133c.

On the other hand, the sustain electrode driving board 131 and the scan electrode driving board 135 is involved in the sustain discharge. During sustain discharge, the sustain electrode driving board 131 applies a driving signal to the sustain electrode, and the scan electrode driving board 135 applies a driving signal to the scan electrode. To this end, the sustain electrode driving board 131 and the scan electrode driving board 135 include power switching elements such as a field effect transistor (FET).

The power supply board 132 supplies power to the sustain electrode driving board 131, the scan electrode driving board 135, the logic board 134, and the address buffer board 133. The power supply board 132 includes an SMPS 145. The SMPS 145 is a modular power supply device that converts electricity supplied from the outside to suit various electric devices.

As shown, one end of the power cable 140 is connected to the power supply board 132, and the other end of the power cable 140 is connected to the second buffer board 133b. The power cable 140 applies the voltage generated by the SMPS 145 of the power supply board 132 to the second buffer board 133b.

In addition, the voltage applied to the second buffer board 133b is applied to the first buffer board 133a and the second buffer board 133b.

The first, second, and third buffer boards 133a, 133b, and 133c exchange not only a voltage but also a control signal with each other. In an embodiment of the present invention, a separate cable for applying a voltage or a control signal is not provided. . Meanwhile, the left end of the first buffer board 133a and the right end of the second buffer board 133b overlap, and the left end of the second buffer board 133b and the right end of the third buffer board 133c overlap. In this overlapping portion, a voltage or a control signal is applied to each other.

Although not shown in the drawing, the second buffer board 133b receives a control signal from the logic board 134 using a separate cable or the like, and the control signal applied to the second buffer board 133b is the first buffer board. May be applied to 133a.

3 is a cross-sectional view illustrating a plane taken along line III-III of FIG. 2, and illustrates a portion where an address buffer board overlaps.

As shown in FIG. 3, the chassis base 115 is provided on the x-y plane, and the boss 120 protrudes in the z-axis direction on the upper surface of the chassis base 115. The second buffer board 133b is mounted on the boss 120, and the first buffer board 133a is mounted thereon. The set screw 300 is screwed to the boss 120 through the first buffer board 133a and the second buffer board 133b. The first buffer board 133a and the second buffer board 133b are in close contact with the set screw 300.

The second buffer board 133b is connected to the power cable 140 to receive a voltage from the power supply board 132. In addition, the voltage applied to the second buffer board 133b is applied to the first buffer board 133a.

Although not shown in the drawing, the second buffer board 133b receives a control signal from the logic board 134 using a separate cable or the like, and the control signal applied to the second buffer board 133b is the first buffer board. May be applied to 133a.

4 is an exploded cross-sectional view illustrating an address buffer board of the plasma display device according to the first embodiment of the present invention.

When comparing the embodiment of FIG. 3, detailed descriptions of similar or identical parts are omitted, and different points will be described in detail.

As shown in FIG. 4, a screw hole 405 is formed in the first buffer board 133a and the second buffer board 133b, and a boss hole 406 is formed in the boss 120. In addition, a receiver 401 is formed on a lower surface of the first buffer board 133a, and a transmitter 402 is formed on an upper surface of the second buffer board 133b.

When the first buffer board 133a and the second buffer board 133b are in close contact, the receiver 401 and the transmitter 402 are in close contact with each other. Accordingly, the voltage applied to the power cable 140 is transmitted to the receiver 401 through the second buffer board 133b and the transmitter 402, which is applied to the first buffer board 133a.

The transmitter 402 and the receiver 401 may be formed by printing a pattern on one side of the address buffer board 133.

5 is a cross-sectional view illustrating an address buffer board of the plasma display device according to the second embodiment of the present invention.

When comparing the first embodiment of FIGS. 1 to 4, detailed descriptions of similar or identical parts are omitted, and different points will be described in detail.

As shown in FIG. 5, the receiver 401 includes a first receiver 401a, a second receiver 401b, and a third receiver 401b. In addition, the transmitter 402 includes a first transmitter 402a, a second transmitter 402b, and a third transmitter 402c.

When the first buffer board 133a and the second buffer board 133b are in close contact with each other, the first transmitter 402a contacts the first receiver 401a, and the second transmitter 402b is connected to the second receiver 401b. The third transmitter 402c is in contact with the third receiver 401b.

As described above, when the transmitter 402 and the receiver 401 are divided into plural, a plurality of signals are transmitted. For example, different voltages and control signals may be applied together.

In the first embodiment of the present invention, the structure between the first buffer board 133a and the second buffer board 133b is illustrated as illustrated in FIGS. 3 to 5. However, the structure between the second buffer board 133b and the third buffer board 133c is similar, and a detailed description thereof will be omitted.

Although the preferred embodiments of the present invention have been described above, the present invention is not limited thereto, and various modifications and changes can be made within the scope of the claims and the detailed description of the invention and the accompanying drawings. Naturally, it belongs to the scope of the invention.

As described above, according to the plasma display device according to the present invention, the ends of the address buffer boards are directly connected to each other to apply voltage and control signals to each other between the address buffer boards.

Claims (5)

A plasma display panel on which an image is implemented; A chassis base on which one surface of the plasma display panel is attached and supported; And A circuit board assembly mounted on the other surface of the chassis base to drive the plasma display panel; The circuit board assembly, A power supply board for supplying power; A logic board for generating a control signal; And An address buffer board connected to the power supply board and the logic board, The address buffer board includes a plurality of buffer boards receiving a voltage supplied from the power supply board and a control signal applied from a logic board. One end of one of the buffer boards of the buffer board is formed with a transmitter, one side of the other buffer board is formed with a receiver, And a fixture configured to closely connect the transmitter and the receiver. According to claim 1, The fixture is formed by a set screw fastened to the buffer board plasma display device. According to claim 1, The buffer board includes a screw hole to which the set screw is fastened. The method of claim 3, wherein And a set screw coupled to the screw hole. According to claim 1, And a transmitter unit and a receiver unit.

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