KR20080001482A - Pixel circuit in oled - Google Patents
Pixel circuit in oled Download PDFInfo
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- KR20080001482A KR20080001482A KR1020060059952A KR20060059952A KR20080001482A KR 20080001482 A KR20080001482 A KR 20080001482A KR 1020060059952 A KR1020060059952 A KR 1020060059952A KR 20060059952 A KR20060059952 A KR 20060059952A KR 20080001482 A KR20080001482 A KR 20080001482A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
- G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
- G09G3/3241—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element the current through the light-emitting element being set using a data current provided by the data driver, e.g. by using a two-transistor current mirror
- G09G3/325—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element the current through the light-emitting element being set using a data current provided by the data driver, e.g. by using a two-transistor current mirror the data current flowing through the driving transistor during a setting phase, e.g. by using a switch for connecting the driving transistor to the data driver
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/04—Structural and physical details of display devices
- G09G2300/0421—Structural details of the set of electrodes
- G09G2300/043—Compensation electrodes or other additional electrodes in matrix displays related to distortions or compensation signals, e.g. for modifying TFT threshold voltage in column driver
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
- G09G2300/0876—Supplementary capacities in pixels having special driving circuits and electrodes instead of being connected to common electrode or ground; Use of additional capacitively coupled compensation electrodes
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0294—Details of sampling or holding circuits arranged for use in a driver for data electrodes
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0297—Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns
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Abstract
Description
도 1은 종래 기술에 의한 유기전계 발광표시장치의 화소 회로도.1 is a pixel circuit diagram of an organic light emitting display device according to the related art.
도 2는 본 발명에 의한 유기전계 발광표시장치의 화소 회로도.2 is a pixel circuit diagram of an organic light emitting display device according to the present invention;
도 3은 도 2의 각부에 공급되는 신호의 타이밍도. 3 is a timing diagram of signals supplied to respective parts of FIG. 2;
***도면의 주요 부분에 대한 부호의 설명*** *** Description of the symbols for the main parts of the drawings ***
T1-T6 : 트랜지스터T1-T6: Transistor
본 발명은 유기발광다이오드(OLED) 패널에서 문턱전압과 전압강하를 보상하는 기술에 관한 것으로, 특히 OLED 패널에서 소자 불균일로 인하여 발생되는 문턱전압을 보상하고 전원단자전압 라인의 전압 강하 문제를 해결하는데 적당하도록 한 유기전계 발광표시장치의 화소 회로에 관한 것이다.BACKGROUND OF THE
현재 AMOLED 디스플레이를 위한 화소 구조는 구동 방식에 따라 크게 전압 기입 화소, 전류기입 화소, 디지털 구동 화소로 구분할 수 있다. Currently, a pixel structure for an AMOLED display can be classified into a voltage write pixel, a current write pixel, and a digital drive pixel according to a driving scheme.
전압 기입 화소 구조는 고속 기입이 가능하며 전압으로 기입하기 때문에 기존의 TFT-LCD 구동 드라이버 LSI와 거의 비슷하여 쉽게 드라이버 LSI의 구현이 용이하다 는 장점이 있다. 그러나 전압 기입 방식은 화소 전원 전압의 IR drop으로 인한 패널의 상하간 휘도 차이가 있을 뿐 아니라 크로스토크 노이즈(crosstalk noise)가 발생한다는 단점이 있으며 TFT의 문턱전압의 불균일도는 어느 정도 보상이 가능하나 이동도의 보상이 어렵다는 문제점이 있다. Since the voltage write pixel structure enables high-speed writing and writes with voltage, the voltage writing pixel structure is almost similar to the conventional TFT-LCD driving driver LSI, and thus, there is an advantage that the driver LSI can be easily implemented. However, the voltage writing method has a disadvantage in that there is a difference in luminance between the top and bottom of the panel due to IR drop of the pixel power supply voltage, and crosstalk noise is generated, and the nonuniformity of the threshold voltage of the TFT can be compensated to some extent. There is a problem that the compensation of mobility is difficult.
전류 기입 화소 구조는 전류로 기입하기 때문에 TFT의 특성 변화 보상이 용이하고 전원 전압의 IR drop도 보상되지만 낮은 계조의 전류 기입 시 기생 부하(parasitic load)가 큰 데이터 라인으로 인해 짧은 로우 라인 타임(row line time)안에 전류 기입이 어렵다는 문제점이 있다. Since the current write pixel structure writes with current, it is easy to compensate for changes in the characteristics of the TFT and compensates for the IR drop of the power supply voltage, but a short low line time due to a data line with a large parasitic load when writing low grayscale currents. There is a problem that it is difficult to write a current in a line time.
디지털 구동 화소는 OLED 물질의 열화나 특성 변화에 의해 아주 민감하다는 문제점이 있다. Digital driving pixels have a problem in that they are very sensitive to deterioration of OLED materials or property changes.
도 1은 종래 기술에 의한 유기전계 발광표시장치의 화소 회로도로서 이에 도시한 바와 같이, 소스가 선택라인(SEL)에 접속되고, 게이트가 데이터라인(Vdata)에 접속된 제1피채널 모스트랜지스터(이하, '트랜지스터'라 칭함)(MP1)와; 상기 제1트랜지스터(MP1)를 통해 전달되는 데이터신호를 래치하는 제2,3트랜지스터(MP2),(MP3)와; 소스가 전원단자(VDD)에 접속되고 게이트가 상기 래치의 출력단에 접속된 제4트랜지스터(MP4)와; 소스가 상기 제4트랜지스터(MP4)의 드레인에 접속되고, 게이트와 드레인이 발광신호단자(Em), 유기발광다이오드(OLED)에 각기 접속된 제5트랜지스터(MP5)와; 상기 제4피트랜지스터(MP4)의 소스와 게이트 사이에 접속된 캐피시터(Cs)로 구성된 것으로, 이의 작용을 설명하면 다음과 같다.FIG. 1 is a pixel circuit diagram of an organic light emitting display according to the related art. As shown in FIG. 1, a first P-channel MOS transistor having a source connected to a selection line SEL and a gate connected to a data line Vdata ( Hereinafter referred to as 'transistor') (MP1); Second and third transistors MP2 and MP3 for latching a data signal transmitted through the first transistor MP1; A fourth transistor MP4 having a source connected to a power supply terminal VDD and a gate connected to an output terminal of the latch; A fifth transistor (MP5) having a source connected to the drain of the fourth transistor (MP4), and a gate and a drain respectively connected to the light emitting signal terminal (Em) and the organic light emitting diode (OLED); It is composed of a capacitor (Cs) connected between the source and the gate of the fourth pit transistor (MP4), the operation thereof will be described as follows.
현재 구동하고자 하는 선택라인(또는 스캔라인)에 로우 신호가 인가되면, 이에 의해 트랜지스터(MP1)가 온된다. 이에 따라, 데이터라인의 데이터신호(Vdata)가 상기 트랜지스터(MP1)를 통해 래치 구성요소인 트랜지스터(MP2),(MP3)에 전달되어 래치된다.When the low signal is applied to the selection line (or scan line) to be driven currently, the transistor MP1 is turned on. Accordingly, the data signal Vdata of the data line is transferred to the transistors MP2 and MP3 which are latch components through the transistor MP1 and latched.
이에 따라, 트랜지스터(MP4)의 게이트에 Vdata-Vth(MP4)의 전압이 인가되고, 트랜지스터(MP5)는 게이트에 공급되는 발광신호(Em)에 상응되게 구동된다.Accordingly, the voltage of Vdata-Vth (MP4) is applied to the gate of the transistor MP4, and the transistor MP5 is driven corresponding to the light emission signal Em supplied to the gate.
이와 같은 상태에서, 유기발광다이오드(OLED)는 상기 트랜지스터(MP4),(MP5)를 통해 공급되는 전류에 상응되게 발광한다. 아래의 [수학식1]은 상기 유기발광다이오드(OLED)에 공급되는 전류에 대한 개략식이다. In this state, the organic light emitting diode OLED emits light corresponding to the current supplied through the transistors MP4 and MP5.
도 1의 회로의 구동방식은 전압구동방식이므로 문턱전압만 보상이 가능하다. 여기서, 상기 트랜지스터(MP2)로 문턱전압을 샘플링하고, 트랜지스터(MP3)로 캐피시터(Cs)를 리플레쉬시킨다. 따라서, 상기 트랜지스터(MP2),(MP4)의 특성이 동일해야 한다.Since the driving method of the circuit of FIG. 1 is a voltage driving method, only a threshold voltage can be compensated. Here, the threshold voltage is sampled by the transistor MP2, and the capacitor Cs is refreshed by the transistor MP3. Therefore, the characteristics of the transistors MP2 and MP4 must be identical.
그런데, 이와 같은 종래 유기전계 발광표시장치의 화소 회로에 있어서는 소자 불균일로 인하여 발생되는 문턱전압을 보상하는데 어려움이 있고, 전원단자전압(VDD) 라인의 전압강하(IR-DROP)를 보상하는데 어려움이 있어 화질 저하가 초래되고, 대화면 패널 적용시 IC 개수를 줄일 수 없어 원가를 절감하는데 어려움이 있었다.However, in the pixel circuit of the conventional organic light emitting display device, it is difficult to compensate for the threshold voltage generated due to device unevenness, and it is difficult to compensate for the voltage drop (IR-DROP) of the power terminal voltage (VDD) line. As a result, deterioration of image quality is caused, and the number of ICs cannot be reduced when a large screen panel is applied, which makes it difficult to reduce costs.
따라서, 본 발명의 목적은 유기발광다이오드 패널에서 소자 불균일로 인하여 발생되는 문턱전압 차이를 자체적으로 보상하고, 전원단자전압 라인의 전압강하(IR-DROP)를 보상해 주는 회로를 제공함에 있다. Accordingly, an object of the present invention is to provide a circuit that compensates for a threshold voltage difference caused by device irregularity in an organic light emitting diode panel and compensates a voltage drop (IR-DROP) of a power terminal voltage line.
본 발명의 또 다른 목적은 두 개의 캐패시터를 이용하여 프로그래밍 구간에 멀티플렉서 구동이 가능하도록 하는 회로를 제공함에 있다.It is still another object of the present invention to provide a circuit that enables multiplexer driving in a programming period by using two capacitors.
상기와 같은 목적을 달성하기 위한 본 발명은, 게이트에 공급되는 전압에 상응되는 구동전류를 유기발광다이오드에 공급하기 위한 제1트랜지스터와; 상기 제1트랜지스터의 문턱전압 차이를 자체적으로 보상하기 위한 제2트랜지스터와; 발광신호에 응답하여 상기 제1트랜지스터를 통해 출력되는 화소 구동전류를 상기 유기발광다이오드에 전달하는 제3트랜지스터와; 상기 제1트랜지스터의 게이트측으로 각각의 데이터신호를 전달하기 위한 제4,6트랜지스터와; 상기 제1트랜지스터의 게이트측으로 기준전압을 전달하기 위한 제5트랜지스터와; 상기 제6트랜지스터를 통해 상기 제1트랜지스터의 게이트에 공급하기 위한 데이터신호를 저장하는 제1캐패시터와; 상기 제5트랜지스터를 통해 공급되는 상기 기준전압, 상기 제4트랜지스터를 통해 공급되는 데이터전압을 각기 저장하여 상기 제1트랜지스터의 게이트측으로 전달하는 제2캐패시터로 구성함을 특징으로 한다.The present invention for achieving the above object, the first transistor for supplying a driving current corresponding to the voltage supplied to the gate to the organic light emitting diode; A second transistor for self-compensating the difference in threshold voltage of the first transistor; A third transistor configured to transfer a pixel driving current output through the first transistor to the organic light emitting diode in response to a light emitting signal; Fourth and sixth transistors for transmitting respective data signals to the gate side of the first transistor; A fifth transistor for transmitting a reference voltage to the gate side of the first transistor; A first capacitor configured to store a data signal for supplying the gate of the first transistor through the sixth transistor; And a second capacitor which stores the reference voltage supplied through the fifth transistor and the data voltage supplied through the fourth transistor, respectively, and transmits the reference voltage to the gate side of the first transistor.
이하, 첨부한 도면을 참조하여 본 발명에 따른 바람직한 실시예를 상세히 설명한다.Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.
도 2는 본 발명에 의한 유기전계 발광표시장치의 화소 회로도로서 이에 도시한 바와 같이, 게이트에 공급되는 전압에 응답하여 해당 구동전류를 유기발광다이오드(OLED)에 공급하기 위한 구동용 트랜지스터(T1)와; 상기 구동용 트랜지스터(T1)의 문턱전압을 보상하기 위해 그의 게이트와 드레인에 드레인과 소스가 각기 접속되고, 게이트는 현재 선택라인 SEL(n)에 접속된 문턱전압보상용 트랜지스터(T2)와; 게이트에 공급되는 발광신호(EM)에 의해 구동되어 상기 구동용 트랜지스터(T1)를 통해 출력되는 화소 구동전류를 상기 유기발광다이오드(OLED)에 전달하는 트랜지스터(T3)와; 이후 선택라인신호 SEL(n+1)에 의해 각기 동작하여 상기 구동용 트랜지스터(T1)의 게이트측으로 각각의 데이터신호를 전달하기 위한 트랜지스터(T4),(T6)와; 현재 선택라인신호 SEL(n)에 의해 각기 동작하여 상기 구동용 트랜지스터(T1)의 게이트측으로 기준전압(Vref)을 전달하기 위한 트랜지스터(T5)와; 상기 트랜지스터(T6)를 통해 상기 구동용 트랜지스터(T1)의 게이트에 공급하기 위한 데이터신호를 저장하는 캐패시터(C1)와; 현재 선택라인신호 SEL(n)가 공급될 때 상기 트랜지스터(T5)를 통해 공급되는 기준전압(Vref), 이후 선택라인신호 SEL(n+1)이 공급될 때 상기 트랜지스터(T4)를 통해 공급되는 데이터전압(Vdata)을 각기 저장하기 위하여, 일측이 상기 구동용 트랜지스터(T1)의 게이트에 접속된 캐패시터(C2)로 구성한 것으로, 이와 같이 구성한 본 발명의 작용을 첨부한 도 3을 참조하여 상세히 설명하면 다음과 같다.FIG. 2 is a pixel circuit diagram of an organic light emitting display according to the present invention. As shown therein, a driving transistor T1 for supplying a corresponding driving current to an organic light emitting diode OLED in response to a voltage supplied to a gate. Wow; A threshold voltage compensating transistor T2 connected to a drain and a source of the gate and the drain thereof to compensate for the threshold voltage of the driving transistor T1, and the gate of which is connected to the current selection line SEL (n); A transistor (T3) which is driven by a light emission signal (EM) supplied to a gate and transfers a pixel driving current output through the driving transistor (T1) to the organic light emitting diode (OLED); And transistors T4 and T6 which operate by the selection line signal SEL (n + 1) to transfer respective data signals to the gate side of the driving transistor T1; A transistor T5 for operating the current selection line signal SEL (n) to transfer the reference voltage Vref to the gate side of the driving transistor T1; A capacitor (C1) for storing a data signal for supplying the gate of the driving transistor (T1) through the transistor (T6); The reference voltage Vref supplied through the transistor T5 when the current selection line signal SEL (n) is supplied, and then supplied through the transistor T4 when the selection line signal SEL (n + 1) is supplied. One side is composed of a capacitor C2 connected to the gate of the driving transistor T1 in order to store the data voltage Vdata, respectively. The operation of the present invention configured as described above will be described in detail with reference to FIG. 3. Is as follows.
먼저, 샘플링 구간에서는 현재 구동하고자 하는 선택라인(또는 스캔라인) SEL(n)에 '로우' 신호가 인가되어 트랜지스터(T2),(T5)가 턴온된다. 이에 따라 기준전압(Vref)이 상기 트랜지스터(T5)를 통해 A 노드에 전달된다. 이때 '하이'로 공 급되는 발광신호(EM)에 의해 트랜지스터(T3)가 오프되어 있으므로 A,B 노드의 전압은 다음의 [수학식2]으로 표현된다.First, in the sampling period, a 'low' signal is applied to the selection line (or scan line) SEL (n) to be driven, thereby turning on the transistors T2 and T5. Accordingly, the reference voltage Vref is transmitted to the A node through the transistor T5. At this time, since the transistor T3 is turned off by the light emission signal EM supplied as 'high', the voltages of the A and B nodes are expressed by Equation 2 below.
프로그램 구간에서는 현재 구동하고자 하는 선택라인 다음의 선택라인 SEL(n+1)에 '로우' 신호가 인가되어 트랜지스터(T4),(T6)가 턴온된다. 이에 따라, 데이터전압(Vdata)이 상기 트랜지스터(T4)를 통해 A 노드에 전달된다. 이때 '하이'로 공급되는 발광신호(EM)에 의해 트랜지스터(T3)가 오프되어 있고, 트랜지스터(T2) 또한 '하이'로 공급되는 현재 선택라인 SEL(n)의 신호에 의해 오프되어 있으므로, B 노드는 플로팅 상태로 된다. 이에 따라, 상기 A,B 노드의 전압은 다음의 [수학식3]으로 표현된다.In the program section, a 'low' signal is applied to the selection line SEL (n + 1) next to the selection line to be driven currently, so that the transistors T4 and T6 are turned on. Accordingly, the data voltage Vdata is transferred to the node A through the transistor T4. In this case, since the transistor T3 is turned off by the light emission signal EM supplied to the 'high', and the transistor T2 is also turned off by the signal of the current selection line SEL (n) supplied to the 'high', B The node is in a floating state. Accordingly, the voltages of the A and B nodes are expressed by Equation 3 below.
여기서, 'Vthp'는 트랜지스터(T1)의 문턱전압이다.Here, 'Vthp' is the threshold voltage of the transistor T1.
디스플레이 구간에서는 상기 트랜지스터(T1)의 게이트 전압 VB2 = Vdata - Vref1 + VDD + Vthp가 되므로, 유기발광다이오드(OLED)에 공급되는 전류식은 다음의 [수학식4]로 표현된다. In the display period, since the gate voltage VB2 = Vdata-Vref1 + VDD + Vthp of the transistor T1, a current equation supplied to the organic light emitting diode OLED is represented by Equation 4 below.
상기 디스플레이 구간의 전류식에서 알 수 있듯이 전원단자 전압 VDD와 문턱전압 Vthp 항이 상쇄되어 사라지므로, 트랜지스터의 문턱전압(Vthp) 및 VDD 라인의 전압강하(IR-DROP) 문제가 해결됨을 알 수 있다. As can be seen from the current equation of the display period, since the power terminal voltage VDD and the threshold voltage Vthp terms are canceled and disappeared, it can be seen that the threshold voltage (Vthp) of the transistor and the voltage drop (IR-DROP) of the VDD line are solved.
이와 같은 화소구조는 샘플링 구간에 각 화소(PXL) 구동 트랜지스터(T1)의 문턱전압이 캐패시터(C2)에 저장되고, 프로그램 구간에 각 화소의 데이터 전압값이 캐패시터(C1)에 저장되므로 프로그램 구간을 나누어 멀티플렉서(MUX) 구동하는 것이 가능하게 된다. 즉, 연속된 두 화소의 데이터전압을 캐패시터(C1),(C2)에 분리 저장하는 것이 가능하게 된다. In such a pixel structure, the threshold voltage of each pixel PXL driving transistor T1 is stored in the capacitor C2 in the sampling period, and the data voltage value of each pixel is stored in the capacitor C1 in the program period. The multiplexer (MUX) can be driven separately. That is, it is possible to separately store the data voltages of two consecutive pixels in the capacitors C1 and C2.
전압보상형 AMOLED 화소 구조의 장점인 문턱전압 보상에 VDD 라인의 전압강하(IR-DROP) 문제 해결과 멀티플렉서 구동에 의한 집적소자(IC)의 개수를 줄임으로써, 도 2와 같은 화소 구조는 대화면 OLED 화소 구조에 적합한 구조이다.By solving the voltage drop (IR-DROP) problem of the VDD line and reducing the number of integrated devices (ICs) by driving the multiplexer for threshold voltage compensation, which is an advantage of the voltage-compensated AMOLED pixel structure, the pixel structure shown in FIG. It is a structure suitable for a pixel structure.
결국, 구동 트랜지스터(T1)의 문턱전압(Vthp)을 샘플링하여 유기발광다이오드(OLED)에 필요한 전류를 공급하기 때문에 이에 의해 그 트랜지스터(T1)의 문턱전압 차이를 자체적으로 보상해 주는 구조이다. As a result, since the threshold voltage Vthp of the driving transistor T1 is sampled to supply a current required for the organic light emitting diode OLED, the structure compensates for the difference in the threshold voltage of the transistor T1 by itself.
또한, 기준전압(Vref)을 공급하여 VDD 라인의 전압강하(IR-DROP)를 보상해 주는 구조이다. In addition, the structure compensates the voltage drop IR-DROP of the VDD line by supplying a reference voltage Vref.
또한, 화소 구조에 두 개의 캐패시터(C1),(C2)를 두어 프로그래밍 구간에 멀티플렉서 구동이 가능한 구조이다.In addition, the two capacitors C1 and C2 are disposed in the pixel structure to enable the multiplexer driving in the programming period.
이상에서 상세히 설명한 바와 같이 본 발명은, 구동 트랜지스터의 문턱전압을 샘플링하여 유기발광다이오드에 필요한 전류를 공급함으로써 그 구동트랜지스터의 문턱전압 차이를 자체적으로 보상할 수 있는 효과가 있다. As described in detail above, the present invention has an effect of self-compensating the difference in the threshold voltage of the driving transistor by sampling the threshold voltage of the driving transistor and supplying a current required for the organic light emitting diode.
또한, 기준전압을 공급하여 VDD 라인의 전압강하를 보상할 수 있는 효과가 있다. In addition, there is an effect that can compensate for the voltage drop of the VDD line by supplying a reference voltage.
또한, 화소 구조에 두 개의 캐패시터를 두어 프로그래밍 구간에 멀티플렉서 구동이 가능한 구조이므로 그만큼 반도체 칩의 개수가 저감되어 원가를 절감할 수 있는 효과가 있다. In addition, since the two capacitors are arranged in the pixel structure, the multiplexer can be driven in the programming period, thereby reducing the number of semiconductor chips, thereby reducing the cost.
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