KR20070117636A - Light emitting devices for liquid crystal displays - Google Patents

Abstract

Light-emitting devices, and related components, processes, systems and methods are disclosed.

Description

Light emitting element for liquid crystal display {LIGHT EMITTING DEVICES FOR LIQUID CRYSTAL DISPLAYS}

This application claims the following U.S. Provisional Patent Application: 60 / 462,889, filed April 15, 2003, 60 / 474,199, filed May 29, 2003, filed June 4, 2003 60 / 475,682, filed September 17, 2003, filed 60 / 503,653, filed September 17, 2003, filed 60 / 503,654, filed September 17, 2003, 60 / 503,671 filed September 17, 2003, 60 / 503,672 filed September 17, 2003, 60 / 513,807 filed October 23, 2003, October 27, 2003 60 / 514,764, filed March 16, 2004, 60 / 553,894, filed August 20, 2004, 60 / 603,087, filed August 31, 2004 60 / 605,733, filed January 21, 2005, filed 60 / 645,720, filed January 21, 2005, filed 60 / 645,721, filed March 8, 2005, filed 60 / 659,861, 2005 3 60 / 660,921, filed March 11, 60 / 659,810 filed March 8, 2005, and 60 / 659,811 filed March 8, 2005. It comprises a. This application is also filed in the following U.S. patent application, ie, November 26, 2003, filed 10 / 723,987, entitled "Light Emitting Device," November 26, 2003, and entitled "Luminous Device 10 / 724,004, filed November 26, 2003 and entitled "Light Emitting Device", filed 10 / 724,033, filed November 26, 2003, entitled "Light Emitting Device" 10 / 724,006, filed November 26, 2003 and entitled "Light Emitting Device" No. 10 / 724,029, filed November 26, 2003, and entitled "Light Emitting Device" 10 / 724,005 filed on November 26, 2003, entitled "Light Emitting Device", 10 / 735,498 filed on December 12, 2003, titled "Light Emitting System" No. 10 / 794,244, filed March 5, 2004, entitled "Light Emitting Device Method," 10 / 794,452, filed March 5, 2004, titled "Light Emitting Device Method." No. 2 10 / 872,335, filed June 18, 004 and entitled "Optical Display Systems and Methods," 10/872, filed June 18, 2004, and titled "Electronic Device Contact Structures." 871,877, and June 10, 2004, and incorporated herein by reference, < RTI ID = 0.0 > 10 / 872,336, < / RTI >

The present invention relates to a light emitting device and related components, processes, systems and methods.

Light emitting diodes (LEDs) can often provide light in a more efficient manner than incandescent and / or fluorescent light sources. The relatively high power efficiency associated with LEDs has generated interest in using LEDs to replace conventional light sources in various lighting applications. For example, in some examples LEDs are used as traffic lights and to illuminate cell phone keypads and displays.

Typically, LEDs are formed of multiple layers, at least some of which are formed of different materials. In general, the material and thickness selected for these layers determine the wavelength (s) of light emitted by the LED. In addition, the chemical composition of these layers can be chosen to try to separate the injected charge carriers into zones (generally called quantum wells) for a relatively efficient conversion to optical output. In general, the layer on one side of the junction where the quantum well is grown is doped with donor atoms to induce high electron density (these layers are commonly referred to as n-type layers) and on opposite sides The layer is doped with acceptor atoms that cause a relatively high hole density (such layers are commonly referred to as p-type layers).

The general method of manufacturing the LED is as follows. A layer of material is prepared in the form of a wafer. Typically, the layers are formed using epitaxial deposition techniques such as metal organic chemical vapor deposition (MOCVD) in which the initially stacked layers are formed on a growth substrate. The layer is then exposed to various etching and metallization techniques to form contacts for current injection, after which the wafer is cut into individual LED chips. Usually, LED chips are packaged.

In use, electrical energy is generally injected into the LEDs and then converted into electromagnetic radiation (light), some of which are extracted from the LEDs.

The present invention relates to light emitting devices and related components, systems and methods.

In some embodiments, the system includes a panel having an edge having a predetermined thickness. The system also has a light emitting element disposed such that light emitted from the light emitting element impinges on an edge of the panel, which has a predetermined surface. The ratio of the width of the surface of the light emitting element to the thickness of the edge of the panel is about 0.5 to about 1.1.

Embodiments may include one or more of the following.

The panel may be a liquid crystal display (LCD). The length of the surface of the light emitting device can be at least about 1 mm. The length of the surface of the light emitting device can be at least about 2 mm. The length of the surface of the light emitting device can be at least about 3 mm. The length of the surface of the light emitting device can be at least about 5 mm. The length of the surface of the light emitting device can be at least about 10 mm.

The ratio of the width of the surface of the light emitting element to the thickness of the edge of the panel may be about 0.75 to about 1.05. The ratio of the width of the surface of the light emitting element to the thickness of the edge of the panel may be about 0.9 to about 1.

The system may also include at least one optical component disposed between the light emitting element and the panel. At least one optical component may be an optical homogenizer. The light emitting device may be a non-lambertian light emitting device. The light emitting device may be a photon lattice light emitting device.

The light emitting device may comprise a multi-layer stack of material comprising a photo-generating zone and a first layer supported by the photo-generating zone, the surface of the first layer being subtracted by the light generated by the photo-generating zone. It is configured to emerge from the light emitting element through the surface of the first layer. The surface of the first layer can have a dielectric function that varies spatially with the pattern, and the pattern has a detuning parameter with an ideal lattice constant and a value greater than zero. The surface of the first layer may have a dielectric function that varies spatially according to a nonperiodic pattern. The surface of the first layer may have a dielectric function that varies spatially according to a complex periodic pattern. The surface of the first layer can have a dielectric function that varies spatially with the periodic pattern. The light emitting device may include a light emitting diode. The light emitting device may be a single light emitting device.

The light emitting device may include a plurality of light emitting devices. The plurality of light emitting elements can be arranged in a serrated arrangement along the edge of the panel. The plurality of light emitting devices may be arranged in a plurality of columns. The plurality of columns may include at least a first column and a second column. The first column may comprise a plurality of light emitting elements configured to emit light of a first color, and the second column may comprise a plurality of light emitting elements configured to emit light of a second color, wherein the first color And the light of the second color is different. The system may also include a third column comprising a plurality of light emitting elements configured to emit light of a third color, wherein the lights of the first, second and third colors are different. The first, second and third colors may be selected from the group consisting of red, green and blue. The edge can be a first edge and the panel can also include a second edge having a predetermined thickness. The system may also include a light emitting device disposed such that light emitted from the light emitting device impinges on the second edge of the panel.

The system may also include a cooling system configured to adjust the temperature of the light emitting diode during use. The light emitting element can be mounted on a heat sink device.

In some embodiments, the system can include a panel having an edge and an array of light emitting devices disposed such that light emitted from the light emitting devices impinges on the panel. The array of light emitting devices has a first column of light emitting devices having a first edge and a second edge approximately perpendicular to the first edge, and a second column of light emitting devices having a first edge, a second edge, and a third edge. Wherein the first and second edges of the second column are approximately parallel to the first edge of the first column, the second edge of the second column is approximately parallel to the second edge of the first column, and The second edge may be offset by at least about 0.05 mm from the second edge of the first column in a direction substantially perpendicular to the second edge of the first column.

Embodiments may include one or more of the following.

The system can include a third column of light emitting devices having a first edge and a second edge, the first edge of the third column being approximately parallel to the third edge of the second column, and the second edge of the third column Is approximately parallel to the second edge of the second column, and the second edge of the third column may be offset by at least about 0.05 mm from the second edge of the second column in a direction approximately perpendicular to the second edge of the first column. have. The panel may comprise a liquid crystal display (LCD). The first column may include a plurality of light emitting elements configured to emit light of a first color, and the second column may include a plurality of light emitting elements configured to emit light of a second color. The light of the first and second colors may be different. The third column may comprise a plurality of light emitting elements configured to emit light of a third color, and the light of the first, second and third colors may be different. The first, second and third colors may be selected from the group consisting of red, green and blue.

The first column may have a first width, the second column may have a second width, and the third column may have a third width. The ratio of the sum of the first, second and third widths to the thickness of the edge of the panel can be from about 0.5 to about 1.1. At least one of the luminous means in the array of luminous means may comprise a first layer supported by the light generating zone, the surface of the first layer emitting light generated by the light generating zone through the surface of the first layer It can be configured to come out of the device. The surface of the first layer may have a dielectric function that varies spatially with the pattern, and the pattern may have a detuning variable with an ideal lattice constant and a value greater than zero. The surface of the first layer may have a dielectric function that varies spatially with the aperiodic pattern. The surface of the first layer may have a dielectric function that varies spatially according to a complex periodic pattern. The surface of the first layer can have a dielectric function that varies spatially with the periodic pattern.

The second column may be offset by at least about 0.1 mm from the first and third columns. The second column may be offset by at least about 0.2 mm from the first and third columns. The second column may be offset by at least about 0.3 mm from the first and third columns. The second column may be offset by at least about 0.5 mm from the first and third columns. The second column may be offset by at least about 1 mm from the first and third columns.

The system may also include at least one optical component disposed between the light emitting element and the panel. At least one optical component may be an optical homogenizer. The light emitting device may be a non-lamberian light emitting device. The light emitting device may be a photon lattice light emitting device. The light emitting device may be a light emitting diode. The array of light emitting diodes can include at least one light emitting diode selected from the group consisting of red light emitting diodes, blue light emitting diodes, and green light emitting diodes. The array of light emitting diodes can include red light emitting diodes, blue light emitting diodes, and green light emitting diodes. The array of light emitting elements can be arranged in a serrated arrangement along the edge of the panel. The system may also include a cooling system configured to regulate the temperature of the array of light emitting diodes during use.

In an additional embodiment, the system includes a panel having an edge, a light emitting element having a surface defined by its periphery, and an optical component disposed in an optical path from the light emitting element to the edge of the panel, This optical component comprises an aperture having an area defined by its periphery, and the ratio of the area of the surface of the light emitting element to the area of the opening is about 0.5 to about 1.1.

Embodiments may include one or more of the following.

The panel may comprise a liquid crystal display (LCD). The perimeter of the opening can be rectangular and the light emitting device can be rectangular. The perimeter of the opening can be circular and the light emitting device can be circular. The perimeter of the opening can be trapezoidal and the light emitting device can be trapezoidal. The perimeter of the aperture can be triangular and the light emitting device can be triangular. The perimeter of the aperture can be square, and the light emitting device can be square. The perimeter of the opening can be polygonal and the light emitting device can be circular. The perimeter of the aperture can be polygonal and the light emitting device can be polygonal. The perimeter of the opening can be hexagonal and the light emitting device can be hexagonal. The opening may be octagonal and the light emitting element may be octagonal.

The light emitting device may be a non-lamberian light emitting device. The light emitting device may be a photon lattice light emitting device. The light emitting device can comprise a multi-layer stack of material comprising a photo-generating zone and a first layer supported by the photo-generating zone, the surface of the first layer having the light generated by the photo-generating zone being the first layer. It is configured to come out from the light emitting device through. The surface of the first layer can have a dielectric function that varies spatially with the pattern, which pattern has a detuning variable with an ideal lattice constant and a value greater than zero. The surface of the first layer may have a dielectric function that varies spatially with the aperiodic pattern. The surface of the first layer may have a dielectric function that varies spatially according to a complex periodic pattern. The surface of the first layer can have a dielectric function that varies spatially with the periodic pattern. The light emitting device may be a light emitting diode.

The optical component can be configured to homogenize the light emitted from the LED. The optical component can be configured to disperse light from the LED along the edge of the panel. The system may also include a cooling system configured to adjust the temperature of the light emitting element during use. The light emitting element can be mounted on a heat sink device.

In a particular embodiment, a system includes a panel having an edge, an array of light emitting elements having a combined surface area defined by an outer periphery of the array of light emitting elements, and an optical periphery disposed in an optical path from the light emitting element to the edge of the panel. And an optical component comprising an opening having an area defined by A; wherein the ratio of the combined surface area of the light emitting element to the area of the opening is about 0.5 to about 1.1.

Embodiments may include one or more of the following.

The panel may be a liquid crystal display (LCD). The perimeter of the aperture can be rectangular and the perimeter of the array of light emitting devices can be rectangular. The perimeter of the opening can be hexagonal and the perimeter of the array of light emitting devices can be hexagonal. The array of light emitting devices can include six light emitting devices and each light emitting device in the array of light emitting devices can have a perimeter defining a triangular shape. The perimeter of the aperture can be octagonal and the perimeter of the array of light emitting devices can be octagonal. The array of light emitting devices can include eight light emitting devices and each light emitting device in the array of light emitting devices can have a perimeter defining a triangular shape. The perimeter of the aperture can be circular, and the perimeter of the array of light emitting devices can be circular. The array of light emitting devices can include four light emitting devices and each light emitting device in the array of light emitting devices can have a perimeter defining a shape of approximately one quarter of a circle. The array of light emitting devices can include two light emitting devices and each light emitting device in the array of light emitting devices can have a perimeter defining a shape of about one half of a circle. The array of light emitting devices can include six light emitting devices and each light emitting device in the array of light emitting devices can have a perimeter defining a shape of about one sixth of a circle. The array of light emitting devices can include eight light emitting devices and each light emitting device in the array of light emitting devices can have a perimeter defining a shape of about one eighth of a circle. The perimeter of the aperture can be trapezoidal and the perimeter of the array of light emitting devices can be trapezoidal. The perimeter of the aperture can be triangular and the perimeter of the array of light emitting devices can be triangular. The perimeter of the aperture can be square and the perimeter of the array of light emitting devices can be square.

At least one light emitting device may be a non-lamberian light emitting device. At least one light emitting device may be a photon lattice light emitting device. At least one of the luminous means in the array of luminous means may comprise a first layer supported by the light generating zone, the surface of the first layer emitting light generated by the light generating zone through the surface of the first layer It can be configured to come out of the device. The surface of the first layer can have a dielectric function that varies spatially with the pattern, and the pattern has a detuning variable with an ideal lattice constant and a value greater than zero. The surface of the first layer may have a dielectric function that varies spatially with the aperiodic pattern. The surface of the first layer may have a dielectric function that varies spatially according to a complex periodic pattern. The surface of the first layer can have a dielectric function that varies spatially with the periodic pattern.

At least one light emitting device may be a light emitting diode. The array of light emitting diodes can include at least one light emitting diode selected from the group consisting of red light emitting diodes, blue light emitting diodes, and green light emitting diodes. The array of light emitting diodes can include at least one red light emitting diode, at least one blue light emitting diode, and at least one green light emitting diode. The optical component can be configured to homogenize the light emitted from the LED. The optical component can be configured to disperse light from the LED along the edge of the panel. The system may also include a cooling system configured to adjust the temperature of the light emitting diode during use. The array of light emitting elements can be mounted on a heat sink device.

The construction and advantages of the invention are in the detailed description, drawings and claims.

1 is a schematic diagram of a light emitting system.

2A-2D are schematic views of an optical display system.

3 is a schematic diagram of an optical display system.

4A is a schematic plan view of the LED.

4B is a schematic diagram of an optical display system.

5 is a schematic diagram of an optical display system.

6 is a schematic diagram of an optical display system.

7 is a schematic diagram of an optical display system.

8A and 8B are schematic views of an optical display system.

9 is a schematic diagram of an optical display system.

10 is a schematic diagram of an optical display system.

11 is a schematic diagram of an optical display system.

12A is a schematic diagram of an optical display system.

12B is a schematic diagram of an optical display system.

13 is a schematic diagram of an optical display system.

14A is a schematic diagram of an optical display system.

14B is a top view of an array of LEDs.

15 is a schematic diagram of an optical display system.

16 is a top view of an array of LEDs.

17 is a top view of an array of LEDs.

18 is a top view of an array of LEDs.

19 is a top view of an array of LEDs.

20 is a top view of an array of LEDs.

21 is a schematic diagram of an optical display system.

22A is a schematic diagram of an optical component and an array of LEDs.

FIG. 2BB is a cross-sectional view of the array of LEDs of FIG. 22A.

22C is a cross-sectional view of the optical component of FIG. 22A.

23A is a schematic diagram of an optical component and an array of LEDs.

Figure 23B is a cross sectional view of the array of LEDs of Figure 23A.

FIG. 23C is a cross-sectional view of the optical component of FIG. 23A.

24A is a schematic diagram of an optical component and an array of LEDs.

24B is a cross-sectional view of the array of LEDs of FIG. 24A.

24C is a cross-sectional view of the optical component of FIG. 24A.

25A is a schematic diagram of an optical component and an array of LEDs.

FIG. 25B is a cross-sectional view of the array of LEDs of FIG. 25A.

25C is a cross-sectional view of the optical component of FIG. 25A.

26A is a schematic diagram of an optical component and an array of LEDs.

FIG. 26B is a cross-sectional view of the array of LEDs of FIG. 26A.

FIG. 26C is a cross sectional view of the optical component of FIG.

27A is a schematic diagram of an optical component and an array of LEDs.

Figure 27B is a cross sectional view of the array of LEDs of Figure 27A.

FIG. 27C is a cross-sectional view of the optical component of FIG. 27A.

28A is a schematic diagram of an optical component and an array of LEDs.

FIG. 28B is a cross sectional view of the array of LEDs of FIG.

FIG. 28C is a cross-sectional view of the optical component of FIG. 28A.

29A is a schematic diagram of an optical component and an array of LEDs.

FIG. 29B is a cross sectional view of the array of LEDs of FIG. 29A; FIG.

FIG. 29C is a cross-sectional view of the optical component of FIG. 29A.

30 is a schematic diagram of an optical display system.

31 is a schematic diagram of an optical display system.

32 is a cross-sectional view of an LED having a patterned surface.

33 is a top view of a patterned surface of the LED of FIG. 12.

34 is a graph of extraction efficiency of LEDs with patterned surfaces as a function of detuning variables.

35 is a schematic of the Fourier transform of the patterned surface of the LED.

FIG. 36 is a graph of extraction efficiency of LEDs with patterned surfaces as a function of nearest neighbor distance.

FIG. 37 is a graph of extraction efficiency of an LED with a patterned surface as a function of filling factor.

38 is a top view of a patterned surface of the LED.

39 is a graph of extraction efficiency of LEDs having different surface patterns.

40 is a graph of extraction efficiency of LEDs having different surface patterns.

41 is a graph of extraction efficiency of LEDs having different surface patterns.

42 is a graph of extraction efficiency of LEDs having different surface patterns.

43 is a schematic of the Fourier transform of two LEDs with different patterned surfaces compared to the emission emission spectrum of the LEDs.

44 is a graph of extraction efficiency of LEDs having different surface patterns as a function of angle.

45 is a side view of an LED having a patterned surface and phosphor layer on the patterned surface.

Figure 46 is a cross sectional view of a multi-layer stack.

47 is a cross sectional view of a multi-layer stack.

48 is a cross sectional view of a multi-layer stack.

49 is a cross-sectional view of a multi-layer stack.

50 shows a side view of a substrate removal process.

51 is a partial cross-sectional view of a multi-layer stack.

52 is a partial cross-sectional view of a multi-layer stack.

53 is a partial cross-sectional view of a multi-layer stack.

54 is a partial cross-sectional view of a multi-layer stack.

55 is a partial cross-sectional view of a multi-layer stack.

56 is a partial cross-sectional view of a multi-layer stack.

57 is a partial cross-sectional view of a multi-layer stack.

58 is a partial cross-sectional view of a multi-layer stack.

59 is a partial cross-sectional view of a multi-layer stack.

60 is a partial cross-sectional view of a multi-layer stack.

61 is a partial cross-sectional view of a multi-layer stack.

62 is a partial cross-sectional view of a multi-layer stack.

63 is a partial cross-sectional view of a multi-layer stack.

64 is a partial cross-sectional view of a multi-layer stack.

65 is a partial cross-sectional view of a multi-layer stack.

66 is a partial cross-sectional view of a multi-layer stack.

67 is a partial cross-sectional view of a multi-layer stack.

68 is a partial cross-sectional view of a multi-layer stack.

69 is a partial cross-sectional view of a multi-layer stack.

70 is a partial cross-sectional view of a multi-layer stack.

71 is a partial cross-sectional view of a multi-layer stack.

72 is a partial cross-sectional view of a multi-layer stack.

73 is a partial cross-sectional view of a multi-layer stack.

74 is a partial cross-sectional view of a multi-layer stack.

75 is a partial cross-sectional view of a multi-layer stack.

76 is a partial cross-sectional view of a multi-layer stack.

77 is a partial cross-sectional view of a multi-layer stack.

78 is a partial cross-sectional view of a multi-layer stack.

79 is a partial cross-sectional view of a multi-layer stack.

80 is a partial cross-sectional view of a multi-layer stack.

81 is a partial cross-sectional view of a multi-layer stack.

82 is a partial cross-sectional view of a multi-layer stack.

83 is a partial cross-sectional view of a multi-layer stack.

84 is a partial cross-sectional view of a multi-layer stack.

85 is a partial cross-sectional view of a multi-layer stack.

86 is a partial cross-sectional view of a multi-layer stack.

87 is a partial cross-sectional view of a multi-layer stack.

88 is a partial cross-sectional view of a multi-layer stack.

89 is a partial cross-sectional view of a multi-layer stack.

90 is a partial cross-sectional view of a multi-layer stack.

91 is a partial cross-sectional view of a multi-layer stack.

92 is a partial cross-sectional view of a multi-layer stack.

93 is a partial cross-sectional view of a multi-layer stack.

94 is a partial cross-sectional view of a multi-layer stack.

95 is a perspective view of a wafer.

96 is a perspective view of a wafer.

97A is a perspective view of an LED.

97B is a plan view of the LED.

98A is a plan view of the LED.

98B is a partial cross-sectional view of the LED.

98C is an equivalent circuit diagram.

99A is a plan view of the LED.

99B is an equivalent circuit diagram.

100A is a plan view of the LED.

100B is an equivalent circuit diagram.

101A is a plan view of the LED.

101B is a partial cross-sectional view of the LED.

101C is a partial cross-sectional view of an LED.

102 is a graph of junction current density.

103A is a top view of a multi-layer stack.

103B is a partial cross-sectional view of the LED.

104 is a view of a contact.

105 is a diagram of a packaged LED.

106 is a diagram of a packaged LED and a heat sink.

107 is a graph of resistance.

108 is a graph of junction temperature.

109 is a diagram of a packaged LED.

110A is a partial cross-sectional view of an LED.

110B is a top view of a patterned surface of the LED.

110C is a top view of a patterned surface of the LED.

110D is a top view of the patterned surface of the LED.

111 is a partial sectional view of an LED.

112 is a partial cross-sectional view of an LED.

113 is a partial cross-sectional view of an LED.

114 is a partial cross-sectional view of a multi-layer stack.

115 is a partial cross-sectional view of a multi-layer stack.

116 is a partial cross-sectional view of a multi-layer stack.

117 is a partial cross-sectional view of a multi-layer stack.

118 is a partial cross-sectional view of a multi-layer stack.

119 is a partial cross-sectional view of a multi-layer stack.

120 is a partial cross-sectional view of a multi-layer stack.

121 is a partial cross-sectional view of a multi-layer stack.

122 is a partial cross-sectional view of a multi-layer stack.

123 is a partial cross-sectional view of an LED.

124 is a partial cross-sectional view of an LED.

125 is a partial cross-sectional view of an LED.

126 is a partial cross-sectional view of a multi-layer stack.

127 is a partial cross-sectional view of a multi-layer stack.

128 is a partial cross-sectional view of a multi-layer stack.

129 is a partial cross-sectional view of a multi-layer stack.

130 is a partial cross-sectional view of a multi-layer stack.

131 is a partial cross-sectional view of a multi-layer stack.

132 is a partial cross-sectional view of a multi-layer stack.

133 is a partial cross-sectional view of a multi-layer stack.

134 is a partial cross-sectional view of an LED.

135 is a partial cross-sectional view of an LED.

136A and 136B are schematic views of reflective surfaces.

137 is a graph of light emission versus wavelength.

138A is a schematic representation of a reflective surface.

138B is a schematic representation of the reflective surface.

139A is a schematic diagram of a boundary condition.

139B is a graph of cutoff frequency.

140 is a graph of luminescence versus wavelength.

141 is a graph of luminescence versus wavelength.

Like reference symbols in the various drawings indicate like elements.

1 is a schematic diagram of a light emitting system 50 having an array 60 of LEDs 100 therein. Array 60 is configured to allow light from LED 100 (see description below) to exit system 50 via surface 55 during use.

Examples of light emitting systems include projectors (eg rear projection projectors, front projection projectors), portable electronic devices (eg mobile phones, personal digital assistants, laptop computers), computer monitors, large area road signs (eg, Highway signs), vehicle interior lights (e.g. dashboard lights), vehicle exterior lights (e.g. vehicle headlights including color changeable headlights), general lighting (e.g. office ceiling lights), high brightness lighting (E.g. street lights), camera flash, medical devices (e.g. endoscopes), telecommunications (e.g. plastic fibers for short range data transmission), security sensing (e.g. biometrics), integrated Optoelectronics (e.g. intrachip and interchip optical interconnects and optical time measurement), military telecommunications (e.g. point-to-point communication), biosensing (e.g. organic or non- Light detection of substrate), photodynamic therapy (e.g. skin treatment), night goggles, solar traffic lights, emergency lights, airport runway lights, aircraft lights, surgical goggles, wearable light sources (e.g. life jackets) ). An example of a rear projection projector is a rear projection television. An example of a front projection projector is a projector for displaying on a surface such as a screen or a wall. In some embodiments, the laptop computer may include a front projection projector.

Typically, surface 55 is at least about 20% (eg, at least about 30%, at least about 40%, at least about 50%, at least about 60) of light exiting LED 100 and impinging on surface 55. %, At least about 70%, at least about 80%, at least about 90%, at least about 95%). Examples of materials from which surface 55 may be formed include glass, silica, quartz, plastics, and polymers.

In some embodiments, it may be desirable for the light coming from each LED 100 (eg, total light intensity, light intensity as a function of wavelength and / or peak emission wavelength) to be substantially the same. One example is the time sequencing of substantially monochromatic light sources (eg, LEDs) in display applications (eg, to achieve a clear full color display). Another example is in telecommunications where it may be advantageous for the optical system to have a particular wavelength of light traveling from the light source to the light guide and from the light guide to the detector. A further example is a vehicle light which signals in color. Additional examples are in medical applications (eg, photosensitive drug activation or biosensing applications where wavelength or color responses may be advantageous).

In some embodiments, light from at least a portion of LED 100 (eg, total light intensity, light intensity as a function of wavelength, and / or peak emission wavelength) is light from different LEDs 100 (eg, , Total light intensity, light intensity as a function of wavelength and / or peak emission wavelength). An example is in general illumination (eg, multiple wavelengths can improve color rendering index (CRI)). CRI is a measure of the amount of color shift that an object experiences when illuminated by a luminescent system that is compared to the color of these same objects when viewed under a comparable correlated temperature reference illumination system (eg, daylight). Measurement. Another example is a camera flash (eg, a substantially high CRI substantially close to the CRI of noon daylight is preferred for realistic rendering of the object or object being photographed). A further example is a medical device (eg, because substantially matching CRI is advantageous for the identification and / or differences in cells, organs, secretions, etc.). Another example is in a backlit display (eg, some CRI white light is often more pleasant or natural to the human eye).

Although shown in FIG. 1 as being in the form of an array, the LEDs 100 can be configured differently. By way of example, in some embodiments, system 50 includes a single LED 100. As another example, in certain embodiments the array is curved to help direct light from various light sources to the same point angularly (eg, optical instruments such as lenses). As a further example, in some embodiments the array of devices is distributed in a hexagon to allow for tight packing and high efficiency surface brightness. As a further example, in certain embodiments the device is distributed around a mirror (eg, a dichroic mirror) that combines or reflects light from the LEDs in the array.

In FIG. 1, light emitted from LED 100 is shown to travel directly from LED 100 to surface 55. However, in some embodiments light from LED 100 may travel in an indirect path from LED 100 to surface 55. By way of example, in some embodiments system 50 includes a single LED 100. As another example, in some systems light from LED 100 is focused onto a microdisplay (eg, onto a light valve such as a digital light processor (DLP) or a liquid crystal display (LCD)). As a further example, in some embodiments, light is directed through various optical instruments, mirrors, or polarizers (eg, for LCDs). As an additional example, in some embodiments light is projected through primary or secondary optics, such as a lens or a set of lenses.

FIG. 2A shows an optical display system 1100 (see description above) that includes a non-lambertian LED 1110 (see description below), a lens 1120, and a microdisplay 1130. The LED 1110 is spaced apart from the lens 1120 by a distance L1, and the microdisplay 1130 is spaced apart from the lens 1120 by a distance L2. The distance L1 and the distance L2 correspond to the light emitted by the LED 1110 colliding on the lens 1120 so that the light emitted by the LED 1110 of the image plane of the lens 1120 collides. Selected to coincide with the surface of the microdisplay 1130.

In this configuration, the system 1100 emits light approximately equal to the shape of the surface of the microdisplay 1130 illuminated by the light emitted by the LED 1110 by the light emitted by the LED 1110. The shape of the surface of 1110 can be used to illuminate the surface of the microdisplay 1130 relatively efficiently. For example, in some embodiments, the ratio of the aspect ratio of the LED 1110 to the aspect ratio of the microdisplay 1130 may be about 0.5 to about 2 (eg, about 9/16 to about 16/9, About 3/4 to about 4/3, about 1). The aspect ratio of the microdisplay 1130 may be, for example, 1920 × 1080, 640 × 480, 800 × 600, 1024 × 700, 1024 × 768, 1024 × 720, 1280 × 720, 1280 × 768, 1280 × 960, or It can be 1280 × 1064.

In general, the surface of microdisplay 1130 and / or the surface of LED 1110 may have any desired shape. Examples of such shapes include squares, circles, rectangles, triangles, trapezoids and hexagons.

In some embodiments, the optical display system still has the shape of the surface of the LED 1110 emitting light that is approximately the same as the shape of the surface of the microdisplay 1130 illuminated by the light emitted by the LED 1110. Without the lens between the LED 1110 and the microdisplay 1130 it is possible to effectively illuminate the surface of the microdisplay 1130. For example, FIG. 2B illustrates a system 1102 in which a square LED 1110 is projected onto a square microdisplay 1130 without a lens between the LED 1110 and the microdisplay 1130. As another example, FIG. 2C illustrates that rectangular LED 1110 may be projected onto rectangular microdisplay 1130 (having a similarly proportional aspect ratio) without a lens between LED 1110 and microdisplay 1130. An optical display system 1104 that can be shown.

In certain embodiments, an anamorphic lens may be disposed between the LED 1110 and the microdisplay 1130. This may be desirable, for example, when the aspect ratio of the LED 1110 is substantially different from the aspect ratio of the microdisplay 1130. As an example, FIG. 2D illustrates an LED 1110 having a substantially square surface, a microdisplay 1130 having a substantially rectangular surface (eg, about 16: 9 or about 4: 3) and an LED 1110 and a micro A system 1106 is shown that includes an anamorphic lens 1120 disposed between the displays 1130. In this example, anamorphic lens 1120 may be used to convert the shape of light emitted by LED 1110 to substantially match the shape of the surface of microdisplay 1130. This may improve the efficiency of the system by increasing the amount of light emitted by the surface of the LED 1110 and impinging on the surface of the microdisplay 1130.

3 shows an optical display system 1200 that includes an LED 1110, a lens 1120, and a microdisplay 1130. The light emitting surface of the LED 1110 has a contact area to which the electrical lead 1115 is attached (see description below). The LED 1110 is spaced apart from the lens 1120 by a distance L3, and the microdisplay 1130 is spaced apart from the lens 1120 by a distance L4. The lid 1115 blocks light from being emitted from the contact region of the LED 1110. If the plane of the surface of the microdisplay 1130 where the light emitted by the LED 1110 collides coincides with the image plane of the lens 1120, a set of corresponding areas of the contact area of the light emitting surface of the LED 1110 Dark spots 1202 may appear on this surface of the microdisplay 1130. In order to reduce the area of this surface of the microdisplay 1130 covered with dark spots, the distances L3 and L4 are dependent on the light emitted by the LED 1110 impinging on the lens 1120. With respect to this, the image plane of the lens 1120 is selected so that it does not coincide with the plane of the surface of the microdisplay 1130 where the light emitted by the LED 1110 collides (ie, the light emitted by the LED 1110 is A distance ΔL exists between the plane of the surface of the colliding microdisplay 1130 and the image plane of the lens 1120). With this configuration, the light from the LED 1110 is defocused in the plane of the surface of the microdisplay 1130 where the light emitted by the LED 1110 collides, and the resulting intensity of the light is determined by the lens 1120. It is more uniform on this surface of the microdisplay 1130 than in the image plane. The total distance between the LED and the microdisplay 1130 may be expressed as the distance L5 plus the distance ΔL between the LED 1110 and the image plane 1150. In general, because ΔL increases as the distance between the LED 1110 and the microdisplay 1130 increases, the intensity of the dark spot is reduced, but by the LED 1110 impinging on the surface of the microdisplay 1130. The intensity of the emitted light is reduced. Alternatively, when the microdisplay is moved such that the distance between the LED 1110 and the microdisplay 1130 decreases, the intensity is greater than the intensity in the image plane, but the microdisplay may only be partially illuminated. In some embodiments, the absolute value of ΔL / L5 is about 0.00001 to about 1 (eg, about 0.00001 to about 0.1, about 0.00001 to about 0.01, about 0.00001 to about 0.001, or about 0.00001 to about 0.0001). In some embodiments, multiple LEDs may be used to illuminate a single microdisplay (eg, a 3 × 3 matrix of LEDs). Such a system may be desirable when multiple LEDs are arranged to illuminate a single microdisplay, since the system may still be available if one LED fails (but dark spots may be present in the absence of light from a particular LED). May occur). If multiple LEDs are used to illuminate a single microdisplay, the optical system can be configured so that dark spots are not visible on the surface of the microdisplay. For example, the microdisplay can be moved out of the image plane such that the area between the LEDs does not cause dark spots.

In some embodiments, the intensity of the dark spot on the surface of the microdisplay 1130 may be reduced by appropriately configuring the contact area of the surface of the LED 1110. For example, FIG. 4A is a top view of an LED 1110 with contact areas disposed around the perimeter of the LED 1110. With this configuration, with or without the presence of the lens (with or without defocusing), the optical display system can be configured such that the intensity of the dark spot generated by the contact area of the surface of the LED 1110 on the surface 1130 is relatively small. (E.g., by appropriately making an area of the surface of the microdisplay 1130). This method may also be used for systems that include multiple LEDs (eg, 3 × 3 matrix LEDs).

As another example, FIG. 4B shows an optical display system 300 that includes an LED 1110 and a microdisplay 1130. LED 1110 includes a contact region formed by lid 1115 selected to appear in an area where dark spot 1202 is not projected onto the surface of microdisplay 1130. In this example, the surface of the microdisplay 1130 may be located in the image plane of the lens 1120 such that the dark spot is outside of the area projected on the microdisplay in the image plane of the lens 1120. If the shape of the LED 1110 coincides with the shape of the microdisplay 1130, the lid 1115 may be disposed on the surface of the LED 1110 around its periphery, for example. In this example, the region inside the contact region of surface 1110 coincides with the surface of microdisplay 1130 (eg, the aspect ratio is similar). This method can be used in a system that includes multiple LEDs (eg, 3 × 3 matrix LEDs).

As a further example, FIG. 5 shows an optical display system 1700 that includes an LED 1110 and a microdisplay 1130. The LED 1110 also includes a contact region formed by a homogenizer 1702 (also called a light tunnel or light pipe) and a lead 1115 that directs the light emitted from the LED 1110 to the lens 1120. . The overall internal reflection of the light emitted by the LED 1110 beyond the interior surface of the homogenizer 1702 can produce a substantially uniform output distribution of the light and the microdisplay 1130 is substantially uniform by the LED 1110. It is possible to reduce the appearance of dark spots caused by the lid 1115 to be illuminated (eg, the image created in the image plane 1131 is substantially uniform).

Optionally, system 1700 may include one or more additional optical components. For example, in some embodiments, optical display system 1700 may also include a lens disposed in the path ahead of the homogenizer to focus light into the homogenizer. In some embodiments, the aspect ratio of the opening of the homogenizer 1702 is such that no additional lens is required when the LED 1110 is mounted in close proximity to the homogenizer 1702 or of light to the homogenizer 1702. It is consistent with that of LED 1110 so that more efficient coupling is possible with the lens prior to homogenizer 1702.

As an additional example, FIG. 6 shows an optical display system 1710 that includes an LED 1110 and a microdisplay 1130. The LED 1110 also includes a contact area formed by the lid 1115 and a set of multiple lenses 1712 disposed between the LED 1110 and the lens 1120. The lens 1712 may vary in size, shape, and number. For example, the number and size of lenses 1712 may be proportional to the cross-sectional area of the LED 1110. In some embodiments, lens 1712 includes one set of approximately 1 to approximately 100 lenses having a size that varies from approximately 1 mm to approximately 10 cm, for example. Light emitted by the LED 1110 enters the lens 1712 and is refracted. Because the surface of the lens 1712 is curved, the light refracts at different angles causing the beams from the lens 1712 to overlap. Overlapping of the beams reduces the appearance of dark spots caused by the lid 1115 such that the microdisplay 1130 is illuminated substantially uniformly by the LEDs 1110 (eg, generated in the image plane 1131). The image is substantially uniform).

Although the optical display system is described as having a single lens, in some embodiments multiple lenses may be used. Also, in some embodiments, one or more optical components may be used in addition to the lens (s). Examples of such optical components include mirrors, reflectors, polarizing beam splitters, prisms, total internal reflective prisms, optical fibers, light guides, and beam homogenizers. The selection of appropriate optical components as well as the corresponding arrangement of the components of the system is known to those skilled in the art.

Moreover, although the optical display system has been described as including one non-lamberian LED, in some embodiments one or more non-lamberian LEDs may be used to illuminate the microdisplay 1130. For example, FIG. 7 shows a blue LED (LED having a main output wavelength of approximately 450 to 480 nm) 1410 and a green LED (main output of approximately 500 to 550 nm) in optical communication with the surface of the microdisplay 1130. A system 1500 is shown that includes an LED having a wavelength 1420, and a red LED (an LED having a main output wavelength of approximately 610-650 nm) 1430. The LEDs 1410, 1420, 1430 may be arranged to be activated at the same time, sequentially or both. In other embodiments, at least some of the LEDs may be in optical communication with a separate microdisplay surface.

In some embodiments, the LEDs 1410, 1420, 1430 are activated sequentially. In this embodiment, the observer's eye generally holds and synthesizes the image produced by the multicolored LEDs. For example, if a particular pixel (or set of pixels) or microdisplay (or part of a microdisplay) of a frame is intended to be purple, the surface of the microdisplay may be red LED 1430 and blue LED during the appropriate portion of the refresh cycle. And may be illuminated 1414. The observer's eye "sees" the purple microdisplay by combining red and blue. Refresh cycles with appropriate frequencies (e.g., refresh rates greater than 120 Hz) can be used to prevent humans from noticing the sequential illumination of the LEDs.

The LEDs 1410, 1420, 1430 may have varying intensity and luminance. For example, the green LED 1420 may have a lower efficiency than the red LED 1430 or the blue LED 1410. Because of certain LEDs with low efficiency (eg green LEDs 1420), microcomputers can produce microcomputers with sufficiently high luminance of the color (eg green) of light emitted by relatively low efficiency LEDs (eg, LEDs 1420). It can be difficult to illuminate the surface of the display. To compensate for this inequality in efficiency (to produce an image that is not distorted due to differences in light brightness), the activation cycles of the multiple LEDs can be adjusted. For example, the lowest efficiency LED may be assigned a longer activation time (ie, longer on) than a higher efficiency LED. In a particular example, for a red / green / blue projection system, instead of 1/3: 1/3: 1/3 duty cycle assignment, the cycle is 1/6: 2/3: 1/6 (red: green: blue May be a ratio. In another example, the cycle may be a ratio of 0.25: 0.45: 0.30 (red: green: blue). In another example, the duty cycle provided for activation of the green LED may be increased further. For example, the duty cycle provided to project the green LED 1420 may be greater than about 40% (eg, greater than about 45%, greater than about 50%, greater than about 60%, greater than about 70%, greater than about 80%). More than about 90%). In some embodiments, the duty cycle for each LED is different. As an example, the duty cycle for the red LED 1430 may be greater than the duty cycle for the blue LED 1410. Although the system selected based on the intensity and / or brightness of the LED is described, in some systems the activation time of the LED may be selected based on one or more variables. In some examples, the activation time of the lowest efficiency light emitting device is at least about 1.25 times (eg, at least about 1.5 times, at least about 2 times, at least about 3 times) the activation time of other light emitting devices.

8A includes a blue LED 1410, a green LED 1420, and a red LED 1430 (eg, as described above) in optical communication with surfaces of associated LCD panels 1728, 1730, 1732. An embodiment of a liquid crystal display (LCD) based optical display system 1720 is shown. Optical display system 1720 also includes lenses 1722, 1724, 1726 and associated LCD panels 1728, 1730, 1732 in corresponding optical paths between LEDs 1410, 1420, 1430. Lenses 1722, 1724, 1726 focus light onto associated LCD panels 1728, 1730, 1732. Optical display system 1720 combines multiple beams of light from LCD panels 1728, 1730, 1732 into a single beam 1736 (indicated by arrows) that can be directed to a projection lens 1735 or other display. The device 1734 (eg, x-cube) is further included. Optionally, the optical display system 1720 may include a polarizer that reflects other polarizations (eg, 's' polarization) while delivering the desired polarizations (eg, 'p' polarizations). The polarizer is a path between the LEDs 1410, 1420, 1430 and the associated lenses 1722, 1724, 1726, a path between the lenses 1722, 1724, 1726 and the associated LCD panels 1728, 1730, 1732, or an optical path. It may be arranged in another position along the. As shown in FIG. 8B, in some embodiments, the aspect ratio of the LED (eg, LED 1430) is determined by the aspect ratio of the microdisplay (eg, microdisplay 1732) as described above. Can be matched.

9 includes a blue LED 1410, a green LED 1420 and a red LED 1430 (as described above) in optical communication with associated lenses 1722, 1724, 1726 (as described above), respectively. An embodiment of a digital optical processor (DLP) based optical display system 1750 is shown. Light emitted from the LEDs 1410, 1420, 1430 passes through associated lenses 1722, 1724, 1726 and a plurality of beams of light emitted by the LEDs 1410, 1420, 1430 have a total internal reflection (TIR) prism ( Collected by a device 1734 that combines into a single beam that can be guided to 1752. For example, light from the x-cube 1734 can be guided to the TIR prism 1702 by a mirror 1754 or other device such as a light guide. TIR prism 1702 reflects light and directs light to LDP panel 1756. The DLP panel 1756 includes a plurality of mirrors that can be operated to produce a particular image. For example, certain mirrors may reflect light 1760 (indicated by arrows) such that light is directed to projection 1755, or may cause light to be reflected away from projection lens 1755. The combination of LEDs 1410, 1420, 1430 and DLP panel 1756 allows greater control of the signal. For example, the amount of data sent on the LDP 1756 can be reduced by turning the LEDs 1410, 1420, 1430 on and off in addition to the mirror in the DLP panel 1756 (allowing for a larger switching frequency). . For example, if red is not needed in a particular image, the red LED 1430 can be switched off, eliminating the need to send a signal to the LDP 1702 to switch the associated mirror. The ability to adjust the LED can improve color quality, image quality or contrast, for example.

10 illustrates a liquid crystal on silicon comprising a blue LED 1410, a green LED 1420, and a red LED 1430 (as described above) in optical communication with associated polarization beam splitters 1774, 1778, 1782, respectively. A particular embodiment of a (LCOS) based optical display system 1770 is shown. Light emitted from LEDs 1410, 1420, 1430 passes through associated polarizing beam splitters 1774, 1778, 1782 and is projected onto associated LCOS panels 1772, 1776, 1780. Since LCOS panels 1772, 1776, and 1780 are not sensitive to all polarizations of light, polarizing beam splitters 1774, 1778, and 1782 polarize light with specific polarizations based on the sensitivity of LCOS panels 1772, 1776, and 1780. (E.g., passing some polarized light and other polarized light by transmitting the desired polarized light (eg 'p' polarized light) and reflecting other polarized light (eg 's' polarized light). Light reflected from LCOS panels 1772, 1776, and 1780 is transmitted from multiple LCOS panels 1772, 1776, and 1780 to produce a beam 1790 (indicated by an arrow) that is directed to the projection lens 1795. Collected by an apparatus 1734 (eg x-cube) that combines a beam of light.

Although the optical display system in this example includes red, green and blue light emitting elements, other colors and combinations are possible. For example, the system does not have to have only three colors. Additional colors such as yellow may be included and a portion of the duty cycle may be assigned. Alternatively, multiple LEDs with different main wavelengths may be optically combined to produce the resulting color. For example, blue-green LEDs (eg, LEDs having a primary wavelength between blue and green wavelengths) can be combined with yellow LEDs to produce "green" light. In general, the number of LEDs and the color of each LED can be selected as desired. Additional microdisplays may also be included.

In some embodiments, the duty cycle for less efficient LEDs (eg, green) may be increased by various data compression techniques and algorithms. For example, sending only the difference of the image information from the previous image, rather than the entire information required to reconstruct each image, allows for an increase in the data rate. Using this method, less data needs to be sent, allowing a higher data rate for a given refresh cycle and a reduced duty cycle for complementary colors.

In embodiments in which multiple LEDs are used to illuminate a given microdisplay, optical components may or may not be present along the light path between one or more LEDs and the microdisplay. For example, an x-cube or a set of dichroic mirrors can be used to combine light from multiple LEDs onto a single microdisplay. In embodiments where optical components are present along the light path, different optical components may be used for each LED (eg, if the surface of the LEDs are of different size or shape), or the same optical component is one It can be used for the above LED.

In some embodiments, varying the luminance for a particular color based on the desired chromaticity of the image may be achieved by illuminating the display for a portion of the activation time allocated to the particular LED. For example, to get dark blue, the blue LED can be activated for the entire assigned activation time and only for a portion of the total assigned activation time to get less dark blue. Part of the activation time used to illuminate the display can be adjusted by a set of mirrors that can be positioned to, for example, pass light through the microdisplay or reflect light away from the microdisplay.

In certain embodiments, an array of movable microdisplays (eg, movable mirrors) is operated to produce the desired intensity. For example, each micromirror represents a pixel and the intensity of the pixel can be determined by positioning of the microdisplay. For example, the micromirror may be on or off and a portion of the time spent in the on state during the activation time of a particular color of LED determines the intensity of the image.

In general, in embodiments where multiple LEDs are used, one or more LEDs (eg, each LED) may have the aspect ratio relationship described above with respect to the aspect ratio of the microdisplay 1130.

11 illustrates a system 1600 including an LED 1110, a microdisplay 1130, a cooling system 1510 and a sensor 1520 in thermal communication with the LED 1110 and in electrical communication with the cooling system 1510. An optical display system 1600 is shown in which a sensor 1520 and a cooling system 1510 can be used to adjust the temperature of the LED 1110 during use. This may be desirable, for example, because such LEDs can generate a significant amount of heat when the LED 1110 is a relatively large LED (see description below). With the configuration shown in FIG. 11, the amount of power input to the LED 1110 reduces the risk of damaging the LED 1110 through the use of a sensor 1520 and a cooling system 1510 to cool the LED 1110. (Mainly with increased operating efficiency at high drive charges). Examples of cooling systems include thermoelectric coolers, fans, heat pipes and liquid cooling systems. The sensor 1520 may be manually controlled or computer controlled, for example. In some embodiments, the system may not include a sensor (eg, cooling system 1510 may be permanently on or may be manually controlled). The use of a cooling system can provide a number of advantages, such as reducing the likelihood of damage to the LED resulting from excessive temperatures and increasing the efficiency of the LED at higher drive currents. The cooling system may also reduce the shift in wavelength caused by temperature.

In some embodiments, using a non-lambertian LED results in non-uniform angular distribution of light. In such an embodiment, the microdisplay can be moved away from the image plane to reduce the appearance of non-uniformity of the angle. In certain embodiments, the flow of information to the microdisplay can be accomplished by using an electrical or optical connection. In some examples, the speed of information flow can be increased by using optical connections.

In some embodiments, the size of the PLLED or other non-lamberian source may be increased and light may be collected at smaller angles. This may increase the brightness of the image on the display.

12A and 12B show an optical display system 2200 including a plurality of LEDs 2202, an optical homogenizer 2208 and a liquid crystal display (LCD) panel 2212. LED 2202 is disposed along edge 2211 of LCD panel 2212 and emits light (indicated by arrow 2206) to illuminate LCD panel 2212, such that LCD panel 2212 displays an image. Allow to do The light 2206 emitted by the LED 2202 is directed to a light homogenizer 2208 (eg, light tunnel, light) which directs the light 2206 to the LCD panel 2212 (indicated by the arrow 2210). On the pipe). Total internal reflection of the light 2206 off the inner surface of the homogenizer 2208 creates a substantially uniform output distribution of the light 2210 such that the LCD panel 2212 is illuminated substantially uniformly by the LED 2202. (For example, the distribution of light entering the edge 2211 of the LCD panel 2212 is substantially uniform). For example, in some embodiments, the substantially uniform light distribution varies by up to about 20% (eg, up to about 10%, up to about 5%, up to about 1%) at different locations on the edge 2211. Light distribution with intensity and / or color distribution of light entering edge 2211. Subsequent to entering the edge 2211 of the LCD panel 2212, the light 2211 is reflected off the inner surface of the LCD panel 2212 and / or scattered at the center (indicated by the arrow 2215) and the LCD panel It emerges from the anterior surface of 2212 (indicated by arrow 2217).

LED 2202 may include a number of devices that emit light of different wavelengths (eg, red, green, blue, cyan, yellow, magenta) or emit monochrome light (eg, substantially white). have. Although in the optical display system 2200 shown in FIGS. 12A and 12B, light 2206 emitted from the LED 2202 passes through the homogenizer 2208 as shown in FIG. 13, in some embodiments the LED Light emitted from 2202 (indicated by arrow 2214) impinges on edge 2211 of LCD panel 2212 without passing through additional optical components. In some embodiments, the substantially uniform light distribution is different from the light emitted by the LED 2202 inside the LCD panel 2212 such that the light bounces off the off reflective surface or scatters the center within the LCD panel 2212. It is believed that it can be formed by mixing light of wavelength or color (as shown in Fig. 12B).

14A shows an optical display system 2219 that includes a number of LEDs 2216a, 2216b, 2216c, 2216d to provide illumination to LCD panel 2212. FIG. 14B shows a top view of surface 2222 of LEDs 2216a, 2216b, 2216c, 2216d from which light is emitted. The shape and placement of the LEDs 2216a, 2216b, 2216c, 2216d along the edge 2211 of panel 2212 can be changed as desired. 14A and 14B show an exemplary arrangement in which a number of rectangular dies are arranged along the edge 2212 of panel 2212. LEDs 2216a, 2216b, 2216c, and 2216d may be mounted at a distance 2230 from edge 2211. By way of example, distance 2230 may be relatively small (eg, about 1 millimeter or less, about 2 millimeters or less, about 3 millimeters or less, about 5 millimeters or less, or about 10 millimeters). Optionally, as shown in Fig. 15, LEDs 2216a, 2216b, 2216c, and 2216d may be directly attached and / or embedded on the LCD panel 2212.

Optical display system 2229 may include LEDs that emit light of various colors. For example, optical display system 2229 may include a blue LED (LED having a main output wavelength of approximately 450 to 480 nm) and a green LED (approximately 500 to 550) in optical communication with edge 2211 of LCD panel 2212. LEDs having a main output wavelength of nm), and red LEDs (LEDs having a main output wavelength of about 610 to 650 nm). Other colors and combinations are possible. For example, the system does not have to have all three colors or only three colors. Additional colors may be included, such as yellow (LEDs having a main output wavelength of about 570 to about 600 nm) and / or cyan (LEDs having a main output wavelength of about 480 to about 500 nm). In a five-color LED system (red, green, blue, yellow, cyan), a main output wavelength for blue of about 430-480 may be desirable.

As mentioned above, LEDs of various colors may have varying intensity and / or brightness. For example, a green LED may have a lower efficiency than a red or blue LED. Due to certain LEDs having low efficiency, in some embodiments, it may be advantageous to increase the number and size of LEDs of a particular color to compensate for an imbalance in efficiency. For example, a minimum efficiency LED may be assigned a larger percentage of emitting area than a more efficient LED (eg having a larger total surface area). As an example, in the optical display system 2229, the LEDs 2216a, 2216b, 2216c, 2216d may include one red LED, one blue LED, and two green LEDs. The number and combination of colors can vary as desired.

In some embodiments, optical display system 2229 has one or more dies (eg, LEDs 2216a, 2216b, 2216c, 2216d) having a width 2220 configured to match the thickness 2224 of LCD panel 2212. One or more). For example, the ratio of the width 2220 to the thickness 2224 can be about 0.5 to about 1.3 (eg, about 0.5, about 0.6, about 0.7, about 0.8, about 0.9, about 1, about 1.1, about 1.2). , About 1.3).

The width of the LED may be selected such that increased light coupling into the LCD panel can occur for the illumination profile of the LED. In some embodiments, it may be desirable for the LEDs 2216a, 2216b, 2216c, 2216d to have a width 2220 less than the thickness 2224 of the LCD panel 2212 such that light emitted from the LEDs is substantially coupled into the LCD. have. For example, width 2220 may be less than thickness 2224 by at least about 0.5 millimeters (eg, at least about one millimeter, at least about 2 millimeters, at least about 3 millimeters, at least about 4 millimeters, at least about 5 millimeters). Can be. In some embodiments, LEDs 2216a, 2216b, 2216c, and 2216d are used to reduce the thickness 2224 of LCD panel 2212 such that light emitted from the LED impinges on the entire edge 2211 of LCD panel 2212 or on a substantial portion thereof. It may be desirable to have a width 2220 greater than). For example, the width 2220 is at least about 1 millimeter (eg, about 1.5 millimeters, at least about 2 millimeters, at least about 2.5 millimeters, at least about 3 millimeters, at least about less than the thickness 2224 of the LCD panel 2212). 5 millimeters, at least about 10 millimeters). The length 2221 of the LED may vary depending on various factors such as the total length 2226 or width 2228 and the number of LEDs disposed along the edge 2211 of the LCD panel 2212.

In some embodiments, the LED having a patterned surface may increase the extraction of light from the LED (as described below). Increased light extraction can provide better illumination of the LCD panel.

The optical display system 2229 shown in FIGS. 14A and 14B includes a plurality of LEDs 2216a, 2216b, 2216c, and 2216d having approximately the same width 2220 in the thickness 2224 of the LCD panel 2212. Other die shapes and array arrangements are possible.

In some embodiments, the dimensions of edge 2211 of LCD 2212 may be small enough to preferably and / or enable illuminating LCD 2212 using a single LED. Examples of such sufficiently small LCD panels may include handheld displays, watches, wristwatches, cell phones, handheld games, and personal digital assistants. For example, FIG. 16 shows a plan view of the surface of the LED 2236 through which light is emitted from the LED 2236. LED 2236 may be disposed along edge 2211 of LCD panel 2212 and provide illumination for LCD panel 2212. The LED 2236 has a width 2220 approximately equal to the thickness 2224 of the LCD panel 2212. For example, the ratio of the width 2237 of the LED 2236 to the thickness 2224 of the LCD panel 2212 may range from about 0.5 to about 1.3 (eg, about 0.5, about 0.6, about 0.7, about 0.8, About 0.9, about 1, about 1.1, about 1.2, about 1.3). The LED 2236 has a length 2238 that is approximately equal to the length 2226 of the LCD panel 2212. For example, the ratio of the length 2238 of the LED 2236 to the length 2226 of the LCD panel 2212 may range from about 0.1 to about 1.2 (eg, about 0.1, about 0.2, about 0.3, about 0.4, About 0.5, about 0.6, about 0.7, about 0.8, about 0.9, about 1, about 1.1, about 1.2). The LED 2236 can emit light of different wavelengths (eg, red, green, blue, cyan, yellow, magenta) or emit monochromatic light (eg, substantially white).

In another example, FIG. 17 shows a top view of the surface of an array 2240 of long thin LEDs 2242a, 2242b, 2242c, each having an associated width 2244a, 2244b, 2244c respectively. Array 2240 can be positioned along LCD edge 2211 and includes full width 2245 (eg, width 2244a, width 2244b, width 2244c and LEDs) of array 2240. The sum of any gaps disposed between 2242a, 2242b, and 2242c) is approximately equal to the thickness 2224 of the LCD panel 2212. For example, the ratio of the overall width 2245 to the thickness 2224 of the LCD panel 2212 is about 0.5 to about 1.3 (eg, about 0.5, about 0.6, about 0.7, about 0.8, about 0.9, about 1, about 1.1, about 1.2, about 1.3). The LEDs 2242a, 2242b, and 2242c may have an associated length 2243 approximately equal to the length 2226 of the LCD panel 2212. For example, the ratio of the length 2243 of the LEDs 2242a, 2242b, 2242c to the length 2226 of the LCD panel 2212 may be about 0.1 to about 1.2 (eg, about 0.1, about 0.2, about 0.3). , About 0.4, about 0.5, about 0.6, about 0.7, about 0.8, about 0.9, about 1, about 1.1, about 1.2). Alternatively or additionally, in some embodiments, as shown in FIG. 18, the LEDs 2242a, 2242b, 2242c may have a length 2239 less than the length 2226 of the LCD panel 2212, and the LEDs. Multiple arrays 2247a, 2247b, 2247c, 2247d, 2247e, and 2247f may be disposed along the edge 2211 of the LCD panel 2212.

LEDs in arrays 2240 and 2241 emit light of different wavelengths (eg, red, green, blue, cyan, yellow, magenta) or multiple colors that emit monochrome light (eg, substantially white). It may include an LED. The LEDs of a particular column may emit the same wavelength or emit different wavelengths, and the column may include LEDs that emit the same wavelength or emit different wavelengths as compared to the LEDs of other columns.

In some embodiments, as shown in FIGS. 19 and 20, it may be desirable to offset one or more of the columns in an array of LEDs having multiple columns. For example, offsetting one or more of the columns can allow for better overlap and light uniformity.

In some embodiments, as shown in FIG. 19, the array 2246 of LEDs may be arranged in an offset arrangement. Array 2246 includes a plurality of LEDs arranged in three columns 2248a, 2248b, 2248c. At least one of the columns 2248a, 2248b, 2248c is at least one column 2224a, 2248b by a distance 2252 (eg, about 0.1 mm, about 0.5 mm, about 1 mm, about 2 mm, about 3 mm offset). , 2248c). In the exemplary embodiment of FIG. 19, the LEDs in column 2248b are offset from the LEDs in columns 2248a and 2248c by length 2252.

The LEDs in columns 2248a, 2248b, 2248c have associated widths 2250a, 2250b, 2250c, respectively. The sum of the widths 2250a, 2250b, 2250c and any spacing disposed between the LEDs is approximately equal to the thickness 2224 of the LCD panel 2212. For example, the ratio of the sum of the widths 2250a, 2250b, 2250c to the thickness 2224 of the LCD panel 2212 and any spacing disposed between the LEDs (indicated by arrow 2253) is about 0.5 to 1.3 ( For example, about 0.5, about 0.6, about 0.7, about 0.8, about 0.9, about 1, about 1.1, about 1.2, about 1.3).

The LEDs in the array 2246 emit a plurality of LEDs that emit light of different wavelengths (eg, red, green, blue, cyan, yellow, magenta) or emit monochrome light (eg, substantially white). It may include. The LEDs of a particular column may emit the same wavelength or emit different wavelengths and / or the column may include LEDs that emit the same wavelength or emit different wavelengths as compared to LEDs of other columns.

In another example, FIG. 20 shows a top view of the surface of an array 2254 of LEDs arranged in an offset arrangement. Array 2254 includes a plurality of LEDs arranged in three columns (eg, column 2264a, column 2264b, column 2264c). Column 2264b is offset from column 2264a by a distance 2258 (eg, an offset of about 0.1 mm, about 0.5 mm, about 1 mm, about 2 mm, about 3 mm). Column 2264c is offset from column 2264b by a distance 2260 (eg, offset by about 0.1 mm, about 0.5 mm, about 1 mm, about 2 mm, about 3 mm) and has a length 2258 and It is offset from column 2264a by the sum of the lengths 2260. The LEDs in the array 2254 emit multiple lights that emit light of different wavelengths (eg, red, green, blue, cyan, yellow, magenta) or emit monochrome light (eg, substantially white). It may include. The LEDs of a particular column may emit the same wavelength or emit different wavelengths and / or the column may include LEDs that emit the same wavelength or emit different wavelengths as compared to LEDs of other columns.

Although Figures 17, 18, 19, and 20 show three columns of LEDs having a width equal to the approximate thickness 2224 of the LCD panel 2212, the array of LEDs may be smaller or larger. It may include a column of (for example, two columns of LED, four columns of LED, five columns of LED, six columns of LED, seven columns of LED, ten columns of LED).

21 shows an LED 2822 (in some embodiments, system 2270 may include an array of LEDs opposite a single LED 2272), color mixer 2274, wedge optics 2276, and Shown is a system 2270 that includes an LCD panel 2280. In use, light generated by LED 2227 (indicated by arrow 2228) passes through color mixer 2274 and enters wedge optics 2276. Wedge optics 2276 guide light 2228 into edge 2231 of LCD panel 2280. The use of wedge optics 2276 to guide light into the LCD panel 2280 allows the LED 2227 to be offset from an edge 2231 of the LCD panel 2280. In some embodiments, a color mixer may be included inside wedge optics 2276.

Custom shaped LEDs can be used to reduce adjacent spacing between dies and to increase the amount of light emitted from the LEDs collected by color mixer 2274. For example, the LED can be shaped by being cut along the crystallographic direction and / or diced using a diamond saw or laser dicing system. 22B, 23B, 24B, 25B, 26B, 27B, 28B and 29B show top views of various packing arrangements and surfaces of LED dies. 22C, 23C, 24C, 25C, 26C, 27C, 28C, and 29C are cross-sectional views of the opening of the color mixer 2274 used to collect light emitted from the LEDs. In some embodiments, the array of LEDs may be shaped such that the perimeter of the LED array combines with the perimeter of the opening. For example, the ratio of the cross-sectional area of the LED array to the cross-sectional area of the opening can be about 0.5 to 1.3 (eg, about 0.5, about 0.7, about 0.9, about 1, about 1.1, about 1.3). The perimeter of the opening can be of various shapes such as square, hexagon, triangle, pentagon, circle, trapezoid and square, and the perimeter of the array of LEDs or the shape of the LED can match the shape of the opening.

For example, as shown in FIGS. 22A-22C, 23A-23C, and 24A-24C, the perimeter of the opening can be circular and the perimeter of the array of LEDs can be circular. In a circular array, each array in the array of LEDs may have a pie shape defined by two straight edges (eg, edges 2290 and 2292) and one rounded edge (eg, edges 2294). have.

In some embodiments, as shown in FIGS. 25A-25C and 26A-26C, the opening is circular in shape, pentagonal, hexagonal (FIG. 26B), octagonal, octagonal (FIG. 25B), hexagonal or 10. An array of angular shaped LEDs can be matched to the circular openings. It is believed that the use of polygonal arrays can provide various advantages for manufacturing. For example, a polygonal array is formed of a plurality of triangular shaped LED dies. Triangle shaped dies are easier to manufacture than pie shaped dies because triangle shapes only require straight edges (eg, edges 2296, 2298, 2300) and do not require the formation of curved edges. It may be. In certain embodiments, as shown in FIGS. 27C and 28C, the openings may be hexagonal or octagonal to match hexagonal (FIG. 27B) or octagonal (FIG. 28B) arrays.

In some embodiments, as shown in FIGS. 29A-29C, the array may include multiple LEDs arranged in a prism shape (FIG. 29B) to match the prism-shaped openings (FIG. 29C).

In the embodiments described above, the LED dies may be packaged separately or multiple LED dies may be included in a single package. The array may include dies of the same or different colors. In some embodiments, emission wavelengths for larger dies and / or multiple dies may be selected to balance the spectral output of the complete array.

30 shows an optical display system 2310 that includes LEDs 2314, LCD panels 2212 and 1130, and a cooling system 2316. The LED 2314 is in thermal communication with the cooling system 2316 so that the cooling system 2316 can be used to regulate the temperature of the LED 2314 during use of the system 2310. Examples of cooling systems include thermoelectric coolers, fans, heat pipes and liquid cooling systems. In some embodiments, cooling unit 2314 may include one or more cooling tubes around the perimeter of the panel (fluid or gas flow). In some embodiments, the cooling unit 2314 may be a single loop system in which successive tubes are disposed around the LCD panel 2312 or a plurality of tubes are disposed around the LCD panel 2312 (eg, one loop is provided). Disposed on each side of the LCD panel 2212). In some embodiments, cooling unit 2316 may include finned heat sinks. It is believed that the use of a cooling system can provide a number of advantages, such as reducing the likelihood of damage to the LED 2314 resulting from excessive temperatures and increasing the efficiency of the LED 2314 at high drive currents. The cooling system may also reduce the shift in wavelength caused by temperature.

Although the LEDs of the optical display system 2310 are placed along all four edges of the LCD panel 2212, the LEDs are employed with a single edge or multiple edges of the LCD panel with a cooling unit surrounding the edges of the LCD. For example, 1 edge, 2 edges, 3 edges, 4 edges all edges).

Although in the embodiment shown in FIGS. 14A and 15, a number of rectangular dies of LEDs may have an edge 2211 of panel 2212 such that the surface 2222 of the LED is approximately parallel to the surface 2211 of the edge of panel 2212. Arranged accordingly, other arrangements are possible. For example, as shown in FIG. 31, multiple LEDs 2330 can be arranged along the edge 2211 of panel 2212 in a dense arrangement. The LED 2330 is such that the surface 2334 of the first LED 2338 lies in the first plane and the surface 2336 of the second LED 2340 lies in the second plane and the planes intersect at an angle 2332. Can be arranged. Arranging the LEDs in this sawtooth arrangement may allow more and / or larger LEDs to be located along the edge 2211 of the LCD panel 2212. Although a serrated arrangement is shown in FIG. 21, other shaped protrusions are possible that can increase the surface area of the LED 2330 arranged along the edge of the LCD panel 2212. In some embodiments, multiple LEDs may be disposed at each of the serrated edges along the LEDs of the panel.

32 is a side view of an LED 100 in the form of a packaged die. LED 100 includes a multi-layer stack 122 disposed on submount 120. The multilayer stack 122 includes a 320 nm thick silicon doped (n-doped) GaN layer 134 having a pattern of openings 150 on the upper surface 110. Multi-layer stack 122 also includes a bonding layer 124, a 100 nm thick silver layer 126, a 40 nm thick magnesium doped (p-doped) GaN layer 128, a plurality of InGaN / GaN quantum wells. 120 nm thick photogeneration zone 130, and an AlGaN layer 132 formed. N-side contact pad 136 is disposed on layer 134 and p-side contact pad 138 is disposed on layer 126. Encapsulant material (epoxy with a refractive index of 1.5) 144 is present between layer 134 and cover slip 140 and support 142. Layer 144 does not extend over opening 150.

Light is generated by the LED 100 as follows. P-side contact pad 138 is held at a positive potential with respect to n-side contact pad 136 to allow current to be injected into LED 100. As current passes through the photogeneration zone 130, electrons from the n-doped layer 134 combine with the p-doped layer 128 in the zone 130, which causes the zone 130 to generate light. Let's do it. Photo-generating zone 130 includes a number of point dipole emission sources that emit (eg, isotropically) light having a wavelength specific spectrum of material in which photo-generating zone 130 is formed within zone 130. . For InGaN / GaN quantum wells, the spectrum of the wavelength of light generated by zone 130 may have a peak wavelength of about 445 nanometers (nm) and a half width (FWHM) of about 30 nm.

Note that the charge carriers in the p-doped layer 126 have relatively low mobility when compared to the charge carriers in the n-doped semiconductor layer 134. As a result, positioning the silver layer 126 (conductive) along the surface of the n-doped layer 128 may result in contact pads 138 into the p-doped layer 128 and photo-generating region 130. The uniformity of charge injection from the substrate can be improved. This may also reduce the electrical resistance of the device 100 and / or increase the implantation efficiency of the device 100. Because of the relatively high charge carrier mobility of the n-doped layer 134, electrons can spread relatively quickly from the n-side contact pad 136 through the layers 132, 134, resulting in a current density inside the photogeneration region 130. Is substantially uniform across region 130. The silver layer 126 also has a relatively high thermal conductivity such that the layer 126 acts as a heat sink for the LED 100 (which transfers heat vertically from the multi-layer stack 122 to the submount 120). Note that).

At least a portion of the light generated by the region 130 is directed towards the silver layer 126. This light may be reflected by layer 126 and exit from LED 100 via surface 110, or may be absorbed inside semiconductor material within LED 100 after being reflected by layer 126 and thus region 130. Can generate electron-hole pairs that can be combined within the region, allowing zone 130 to generate light. Likewise, at least some of the light generated by zone 130 is directed towards pad 136. The lower side of the pad 136 is formed of a material (eg, Ti / Al / Ni / Au alloy) capable of reflecting at least a portion of the light generated by the light generating zone 130. Thus, light directed to pad 136 may be reflected by pad 136 and then exit from the LED via surface 110, or light directed to pad 136 may be reflected by pad 136 and The electron-hole pairs may then be generated within the semiconductor material within the LED 100 to be bonded within the region 130, allowing the region 130 to generate light (eg, a silver layer ( 126) with or without reflection).

As shown in Figures 32 and 33, the surface 110 of the LED 100 is not flat and consists of a modified triangular pattern of the opening 150. In general, various values may be selected for the depth of the opening 150, but the diameter of the opening 150 and the spacing between recent neighbors in the opening 150 may vary. Unless stated otherwise, for the purposes of the numbers below, which represent the result of the numerical calculation, the aperture 150 is approximately 280 nm in depth 146, a non-zero diameter of about 160 nm, about 220 nm. Has a spacing between recent neighbors and a refractive index of 1.0. The triangular pattern is detuned such that the nearest neighbor within pattern 150 has a center-to-center distance with a value between (a-Δa) and (a + Δa), where “a” is for the ideal triangular pattern. Lattice constant, "Δa" is a detuning variable with the dimension of length and detuning can occur in any direction. In order to improve light extraction from the LED 100 (see description below), the detuning variable Δa is generally at least about 1 percent (eg, at least about 2 percent, at least about 3 percent,) of the ideal grating constant (a), At least about 4 percent, at least about 5 percent), and / or at most 25% of the ideal lattice constant (eg, at most about 20%, at most about 15%, at most about 10%). In some embodiments, the closest interval is substantially arbitrarily changed between (a-Δa) and (a + Δa), and pattern 150 is substantially arbitrarily detuned.

For the modified triangular pattern of the opening 150, it has been found that non-zero detuning parameters improve the extraction efficiency of the LED 100. For the LED 100 described above, the detuning variable Δa is increased from zero to about 0.15a, and the numerical modeling of the electromagnetic field in the LED 100 (described below) shows that the extraction efficiency of the device is reduced. As shown in FIG. 34, it increases from about 0.60 to 0.70.

The extraction efficiency shown in FIG. 34 is calculated using a three-dimensional finite difference time zone (FDTD) method as an approximation to the Maxwell's equation for light inside and outside the LED 100. For example, K.S. Kunz and R.J. Luebbers finite difference time zone method (CRC, Boca Taton, FL, 1993); See A. Taflove's Computational Electrodynamics: Finite Difference Time Zone Method (Artech House, London, 1995), both of which are incorporated herein by reference. In order to represent the optical behavior of the LED 100 with a specific pattern 150, the input parameters of the FDTD calculations are based on the center frequency and bandwidth of the light emitted by the point dipole radiation source of the light generating region 130, 122) the dimensions and dielectric properties of the layers therein, and the closest distance (NND), diameter, and depth between openings in pattern 150.

In a particular embodiment, the extraction efficiency of the LED 100 is calculated as follows using the FDTD method. The FDTD method is used to solve the full vector time dependent Maxwell equation.

은 광발생 구역(130)의 양자 우물, p-상수 층(126) 및 LED(100) 내의 다른 층의 주파수 의존 응답을 캡쳐(capture)한다. 개별

항은 재료의 전체 분극에 대한 상이한 기여의 경험상 유도된 값이다(예를 들면, 바운드 전자 진동에 대한 분극 응답, 자유 전자 진동에 대한 분극 응답). 특히,Where polarization

Captures the frequency dependent response of the quantum wells in the light generating region 130, the p-constant layer 126 and other layers in the LED 100. Individual

The term is an empirically derived value of different contributions to the total polarization of the material (eg polarization response to bound electromagnetic vibration, polarization response to free electron vibration). Especially,

Polarization here corresponds to the dielectric constant.

For numerical calculation, the layers considered are only the encapsulant layer 144, the silver layer 126 and the layers between the encapsulant layer 144 and the silver layer 126. This approximation is based on the assumption that the encapsulant layer 144 and layer 126 are thick enough that the peripheral layer does not affect the optical performance of the LED 100. Relevant structures in LED 100 that are assumed to have frequency dependent insulation constants are silver layer 126 and light generating region 130. It is assumed that other relevant layers in LED 100 do not have a frequency dependent insulation constant. Note that in embodiments where the LED 100 has an additional metal layer between the encapsulant 144 and the silver layer 126, each additional metal layer will have a corresponding frequency dependent dielectric constant. The silver layer 126 (and any other metal layer in the LED 100) also has a frequency dependent term for both bound electrons and free electrons and the light generating region 130 has a frequency dependent term for bound electrons but free electrons. Note that there is no frequency dependent term for. In some embodiments, other terms may be included when modeling the frequency dependence of the dielectric constant. Such terms may include, for example, electron-phonetic interaction, atomic polarization, ion polarization and / or molecular polarization.

The emission of light from the quantum well zone of the light generation zone 130 is modeled by including a number of randomly located, constant current dipole sources inside the light generation zone 130, each of which represents an arbitrary initial phase and start time, respectively. And emit a short Gaussian pulse of the same spectral width as the actual quantum well.

In order to cope with the pattern of the openings 150 in the surface 110 of the LED 100, laterally large supercells are used with periodic boundary conditions. This can help simulate relatively large device sizes (eg greater than 0.01 mm at the edges). The fully developed equation is solved in time after all the dipole sources have released their energy, until no energy remains in the system. During the simulation, the total energy released, the energy flux extracted through the top surface 110, the energy absorbed by the quantum wells and the n-doped layer is monitored. Through the Fourier transform in both time and space, the frequency of the extracted flux and the angular analyzed data can be obtained, so that the angular and frequency analyzed extraction efficiency can be calculated. By matching the experimentally known luminescence of the photogeneration zone 130 with the total energy emitted, an absolute angle-analyzed extraction is obtained with lumen / solid angle / chip area for a given electrical input.

Without wishing to be bound by theory, the detuned pattern 150 may be generated in the region 130 because the opening 150 generates a dielectric function that varies spatially within the layer 134 in accordance with the pattern 150. It is believed that light can improve the efficiency exiting the LED 100 via the surface 110. It is believed that this changes the density of the emission mode (i.e., the mode of light exiting from the surface 110) and the guidance mode (i.e., the limited light mode inside the multilayer stack 122) within the LED 100, The variation of the density of the emission mode and the guidance mode inside the LED 100 is dispersed (eg, within the mode in which some light that would otherwise be emitted into the guidance mode in the absence of the pattern 150 may leak into the radiation mode). It is believed to cause Bragg dispersion. In some embodiments, it is believed that pattern 150 (eg, the pattern described above, or one of the patterns described below) may eliminate all of the guidance modes inside LED 100.

It is believed that the effect of detuning of the grating can be understood by considering the Bragg scattering off of the grating with point scattering sites. For a complete grating arranged in the grating planes spaced apart by a distance d, the monochromatic light of wavelength λ is scattered through the angle θ according to the Bragg condition, nλ = 2dsinθ, where n gives the order of scattering Is an integer. However, for a light source having a spectral bandwidth Δλ / λ and emitting into the solid angle ΔΘ, it is believed that the Bragg condition can be relaxed by detuning the spacing between the grating sites by the detuning variable Δa. Detuning the grating is believed to increase the scattering efficiency and angular acceptability of the pattern over the spatial emission profile and spectral bandwidth of the source.

Although a modified triangular pattern 150 with a non-zero detuning parameter Δa that can improve light extraction from the LED 100 has been described, other patterns may also be used to improve light extraction from the LED 100. It may be. When determining whether a given pattern improves light extraction of the LED 100 and / or which pattern of openings may be used to improve the light extraction efficiency of the LED 100, physical intuition first determines these figures. It may also be used to approximate a basic pattern that may improve light extraction before performing the computation.

The extraction efficiency of the LED 100 can be further understood by considering the Fourier transform of the dielectric function that varies spatially with the pattern 150 (eg, weak scattering period). 35 shows a Fourier transform for an ideal triangular grating. In-plane wave vector (k ') and all of which extraction of light in a particular direction with in-plane wave vector (k) is compared to k by addition or subtraction of inverse lattice vector G (i.e. k = k' ± G) It relates to the source emission S _{k '} into the mode. The extraction efficiency is proportional to the size of the corresponding Fourier component F _k of the dielectric function ε _G given by the following equation.

Since the light propagating in the material generally satisfies the equation k ² (in-plane) + k ² (vertical) = ε (ω / c) ² , the maximum G considered is the dielectric constant of the light generating zone and the light generating zone. It is fixed by the frequency ω emitted by. As shown in Figure 35, this defines a ring in inverse space, often called an optical line. The light lines will be annular due to the finite bandwidth of the light generating zone and show the light lines of the monochromatic source for clarity. Similarly, the light propagating inside the coating material is limited by the light line (inner circle in Fig. 35). Thus, the extraction efficiency is increased in all directions (k) within the encapsulant light line, corresponding to increasing the scattering intensity ε _G with respect to the G point lying within the material light line and increasing the number of G points within the encapsulant light line. Increase by increasing F _k ). Physical intuition can be used when selecting a pattern that can increase extraction efficiency.

As an example, Figure 36 shows the effect of increasing the lattice constant for an ideal triangular pattern. The data in Fig. 36 shows that the emitted light is 1.27a, 0.72a and 1.27a ± as the peak wavelength of 450 nm and the depth of the hole, the diameter of the hole and the accumulation of the n-doped layer 134 with the nearest distance (a). Calculated using the variables given for the LED 100 shown in FIG. 32 except having 40 nm. Increasing the lattice constant increases the density of G points inside the light line of the coating material. Obvious trends in extraction efficiency with NND are observed. It is believed that the maximum extraction efficiency occurs for NND approximately equal to the wavelength of light in vacuum. The maximum is obtained because the scattering effect is reduced because the material becomes more uniform as the NND becomes much larger than the wavelength of light.

As another example, Figure 37 shows the effect of increasing the hole size or fill factor. The filling effect for the triangular pattern is given by (2π / √3) * (r / a) ² , where r is the radius of the hole. The data shown in FIG. 37 is calculated using the variables given for the LED 100 shown in FIG. 32, except that the diameter of the opening is changed in accordance with the fill factor value given on the x-axis of the graph. Extraction efficiency increases with filling factor as the scattering intensity ε _G increases. The maximum is observed for this particular system at a filling effect of about 48%. In some embodiments, the LED 100 is at least about 10% (eg, at least about 15%, at least about 20%) and / or up to 90% (eg, at most about 80%, at most about 70%, Up to about 60%).

Although the deformed triangular pattern is described as the detuning variable relates to the positioning of the opening of the pattern from the position in the ideal triangular grid, the deformed (detuned) triangular pattern is also centered in the position for the ideal triangular pattern. It can also be achieved by modifying the holes in the ideal triangular pattern. 38 shows an embodiment of this pattern. The physical description of the improvement of the light extraction, the method of performing the corresponding numerical calculation and the improved light extraction for the light emitting element having the pattern shown in FIG. 38 are the same as those described above. In some embodiments, the deformed (detuned) pattern may have openings displaced from the ideal position and openings with the ideal position but variable diameter.

In another embodiment, improved light extraction from the light emitting device can be achieved by using various types of patterns including, for example, complex periodic patterns and aperiodic patterns. As referred to herein, a compound periodic pattern is a pattern having one or more shapes in each unit cell repeated in a periodic manner. Examples of the compound periodic pattern include a honeycomb pattern, a honeycomb base pattern, a (2 × 2) base pattern, a ring pattern, and an Archimedes pattern. As described below, in some embodiments, the compound periodic pattern may include some openings with one diameter and other openings with a smaller diameter. As referred to herein, the aperiodic pattern is a pattern that does not have translational symmetry over unit cells having a length that is at least 50 times the peak wavelength of the light generated by zone 130. Examples of aperiodic patterns include nonrepeatable patterns, quasicrystalline patterns, Robinson patterns, and Amman patterns.

39 shows numerical calculations for the LED 100 for two different compound periodic patterns in which some openings in the pattern have a particular diameter and other openings in the pattern have a smaller diameter. The numerical calculation shown in FIG. 39 shows the behavior of extraction efficiency as the diameter of the small hole dR varies from 0 nm to 95 nm (large hole having a diameter of 80 nm). The data shown in FIG. 37 is calculated using the variables given for the LED 100 shown in FIG. 32 except that the diameter of the opening is changed in accordance with the fill factor value given on the x-axis of the graph. Without wishing to be bound by theory, multiple pore sizes allow scattering from multiple periodicities within the pattern, thus increasing the angle tolerance and spectral efficiency of the pattern. Improvements in light extraction, methods of performing corresponding numerical calculations, and physical descriptions of improved light extraction for light emitting devices having the pattern shown in FIG. 39 are generally the same as those described above.

40 shows numerical calculations for LEDs 100 having different ring patterns (composite period patterns). The number of holes in the first ring surrounding the central hole is different for different ring patterns (6, 8 or 10). The data shown in FIG. 40 is calculated using the parameters given for the LED 100 shown in FIG. 32 except that the emitted light has a peak wavelength of 450 nm. The numerical calculation shown in FIG. 40 shows the extraction efficiency of the LED 100 as the number of ring patterns per unit cell repeated across the unit cell is changed from two to four. Improvements in light extraction, methods of performing corresponding numerical calculations, and physical descriptions of improved light extraction for light emitting devices having the pattern shown in FIG. 40 are generally the same as those described above.

41 shows numerical calculations for an LED 100 having an Archimedes pattern. The Archimedes pattern A7 is composed of seven equally spaced hexagonal unit cells 230 having the closest distance a. Inside the unit cell 230, six holes are arranged in a regular hexagonal shape and the seventh hole is located at the center of the hexagon. The hexagonal unit cells 230 are then fitted together along their edges with the center-to-center distance between unit cells of a '= a * (1 + √3) to pattern the entire surface of the LED. This is known as A7 tiling as seven holes make up the unit cell. Similarly, Archimedes tiling A19 consists of 19 equally spaced holes with an NND of a. The holes are arranged in the shape of an inner hexagon with seven holes, an outer hexagon with twelve holes, and a central hole in the inner hexagon. Hexagonal unit cells 230 fit together along their edges with the center-to-center distance between unit cells of a '= a * (3 + √3) to pattern the entire surface of the LED. Improvements in light extraction, methods for performing corresponding numerical calculations, and physical descriptions of improved light extraction for light emitting devices having the pattern shown in FIG. 41 are generally the same as those described above. As shown in FIG. 41, the extraction efficiency for A7 and A19 is approximately 77%. The data shown in FIG. 41 is calculated using the parameters given for the LED shown in FIG. 32 except that the emitted light has a peak wavelength of 450 nm and NND is defined as the distance between the openings in the individual cells.

42 shows numerical calculation data for the LED 100 having a quasi-crystalline pattern. Quasicrystalline patterns are described, for example, in M. Senechal's quasicrystalline and geometric shapes (Cambridge University Press, Cambridge, England 1996), incorporated herein by reference. Numerical calculations indicate the behavior of extraction efficiency as the class of 8-fold based quasi-periodic structure changes. The quasicrystalline pattern is believed to exhibit high extraction efficiency because of the high degree of in-plane rotational symmetry allowed by this structure. Improvements in light extraction, methods of performing corresponding numerical calculations, and physical descriptions of improved light extraction for light emitting devices having the pattern shown in FIG. 42 are generally the same as those described above. The results of the FDTD calculation shown in FIG. 22 indicate that the extraction efficiency of the quasi-crystalline structure reaches about 82%. The data shown in Figure 42 utilizes the parameters given for the LED 100 shown in Figure 32 except that the emitted light has a peak wavelength of 450 nm and NND is defined as the distance between the openings within the individual cells. Is calculated.

Although specific examples of patterns are described herein, it is believed that other patterns may improve light extraction from LED 100 if the patterns meet the basic principles described above. For example, it is believed that adding detuning to a quasi-crystalline or complex periodic structure can increase extraction efficiency.

In some embodiments, at least 45% (eg, at least about 50%, at least about 55%, at least about 60%, at least about) the total amount of light generated by the light generating zone 130 exiting the LED 100. 70%, at least about 80%, at least about 90%, at least about 95%) exit through the surface 110.

In certain embodiments, the cross-sectional area of LED 100 is relatively large, but still exhibits efficient light extraction from LED 100. For example, one or more edges of LED 100 may be at least about one millimeter (eg, at least about 1.5 millimeters, at least about 2 millimeters, at least about 2.5 millimeters, at least about 3 millimeters), At least about 45% (eg, at least about 50%, at least about 55%, at least about 60%, at least about 70%, at least about 80%, at least about 90%, at least) of the total amount of light generated by 130). About 95%) exit through surface 110. This may allow the LED to exhibit a good power conversion efficiency while at the same time having a relatively large cross section (eg, at least about 1 millimeter by at least about 1 millimeter).

In some embodiments, the extraction efficiency of the LED with the design of the LED 100 is substantially independent of the length of the edge of the LED. For example, the extraction efficiency of an LED having a design of LED 100 and having one or more edges having a length of about 0.25 millimeters and an LED having a design of LED 100 and having one or more edges having a length of one millimeter The difference between extraction efficiencies can vary by less than about 10% (eg, less than about 8%, less than about 5%, less than about 3%). As referred to herein, the extraction efficiency of the LED is the ratio of the light emitted by the LED to the amount of light generated by the device (which can be measured in energy or photons). This may allow the LED to exhibit a good power conversion efficiency while at the same time having a relatively large cross section (eg, at least about 1 millimeter by at least about 1 millimeter).

In certain embodiments, the quantum efficiency of an LED with the design of LED 100 is substantially independent of the length of the edge of the LED. For example, the quantum efficiency of an LED having a design of the LED 100 and having one or more edges having a length of about 0.25 millimeters and the LED having a design of the LED 100 and having one or more edges having a length of one millimeter The difference between quantum efficiencies can vary by less than about 10% (eg, less than about 8%, less than about 5%, less than about 3%). As referred to herein, the quantum efficiency of an LED is the ratio of the number of photons generated by the LED to electron-hole recombination that occurs in the LED. This may allow the LED to exhibit a good power conversion efficiency while at the same time having a relatively large cross section (eg, at least about 1 millimeter by at least about 1 millimeter).

In some embodiments, the wall plug efficiency of an LED with the design of the LED 100 is substantially independent of the length of the edge of the LED. For example, a wall plug efficiency of an LED having a design of LED 100 and having one or more edges having a length of about 0.25 millimeters and an LED having one or more edges having a design of LED 100 and having a length of one millimeter The difference between the wall plug efficiencies of may vary by less than about 10% (eg, less than about 8%, less than about 5%, less than about 3%). As referenced herein, the wall plug efficiency of an LED is determined by the injection efficiency of the LED (ratio of the number of carriers injected into the device relative to the number of carriers recombining in the device's photo-generating zone), the radiation efficiency of the LED (electron-hole recombination The ratio of the electron-hole recombination that caused the emission event to the total number of and the extraction efficiency of the LED (the ratio of photons extracted from the LED to the total number of photons generated). This may allow LEDs to exhibit good power conversion efficiency while at the same time having a relatively large cross section (eg, at least about 1 millimeter by at least about 1 millimeter).

In some embodiments, it may be desirable to manipulate the angular distribution of light exiting the LED 100 via the surface 110. Fourier transform of genetic function spatially varying (as described above) with pattern 150 to increase extraction efficiency at a given solid angle (e.g., solid angle around a direction perpendicular to surface 110) Check it. Figure 43 shows a Fourier transform configuration for two ideal triangular gratings of different grating constants. In order to increase the light extraction efficiency, an attempt is made to increase the scattering intensity of the G point ε _G in the material light line and the number of G points in the encapsulant light line. This will include increasing the NND to achieve the effect shown in FIG. However, there is interest here in increasing the extraction efficiency into a solid angle centered around the tangential direction. Thus, it is also intended to limit the introduction of higher order G points by reducing the radius of the encapsulant light line, such as the size of G> (ω (n _e )) / c. By reducing the refractive index of the encapsulant (nearly the minimum is to remove all encapsulant together), it allows for greater NND and thus simultaneously avoids diffraction into higher orders (inclined angles) in the encapsulant, while the normal direction (F _{k = 0)} It can be seen that increasing the number of G points inside the material light line, which may contribute to the extraction into N). The above trend showing the extraction efficiency into the solid angle is shown in FIG. 44 (given by the collection half angle in the diagram). The data shown in Fig. 44 shows that the emitted light had a peak wavelength of 530 nm and a bandwidth of 34 nm, the refractive index of the encapsulant was 1.0, the thickness of the p-doped layer was 160 nm, and the light generating layer was 30 nm. Thickness, and the NND (a) for the three curves is shown in Figure 44, and the depth, hole diameter and thickness of the n-doped layer are 1.27a, 0.72a and 1.27a ± 40 nm, respectively, when accumulated to a. Except for the calculation, the parameters given for the LED 100 shown in FIG. As the lattice constant increases, the extraction efficiency at narrow angles increases with the overall extraction efficiency into all angles. However, for larger lattice constants, diffraction into higher order modes in the encapsulant limits the extraction efficiency at narrow angles when the overall extraction efficiency is increased within all angles. For the lattice constant of 460 nm, we calculated extraction efficiencies greater than 25% into a 30 ° collection half angle. That is, about half of the extracted light was collected only within 13.4% of the upper half of the solid angle, demonstrating the collimation effect of the pattern. Any pattern that increases the number of G points inside the material light line while limiting the number of G points inside the encapsulant light line from k = 0 to only the G points results in extraction efficiency within the solid angle centered around the normal direction. It is believed that it can be improved.

The approach can be particularly applied to reduce source extension, which is often believed to be proportional to n ² , where n is the refractive index of the surrounding material (eg, encapsulant). Reducing the reflectance of the encapsulant layer of LED 100 thus leads to more collimated emission, lower source extension, and thus higher surface brightness (defined here as the total lumen extracted into the extension of the source). In some embodiments, using air encapsulant will reduce source extension and increase extraction efficiency within a given collection angle centered around the normal direction.

In certain embodiments, when light generated by zone 130 exits LED 100 via surface 110, the distribution of light is more collimated than the Lambertian distribution. For example, in some embodiments, when light generated by zone 130 exits LED 100 via surface 110, at least about 40% of the light exiting through the surface of the dielectric layer (eg, At least about 50%, at least about 70%, at least about 90%) within a maximum of 30 ° (eg, at most about 25 °, at most about 20 °, at most about 15 °) at an angle perpendicular to the surface 110. Comes out.

The ability to extract relatively high percentages of light from only the desired angle or in combination with relatively high light extraction may allow a relatively high density of LEDs to be prepared on a given wafer. For example, in some embodiments, the wafer has at least about 5 LEDs (eg, at least about 25 LEDs, at least about 50 LEDs) per square centimeter.

In some embodiments, it may be desirable for the light coming from the packaged LED 100 to modify the wavelength (s) as compared to the wavelength (s) of light generated by the light generating region 130. For example, as shown in FIG. 45, an LED 300 containing phosphor material 180 may be disposed on surface 110. Phosphor material may interact with light at the wavelength (s) generated by zone 130 to provide light at the desired wavelength (s). In some embodiments, it may be desirable for the light coming from packaged LED 100 to be substantially white light. In such embodiments, the phosphor material in layer 180 may be formed of, for example, (Y, Gd) (Al, Ga) G: Ge ³⁺ or “YAG” (yttrium, aluminum, garnet) phosphors. When pumped by the blue light emitted from the photogeneration zone 130, the phosphor material in layer 180 is activated to emit (eg, isotropically) light having a broad spectrum centered around the yellow wavelength. Can be. Observers of the entire light spectrum coming from the packaged LED 100 see the broad emission spectrum of the yellow phosphor and the narrow emission spectrum of the blue InGaN and typically mix the two spectra to detect white.

In certain embodiments, layer 180 may be disposed substantially uniformly on surface 110. For example, the distance between the top 151 of the pattern 150 and the top 181 of the layer 180 is less than about 20% (eg, less than about 10%, less than about 5% across the surface 110). , Less than about 2%).

In general, the thickness of layer 180 is small when compared to the cross-sectional dimension of surface 130 of LED 100, which is typically about 1 millimeter (mm) × 1 mm. Since layer 180 is deposited substantially uniformly on surface 110, the phosphor material in layer 180 may be pumped substantially uniformly by light exiting surface 110. The phosphor layer 180 is relatively thin compared to the dimensions of the surface 110 of the LED 100 such that the light emitted by the light generating zone 130 is approximately uniform over the entire surface 110 of the LED 100. Inside the phosphor layer 180 is converted to light of low wavelength. Thus, the relatively thin and uniform phosphor layer 180 produces a uniform spectrum of white light emitted from the LED 100 as a function of position on the surface 110.

In general, the LED 100 can be manufactured as desired. Fabrication of LEDs 100 typically includes various deposition, laser processing, lithography, and etching steps.

For example, FIG. 46 shows an LED wafer 500 containing a stack of LED layers of material stacked on a substrate (eg, sapphire, compound semiconductor, zinc oxide, silicon carbide, silicon) 502. Such wafers are commercially available. Exemplary commercial suppliers include Epistar Corporation, Arima Optoelectronics Corporation, and South Epitaxy Corporation. On the substrate 502, a buffer layer 504 (e.g., a nitride containing layer such as a GaN layer, an AlN layer, an AlGaN layer), an n-doped semiconductor layer (e.g., an n-doped Si: GaN) layer 506, current diffusion layer 508 (eg, AlGaN / GaN heterojunction or superlattice), light emitting zone 510 (eg, InGaN / GaN multiple quantum well zone), and semiconductor layer 512 ( For example, p-doped Mg: GaN layers) are stacked successively. Wafer 500 generally has a diameter of at least about 2 inches (eg, about 2 inches to about 12 inches, about 2 inches to about 6 inches, about 2 inches to about 4 inches, about 2 inches to about 3 inches) Has

Figure 47 includes layers 502, 504, 506, 508, 510, 512, as well as layers 520, 522, 524, 526, formed of a material that can be pressure and / or thermally bonded as described below. The multilayer stack 550 is shown. For example, layer 520 may be a nickel layer (eg, electron-beam deposited), layer 522 may be a silver layer (eg, electron-beam deposited), and layer 524 may be a nickel layer ( For example, electron-beam deposited), and layer 526 may be a gold layer (eg, electron-beam deposited). In some embodiments, layer 520 may be a relatively thin layer and layer 524 may be a relatively thick layer. Layer 524 may serve as a diffusion barrier to reduce diffusion of contaminants (eg, gold) into, for example, layers 520, 522 and / or layer 524 itself. After lamination of layers 520, 522, 524, 526, the multilayer stack 520 may be processed to achieve ohmic contacts. For example, stack 550 may be annealed (e.g., for example, from about 30 seconds to about 300 seconds) in a suitable gaseous environment (e.g., nitrogen, oxygen, air, forming gas). At a temperature of about 400 ° C. to about 600 ° C.).

48 shows a submount (eg, germanium (such as polycrystalline germanium)), silicon (such as polycrystalline silicon), silicon carbide, copper, copper—with layers 604, 606, 608, 610 stacked thereon. Tungsten, diamond, nickel-cobalt) 602 is shown. The submount 602 may be formed by, for example, sputtering or electroforming. Layer 604 is a contact layer and may be formed, for example, from aluminum (eg, electron deposited). Layer 606 is a diffusion barrier and may be formed, for example, from Ni (eg, electron deposited). Layer 608 may be a gold layer (eg, electron-beam deposited) and layer 610 may be an AuSn junction layer (eg, thermally deposited or sputtered) onto layer 608. have. After lamination of layers 604, 606, 608, 610, the multilayer stack 600 may be processed to achieve ohmic contacts. For example, stack 600 may be annealed (e.g., in a suitable gaseous environment (e.g., nitrogen, oxygen, air, forming gas) for a predetermined time (e.g., from about 30 seconds to about 300 seconds). At a temperature of about 350 ° C. to about 500 ° C.).

Figure 49 illustrates a multilayer stack 650 formed by bonding layers 526 and 610 together (e.g., using solder bonding, using eutectic bonding, and using positive bonding). . Layers 526, 610 may be joined using, for example, thermo-mechanical pressing. For example, after contacting layers 526, 610, multilayer stack 650 may be placed in a press to be pressurized (eg, using a pressure up to about 5 MPa, up to about 2 MPa) to be heated. (Up to a temperature of about 200 ° C. to about 400 ° C.). Stack 650 may then be cooled (eg to room temperature) and removed from the press.

Substrate 502 and buffer layer 504 are then at least partially removed from stack 650. In general, this can be achieved using any desired method. For example, as shown in FIG. 50, in some embodiments, the substrate 502 is subjected to a stack 650 (e.g., substrate ( And through surface 501 of 502). This causes local heating of the layer 504, causing partial decomposition of the material of the layer 504 adjacent to the boundary of the layer 504 and the substrate 502, whereby the substrate 502 is removed from the stack 650. It is believed to allow removal of. For example, in an embodiment where layer 504 is formed by gallium nitride, it is believed that a configuration comprising gallium and nitrogen gas is formed. In some embodiments, stack 650 may be heated during exposure of surface 501 of the electromagnetic radiation (eg, to reduce strain inside stack 650). Stack 650 may be heated by placing stack 650 on, for example, a hot plate and / or exposing stack 650 to an additional laser source (eg, a CO ₂ laser). Heating the stack 650 during exposure of the surface 501 to the electromagnetic radiation may reduce (eg, prevent) re-solidification of the liquid gallium, for example. This may reduce the accumulation of strain inside the stack 650 that occurs upon resolidification of gallium.

In certain embodiments, residual gallium is present after exposure to electromagnetic radiation and the substrate 502 remains bonded within the stack 650. In such an embodiment, stack 650 may be heated above the gallium melting point to allow substrate 502 to be removed from the stack. In some embodiments, stack 650 may be exposed to a caustic (eg, a chemical caustic such as HCl) to corrode residual gallium and remove substrate 502. Other methods of removing residual gallium (eg, physical methods) may be used.

By way of example, in certain embodiments, surface 501 is exposed to laser radiation comprising an absorption wavelength (eg, about 248 nanometers, about 355 nanometers) of layer 504. Laser radiation processes are disclosed, for example, in US Pat. Nos. 6,420,242 and 6,071,795, which are incorporated herein by reference. The multilayer stack is then heated above the melting point of gallium, at which the substrate 502 and buffer layer 504 exert lateral forces on the substrate 502 (e.g., using curtain swaps). Is removed from the stack).

In some embodiments, multiple portions of surface 501 are simultaneously exposed to electromagnetic radiation. In some embodiments, multiple portions of surface 501 are sequentially exposed to electromagnetic radiation. Combinations of simultaneous or sequential exposures can be used. In addition, electromagnetic radiation can be applied in the form of patterns (e.g., sinuous patterns, circular patterns, spiral patterns, grids, grids, triangle patterns, basic patterns, random patterns, complex patterns, periodic patterns, aperiodic patterns). 501). In some embodiments, electromagnetic radiation may be rastered over one or more portions of surface 501. In some embodiments, surface 501 is exposed to an overlapping field of electromagnetic radiation.

In some embodiments, electromagnetic radiation passes through the mask before reaching the surface 501. By way of example, electromagnetic radiation may pass through an optical system that includes a mask (eg, a high thermal conductivity mask such as a molybdenum mask, a copper-beryllium mask) before reaching the surface 501. In some embodiments, the mask is an opening (eg, for cutting or shaping the beam). The optical system may include at least two lenses with a mask disposed therebetween, for example. As another example, the mask may be formed as a pattern of material on surface 501, with the mask exposing some portion of surface 501 and leaving some portions of surface 501 unexposed. Such a mask can be formed, for example, via a lithography process. In some embodiments, electromagnetic radiation may be rastered through one or more portions of the mask.

Without wishing to be bound by theory, reducing at least one dimension of a region on a surface 501 exposed to electromagnetic radiation within a given region of the surface 501 may not be sufficient between the substrate 502 and the buffer layer 504. It is believed that while still allowing crack propagation at the boundary of, it may limit unwanted crack propagation, such as layer 504, layer 506 or other layers of stack 650 during removal of substrate 502. If the size of the composition of electromagnetic radiation on the surface 501 is too large, it is believed that gaseous bubbles (eg, nitrogen bubbles) may be formed that can create localized pressures that cause unwanted cracks. . For example, in embodiments where the surface 501 is exposed to laser radiation forming a spot or line on the surface 501, the maximum of at least one dimension of the spot or line may be at most about one millimeter (eg, At most about 500 microns, at most about 100 microns, at most about 25 microns, at most about 10 microns). In some embodiments, the spot size is from about 5 microns to about 1 millimeter (eg, from about 5 microns to about 100 microns, from about 5 microns to about 25 microns, from about 5 microns to about 10 microns).

In certain embodiments, stack 650 is vibrated while surface 501 is exposed to electromagnetic radiation. Without wishing to be bound by theory, it is believed that oscillating the stack 650 while exposing the stack 650 to electromagnetic radiation can improve crack propagation along the boundary between the layer 504 and the substrate 502. Lose. In general, conditions are selected to limit the propagation of cracks into layer 504 (eg, substantially no crack propagates into the rest of layers 504 and 506 and stack 650).

After removal of the substrate 502, a portion of the buffer layer 504 typically remains on at least a portion of the surface of the layer 506. Residues of the material (eg, containing aluminum and / or oxygen) from the substrate 502 may also be present on the remainder of the buffer layer 504 and / or on the surface of the layer 506. . Removing the remainder of the buffer layer 504 and any residue from the substrate 502, exposing the surface of the layer 506 and clearing the exposed surface of the layer 506, the layer 506 (Typically formed of n-doped semiconductor material) is generally preferred because it can exhibit good electrical properties (eg, desirable contact resistance) for subsequent formation of electrical contacts. One or more treatment steps remove any residue and / or remaining portions of the buffer layer 504 and clean the surface of the layer 506 (e.g., impurities such as organics and / or particles). To remove) is commonly used. The process (es) may be performed using various techniques and / or combinations of techniques. Examples include chemical mechanical polishing, mechanical polishing, reactive ion etching (eg, having substantially chemically etching components), physical etching, and wet etching. Such a method is disclosed, for example, in Ghandhi, S. VLSI Manufacturing Principle: Silicon & Gallium Arsenide (1994), incorporated herein by reference. In certain embodiments, buffer layer 504 is not completely removed. Instead, in this embodiment these processes may be used to remove only on portions of the buffer layer 504 that correspond to the locations where electrical leads are to be subsequently placed (eg, using self alignment processes). .

Often, when the substrate 502 is removed, the amount of deformation in the stack 650 (eg, due to lattice mismatch and thermal mismatch between the layers in the stack 650) may change. For example, if the amount of strain in stack 650 is reduced, the peak output wavelength of region 510 may be changed (eg, increased). As another example, if the amount of strain in stack 650 is increased, the peak output wavelength of region 510 may change (eg, decrease).

In order to limit undesirable cracking during removal of the substrate 502, in some embodiments, the coefficient of thermal expansion of both substrates 502, the coefficient of thermal expansion of the submount 602, layers 504, 506, 508, 510, 512 ), And / or the coefficient of thermal expansion of the layers 504, 506, 508, 510, 512. For example, in some embodiments, the substrate 502 such that the coefficient of thermal expansion of the submount 602 differs from the coefficient of thermal expansion of the substrate 502 by less than about 15% (eg, less than about 10%, less than about 5%). ) And submount 602 are selected. As another example, in some embodiments, the substrate 502 and the submount 602 are selected such that the thickness of the submount 602 is substantially greater than the thickness of the substrate 502. As an additional example, in some embodiments, the semiconductor layers 504, 506, 508, 510, 512 and the submount 602 may have a coefficient of thermal expansion of the submount 602 in one or more layers 504, 506, 508, 510. Semiconductor layer 504, 506, 508, 510, 512 and submount 602 are selected to differ from the coefficient of thermal expansion of 512 by less than about 15% (eg, less than about 10%, less than about 5%). do.

In general, substrate 502 and submount 602 may have any desired thickness. In some embodiments, the substrate 502 is at most about 5 millimeters (eg, at most about 3 millimeters, at most about 1 millimeter, at most about 0.5 millimeters) thick. In some embodiments, submount 602 is up to about 10 millimeters (eg, up to about 5 millimeters, up to about one millimeter, about 0.5 millimeters) thick. In some embodiments, submount 602 is thicker than substrate 502, and in some embodiments, substrate 502 is thicker than submount 602.

After removing the buffer layer 504 and exposing / cleaning the surface of the layer 506, the thickness of the layer 506 can be reduced to the desired final thickness for use in the light emitting device. This can be achieved, for example, using only a mechanical etching treatment or in combination with the etching treatment. In some embodiments, after etching / cleaning the exposed surface of layer 506, the surface of layer 506 may have a relatively high degree of flatness (eg, a relatively high degree of flatness at the scale of the lithographic reticle to be used). Have For example, in some embodiments, after etching / cleaning the exposed surface of layer 506, the surface of layer 506 may be up to about 10 microns per 6.25 square centimeter (eg, up to about 5 per 6.25 square centimeter). Microns, flatness of up to about 1 micron per 6.25 square centimeters). As another example, in some embodiments, after etching / cleaning the exposed surface of layer 506, the surface of layer 506 may be up to about 10 microns per square centimeter (eg, up to about 5 microns per square centimeter). , Up to about 1 micron per square centimeter). In some embodiments, after etching / cleaning the exposed surface of layer 506, the surface of layer 506 may be up to about 50 nanometers (eg, up to about 25 nanometers, up to about 10 nanometers, up to RMS roughness of about 5 nanometers, up to about 1 nanometer).

In some embodiments, prior to forming a spatially varying dielectric function according to the pattern within the surface of layer 506, the exposed surface of layer 506 is too rough and / or insufficiently flat to provide sufficient accuracy and / or reproducibility. Nanolithography for forming a pattern having To improve the ability to form a pattern accurately and / or reproducibly within the surface of the layer 506, nanolithography treatment deposits a planarization layer on the surface of the layer 506 and a lithographic layer on the surface of the planarization layer. It may also include. For example, Figure 51 shows that after planarization layer 702 is disposed on the surface of layer 506 and lithographic layer 704 is disposed on the surface of layer 702, and after cleaning / etching layer 506 An embodiment is shown where the exposed surface 505 of layer 506 may be relatively rough (eg, an RMS roughness of about 10 nanometers or more). In some embodiments, planarization layer 702 is formed of multiple layers (eg, the same material) stacked sequentially.

Examples of materials from which planarization layer 702 can be selected include polymers (eg, DUV-30J from Brewer Science, antireflective coatings, high viscosity moldable polymers), and lithography layer 704 selected. Examples of materials that can be include UV-curable polymers (eg, low viscosity MonoMat ^™ available from Molecular Imprints, Inc.). Layers 702 and 704 may be formed using any desired technique, for example, spin coating, deposition, or the like.

Layer 702 may be, for example, at least about 100 nanometers thick (eg, at least about 500 nanometers thick), and / or up to about 5 micron thick (eg, up to about 1 micron thick). Layer 704 may be, for example, at least about 1 nanometer thick (eg, at least about 10 nanometers thick), and / or up to about 1 micron thick (eg, up to about 0.5 micron thick).

The mold defining a portion of the desired pattern is then pressed into the lithography layer (typically by heating or UV-curing the mold and / or layer 704) and corresponding layer in the surface of the layer 506. Advances across the surface of layer 704 in a portionion-by-portion manner to form indentations in 704 (FIG. 52). In some embodiments, a single step covers the entire wafer (eg, whole wafer nanolithography technique). Layer 704 is then etched (e.g., using reactive ion etching, wet etching) to the exposed portion of the surface of layer 702 corresponding to what was an indented portion of layer 704 (FIG. 53). do. Examples of such imprint / etching processes are described, for example, in US Pat. No. 5,722,905 and Zhang et al., Applied Physics Letters Vol. 83, No. 8, pp. 1632-34, both of which are incorporated herein by reference. Typically, the pattern in layer 704 also leaves a region for laminating n-contacts later or in the process flow. In alternative embodiments, other techniques (e.g., x-ray lithography, deep ultraviolet lithography, extreme ultraviolet lithography, immersion lithography, interference lithography, electron beam lithography, photolithography, microcontact printing, self-assembly techniques) may be performed by layer 704. Can be used to create a pattern.

As shown in Figure 54, the patterned layer 704 is used as a mask for transferring the pattern into the planarization layer 702 (e.g., dry etching, wet etching). An example of a dry etching method is reactive ion etching. Referring to Figure 55, layers 702 and 704 are then used as masks to transfer the pattern into the surface of layer 506 (e.g., using dry etching, wet etching). As shown in FIG. 56, following the etching of the layer 506, the layers 702 and 704 are removed (for example, by using an oxygen-based reactive ion etching solution or a wet solvent etching solution).

Referring to FIG. 57, in some embodiments, the treatment is performed on the etched portions (eg, by deposition) of the layers 702, 704 and on the surface of the layer 704 (eg, on the surface of the layer 704). , Metals such as aluminum, nickel, titanium, tungsten). As shown in Figure 58, layers 702 and 704 are then etched (e.g., reactive ion etching, wet etching), which can act as a mask for etching the pattern into the surface of layer 506. Etch resistant material 708 is left on the surface of 506 (FIG. 59). Referring to Figure 60, etch resistant material 708 may then be removed (using etching, wet etching).

In some embodiments, after the treatment forms an indent in layer 704, an etch resistant material (eg, Si-doped polymer) on the surface of layer 704 and in the indent of layer 704 ( 710 may be disposed (eg, spin coated), and the material 710 is etched back to expose the surface of the layer 704 while maintaining the etch resistant material in the indentation in the layer 704. (E.g., using dry etching). As shown in Figure 62, portions of layers 702 and 704 are then etched (e.g., using reactive ion etching, wet etching), and a mask for etching the pattern into the surface of layer 506. It leaves behind the etch resistant material 710 and portions of the layers 702 and 704 underneath the material 710 that can act as (FIG. 63). Referring to FIG. 64, not only the etch resistant material 710 but the remaining portions of the layers 702 and 704 can then be removed (eg, using reactive ion etching, dry etching, wet etching). In some embodiments, removing layer 708 may include the use of a plasma treatment (eg, fluorine plasma treatment).

After the pattern is transferred to the n-doped layer 506, a layer of phosphor material may be selectively disposed onto the patterned surface of the n-doped layer 506 (eg, spin coated). . In some embodiments, the phosphor may be coated consistent with the patterned surface (coated substantially free of voids along the bottom and sidewalls of the openings in the patterned surface). Alternatively, a layer of encapsulant material may be disposed on the surface of the patterned n-doped layer 506 (eg, by CVD, sputtering, and then suspending with the deposited liquid binder). ). In some embodiments, the encapsulant may contain one or more phosphor materials. In some embodiments, the phosphor may be compressed to achieve thickness uniformity of less than about 20%, less than about 15%, less than about 10%, less than about 5%, less than about 2% of the average thickness of the phosphor. In some embodiments, the phosphor-containing encapsulant can uniformly coat the patterned surface.

After the dielectric function pattern is created in the n-doped layer 506, individual LED dice can be cut from the wafer. Once wafer processing and wafer testing are complete, the individual LED dice are separated and ready for packaging and testing. Sidewall passivation steps and / or pre-separation deep mesa etching steps may be used to reduce potential damage to the electrical and / or optical properties of the patterned LEDs that occur during wafer cutting. The individual LEDs can be of any size up to the size of the wafer itself, but the individual LEDs are square or rectangular with sides between about 0.5 mm and 5 mm in length. Standard photolithography is used to define the location of the contact pads on the wafer to power the device to create a die, and ohmic contacts are deposited onto the desired location (e.g., using electron beam deposition). .

Although specific embodiments of manufacturing the LED 100 are described, other manufacturing methods may also be used. For example, in some embodiments LED 100 may be formed on a single mesa (eg, separate from other mesas including other LEDs or other devices).

65 shows an LED wafer 2000 comprising a multilayer stack having a substrate 2008, a layer 2006, a layer 2004, and a layer 2002. Substrate 2008 may be generally described above with respect to substrate 500, and layers 2006, 2004, and 2002 may each be generally described above with respect to layers 506, 510, and 512, respectively.

66 shows a multi-layer stack 2010 comprising layers 2002, 2004, 2006 and substrate 2008 as described above. The multilayer stack 2010 also includes a patterned resist layer 2012. Patterned resist layer 2012 provides a mask for selective material stacking (eg, metal stacking). Patterned resist layer 2012 may also form a repetitive pattern (eg, square, rectangular, circular, hexagonal or other desired shape) that determines the resulting cross-sectional shape of the LED formed from the mesa.

67 shows a multi-layer stack 2016 comprising a multi-layer stack 2010 and layers 2018, 2020. As shown in FIG. For example, layers 2018 and 2020 may be metal layers stacked onto the top surface of multi-layer stack 2010. Layers 2018 and 2020 are generally selected to be able to form and bond contacts to the p-doped GaN layer 2002. For example, layer 2020 forms a contact and a p-contact metal layer (e.g., Ni, indium-tin-oxide (ITO), Ag, Al, Ti, Cu, Rh, Pt, or alloys thereof). ) And a mirror layer (eg, Ag, Al, ITO, Cu, W, Pt, TiN or alloys thereof). In addition, a diffusion layer (eg, Pt or Ti-N) may also be included to prevent or limit diffusion or chemical reactions between any metals in the layered stack. For example, the diffusion layer can prevent the relatively fast diffusion of Sn from the bonding layer. In addition, various adhesive layers (e.g., Ti) may be laminated to assist in sticking between the various layers of the multilayer stack. Layer 2018 may generally be selected based on bonding properties and serves as a bonding boundary layer. For example, layer 2018 may comprise Au, Ag, AgSn, Au-Sn, Pb-Sn, Pd-In or Au-Ge. Layers 2018 and 2020 can be deposited using a variety of metal deposition processes (eg, e-beam, sputtering, heat / resistance deposition or electroplating). In some embodiments, layer 2018 is deposited using sputtering techniques and layer 2020 is deposited using e-beam processing. In addition, a diffusion layer (eg, Pt or Ti-N) may be included. The diffusion layer can prevent or limit the diffusion or chemical reaction between any metal in the layered stack. In addition, various adhesive layers (eg Ti) can be laminated to assist adhesion between the various layers of the multilayer stack.

Figure 68 illustrates a region where layers 2018 and 2020 are supported by patterned resist layer 2012 and patterned resist layer 2012 (e.g., layer of resist is layer 2020 and layer 2002). The multi-layer stack 2024 formed by performing a liftoff process on the multi-layer stack 2016 to remove the zones stacked in between). The metal layers 2018, 2020 deposited in the areas that do not have a resist layer (eg, the areas where the resist is patterned and removed before lamination of the layers 2018, 2020) so that the metal is deposited onto the layer 2002 remain. . Thus, metal layers 2018 and 2020 form a negative image of the resist pattern on the surface of the multilayer stack 2024.

FIG. 69 shows a multilayer stack 2026 formed by depositing a resist layer 2028 over a region of the multilayer stack 2024. Resist layer 2028 extends beyond the edges of metal layers 2018 and 2020 and masks metal layers 2018 and 2020 during subsequent etching.

70 shows a multilayer stack 2030 including mesas 2032 supported by substrate 2008. Mesa 2032 may be formed, for example, by etching the etch layers 2002, 2004, 2006 of multilayer 2026 to transfer patterns of metal layers 2018, 2020 into multilayer stack 2026. For example, mesa 2032 is etched using a chlorine based etchant containing Cl ₂ , Ar, BCl _3, or SiCl ₄ . The height of mesa 2032 is determined by the thickness of the initial multilayer stack 2000 and the deposited layers 2018, 2020. For example, mesa 2032 may be at least about 1 mm high (eg, at least about 2 mm high, at least about 3 mm high, at least about 4 mm high, at least about 5 mm high, at least about 6 mm high, at least About 7 mm high, at least about 8 mm high, at least about 9 mm high, at least about 10 mm high). Etching the layers 2002, 2004, 2006 forming the mesa 2032 may increase the flexibility of the wafer including the multilayer stack 2030 and the mesa 2032. The increased flexibility of the wafer may provide an advantage when bonding the multilayer stack 2030 to a submount as described below. Etching of layers 2002, 2004, 2006 to form mesa 2032 may form a connected network of channels in a wafer including multilayer stack 2030 and mesa 2032. The connected network of channels in the wafer may also provide an advantage in bonding the multilayer stack 2030 to a submount as described below.

71 shows a multilayer stack 2036 including mesas 2035 supported by substrate 2008. Mesa 2035 is formed by removing resist layer 2028 from mesa 2032. The upper surface of layer 2018 may be prepared for bonding. For example, the surface of layer 2018 is chemically cleaned, mechanically cleaned or treated with plasma, chemical or gas to prepare the layer for bonding.

FIG. 72 shows a multilayer stack 2038 including a submount 2042 with stacked bonding layers 2040. Multilayer stack 2038 may include layers similar to the layers in multilayer stack 600 shown in FIG. 48 and may be formed using processes similar to those described above. In some embodiments, the submount can include solder (eg, AgSn solder, Au-Sn solder, Pb-Sn solder, Pd-In solder, or Au-Ge solder).

FIG. 73 illustrates a multilayer stack 2046 formed by bonding layers 2018 of multilayer stack 2036 to layers 2040 of multilayer stack 2038. Layers 2018 and 2036 can be joined using, for example, a thermo mechanical pressing process. Various temperatures and pressures can be selected as described above for the processing shown in FIG. The increased flexibility of the wafer due to mesa 2035 allows a large degree of tolerance in the wafer bow and flatness of the bonded wafer. The space between the mesas 2035 may allow gas trapped at the junction boundary to diffuse into the etched channel between the mesas 2035, thus allowing void formation in the junction layer due to the gas trapped at the junction boundary. Potentially reduced. Without wishing to be bound by theory, it is believed that pore formation can reduce the thermal conductivity of the bonding layer and reduce the efficiency of the light emitting device.

74 and 75 show the exposure of the bonded multilayer stack 2046 and removal of the substrate 2008 to electromagnetic radiation (indicated by arrow 2048). Exposure to electromagnetic radiation 2048 and removal of substrate 2008 are similar to the treatment described above. Although not shown in FIGS. 65 and 64, in some embodiments, a semiconductor layer (eg, similar to that described above with respect to layer 504) may be disposed between substrate 2008 and layer 2006. have. In such embodiments, exposure to electromagnetic radiation 2048 at least partially degrades the semiconductor layer between substrate 2008 and layer 2006 such that substrate 2008 can be removed. In a particular embodiment, no semiconductor layer is present between layer 2006 and substrate 2008 and a portion of layer 2006 is decomposed by radiation 2048.

Degradation of the semiconductor material during exposure to electromagnetic radiation can cause deformation in the multilayer stack. In addition, gas (eg, nitrogen) can be formed as a product of decomposition. If this gas is trapped in the decomposed layer, in particular, it may cause deformation, and if the deformation is large enough, cracking or other undesirable consequences may occur. The presence of the zones between mesas 2035 allows gas to accumulate from the mesas 2035 and accumulate in the space between the etched channels or mesas 2035 (also called gas accumulation zones). Diffusion and leakage of gases that would otherwise be trapped can reduce strain in the multilayer stack during decomposition of the semiconductor layer. In some embodiments, the channel between mesas 2035 forms a network of channels across the wafer, allowing gas to leak from the channel through openings extending to the edge of the wafer.

After disassembly of the semiconductor layer, the substrate 2008 is removed to form a multilayer stack 2050 that includes a submount 2042 supporting the transferred mesa 2053 (FIG. 75). After transfer of mesa 2053 from substrate 2008 to submount 2040, an n-doped region contained in layer 2006 is located near the top of mesa 2053. After removal of substrate 2008 or a portion of substrate 2008, residue 2052 may remain in mesa 2053 (see above described with respect to FIGS. 51 and 52). As shown in FIG. 76, one or more steps may be used to remove layer 2052 and clean the surface of layer 2006 to produce mesa 2055. A method of removing the residue 2052 is described with reference to FIGS. 61 and 32. The top surface of the layer 2006 of mesa 2055 is then at least about 10 percent (eg, at least about 20 percent, at least about 30 percent, at least about 40 percent, at least about 10 percent of the total number of mesas 2055). 50 percent, at least about 60 percent, at least about 70 percent, at least about 80 percent, at least about 90 percent). Alternatively, all mesas 2055 on the wafer can be patterned. In some embodiments, the LED forming process is similar to the process described above and may include variations in processing as described above. In general, at least one hard mask layer 2060 (eg, low temperature oxide (LTO), SiO ₂ , oxide, SiNx, Ni, chromium) is deposited or grown on mesa 2055. Resist layer 2058 is stacked over at least one hardmask layer 2060 to form a multilayer stack 2056 as shown in FIG. The pattern is imprinted into resist layer 2058 using an imprint process as described above. The imprint process may be mesa-specific process (eg, the pattern is imprinted into one mesa and then the mold 2062 is moved to another mesa and the pattern is imprinted into another mesa). If mesa-specific processing is used, mold 2062 may be aligned with mesa 2063 to determine the orientation and height of mesa 2063 prior to imprint. Optionally, other lithography techniques can be used to pattern the surface.

Although embodiments have been described in which rigid mold 2062 is used, alternatively flexible masks or molds that match the mesa shape during patterning may be used. The matchable mask may comprise a layer such as a membrane or other material that is flexible. For example, a Ni layer with a thickness between approximately 0.5 mm and 100 mm can be used. During the patterning of layer 2058 using the flexible mold, the mold conforms to the surface of the mesa and transfers the pattern into the surface of the layer 2058 of one or more mesas. For example, the flexible mold can be larger than the wafer and all mesas can be patterned in a single step. Thanks to the flexibility of the mold, the difference in mesa height across the wafer can be adjusted without having to align the mask to the individual mesas. Additionally, submount 2042 may be comprised of a flexible material such as metal (eg, CuW) such that both the submount 2042 and mold including mesa 2055 are curved or matched during imprint. To allow.

The pattern in resist layer 2058 (shown in FIG. 79) is transferred into at least one hardmask layer 2060 and a portion of layer 2006 using, for example, the method described above. Various patterns, such as those described above, can be used to pattern the layer 2006.

The remaining portions of layers 2058 and 2060 are removed and the contact layers are subsequently stacked. FIG. 81 shows a multilayer stack 2066 comprising a patterned surface of layer 2006 and stacked contact layers 2068, 2070. Contact layers 2068 and 2070 may be stacked as described above. Contact layer 2070 facilitates ohmic contact with layer 2006. In some embodiments, contact layer 2070 consistently coats the pattern in layer 2006. Layer 2006 (e.g., Al, Ti, Ni, indium-tin-oxide (ITO), Ag, Cu, Rh, Pt, or alloys thereof) may also include one or more adhesive layers (e.g. Ti) And / or one or more diffusion barriers (eg, Ni, Ti-N, Pt). Without wishing to be bound by theory, it is believed that contact layer 2068 (eg, Au, Al, Ag) facilitates current spreading and reduces ohmic heating along the contact layer. Optionally, the contact layer can be deposited before the patterning step described above with respect to FIGS. 77-79. In embodiments in which contact layers are stacked prior to patterning, the patterned region of layer 2006 is separated from the contact regions. In some embodiments, the ohmic contact stacking and patterning steps are self aligned.

FIG. 82 shows separate devices 2072a, 2072b separated from other devices supported by submount 2042 by scribing and cleaving process, die saw process, laser scribing process, or other separation techniques. . Individual devices 2072a and 2072b may be packaged. The packaging of the individual devices 2072a, 2072b allows for metal pads or tracks from the metal contact areas on the package (eg Au, Al, Ag) to form electrical contacts (eg ball bonds, wedge bonds) in the LEDs. Forming a wire bond (for example, Au, Al) extending to (for example, Au, Al, Ag). Packaging of the individual devices 2072a and 2072b also includes soldering the device in place within the package (eg, a die attach process). The solder used in the die attach process may be, for example, AuSn, PbSn, Au-Ge, AgSn or other solder material. The package may also include an antireflective coated window 2068 to allow light emitted from the LED to more efficiently exit the package.

While the process described above in FIGS. 65-82 involves exposing and patterning the surface of mesa 2063 to form LEDs per mesa, another embodiment includes patterning the surfaces of multiple mesas simultaneously. For example, as shown in FIG. 83, a planarization layer 2073 (e.g., a resist layer, a polyimide layer, a polymer layer, or an oxide layer) is placed on the submount 2042 supporting the mesa 2055. FIG. Can be stacked. The planarization layer 2073 is planarized substantially flat with mesa 2055 (eg, flat or horizontal relative to the top surface of layer 2006), as shown in FIG. The technique used to planarize the planarization layer 2073 generally varies with the material selected for the layer 2073. For example, if planarization layer 2073 includes a resist, the resist may be pressed mechanically or thermomechanically to form a planar layer. In other embodiments, if planarization layer 2073 includes an oxide, this oxide may be polished to planarize the layer and expose the top surface of layer 2006 (eg, by a CMP process). .

Subsequent to the formation of the substantially planar hard mask layer 2076 and resist layer 2075 are stacked onto a multilayer stack 2074. The resist layer 2075 is patterned as shown in FIGS. 86 and 87 using one of the techniques described above. This process transfers the pattern to a significant portion of the wafer. For example, if the mask 2077 is larger than the wafer, the entire wafer is patterned in a single process. If the mask 2077 does not cover the entire wafer, the mask 2077 may be moved across the wafer to transfer the pattern into the resist layer 2075. The pattern exposed in resist layer 2075 is then transferred to at least one hardmask layer 2076 and layer 2006 using the etching process described above. Following patterning of layer 2006, hardmask layer 2076 and planarization layer 2073 are removed to form multilayer stack 2077 shown in FIG. For example, the planarization layer 2073 may be removed using an oxygen plasma etchant, a solvent rinse or a chemical etchant.

The process described in Figures 65-88 involves exposing and patterning the surface of the mesa 2063 to form LEDs per mesa using lithography techniques, although other embodiments use other techniques to expose the surface of the mesas. Patterning. For example, as shown in Figures 89-94, a self-assembled monolayer of particles can be used to pattern the surface of mesa 2055. The multilayer stack 2056 (FIG. 89) is immersed in a solution 2091 comprising micron-sized colloidal particles or spherical shells of beads 2092 (FIG. 90). Examples of micron size colloidal particles include polymeric beads (eg polystyrene beads) and dielectric beads (eg oxide or sapphire beads). Optionally, the liquid can be dispensed onto the surface of the multilayer stack during the spin coating process. The particles self-assemble on the surface of the droplets to minimize the overall interfacial energy (Figure 91). As the solution evaporates from the surface of mesa 2055, a monolayer of beads 2092 stays on the surface of the mesa. The order of the self-assembled array of beads may vary based on a number of factors, including, for example, the temperature, percentage of the beads 2092 in solution 2091, humidity of the substrate or surface, drying rate, and topology. have. Multiple sizes of beads may also be provided to provide a regular lattice pattern. Additionally, based on the drying technique, self-assembly can produce regular grains with disordered grain boundaries. In some embodiments, non-equilibrium drying conditions may cause the nanoparticles to self-assemble into a composite periodic pattern, an aperiodic pattern, a semicrystalline pattern or a periodic pattern with some disorder. Without wishing to be bound by theory, it is believed that this pattern facilitates efficient light extraction. Following the formation of a self-assembled array of beads 2092 on the surface of the mesa 2055, a thin layer of material 2093 (eg, a metal layer such as Ni, Ti, W, or chromium) is added to the mesa 2055. ) Or on another hardmask layer, such as SiO ₂ . Beads 2092 and portions of layer 2093 supported by beads 2092 are removed using, for example, an etching process or a lift off process. Removal of a portion of the layer 2093 supported by the beads 2092 produces a negative arrangement of the bead arrangement in the remaining portion of the layer 2093 (FIG. 93). Layer 2093 may then be used as a mask layer for etch layer 2006. Subsequent to transferring the pattern onto layer 2006, layer 2093 may be removed to form a multilayer stack 2096 as shown in FIG. Although spherical beads are described above, more generally spherical beads can refer to any type of nanoparticles used in similar self-assembly processes. Generally, nanoparticles have a length of at least about 0.01 mm (eg, at least about 0.1 mm, at least about 0.5 mm, at least about 1 mm, at least about 2 mm, at least about 5 mm, at least about 10 mm) in one dimension. It can be described as a particle having a. Although the aforementioned particles are spherical in shape, other shapes of particles may be used.

As discussed above, substrate 2008 may be removed from mesa 2032 by decomposing the layers in multilayer stack 2046 by exposing the layers to electromagnetic radiation. In some embodiments, the shape of the electromagnetic radiation beam is selected based on the shape of the mesa 2055. For example, the beam of electromagnetic radiation 2090 may be selected to overlap at least one edge of the mesa (eg, at least two edges of the mesa, at least one edge of the mesa, another edge of the other mesa, etc.). have. In this example, the stretched beam is moved to sequentially expose portions of the mesa (eg, portions 2080a through 2080d). In another example, as shown in Figure 96, the beam is shaped to match or nearly match the cross-sectional shape of the mesa. In this example, the beam covers a substantial portion of mesa 2055 or overlaps with mesa and the mesa is exposed per mesa.

In some embodiments, the height of mesa 2055 may vary depending on the surface of the wafer. For example, the height may be different due to the non-uniform stacking thickness of the initial multi-layer stack 2000 or other stacked layers (eg, layers 2018, 2020. The height of the mesa 2055 is non-uniform. In addition, the height and orientation of the mesa 2055 may vary over the wafer due to the bow in the wafer In some embodiments, the height of the mesa 2055 forms an LED. Prior to patterning the surface of mesa 2055. Lithography is compensated for to correspond to differences in the height and orientation of mesa 2055 across the wafer, for example, the system may vary overall thickness variation across the wafer, Warping, out of focus planes, or local thickness variations can be mapped and lithography can be adjusted based on the measurements.

In some embodiments, the amount of bow present in the initial multilayer stack 2000 may make bonding of the multilayer stack 2000 into the submount difficult. In this example, it may be advantageous to reduce the bow in the wafer to an acceptable amount before bonding the multilayer stack 2000 to the submount 2042. When the multilayer stack is etched to form mesas on the wafer, the stress inside the stacked layers (eg, layers 2002, 2004, 2006) is reduced and the flexibility of the wafer 2000 is increased. As the flexibility of the wafer is increased, the bow of the wafer can be reduced. Thus, to reduce the bow to an acceptable level, a number of mesas can be selected and etched into the wafer or the depth of etching (possibly extending into the substrate 2008) can be selected such that the bow is substantially reduced. . Selective etching of the wafer 2000 to form mesas and reduce wafer unevenness may be an iterative process. For example, a portion of wafer 2000 may be dedicated to bow reduction and not used for LED formation, and multiple etching channels may be dedicated to wafer 2000 until the bow in wafer 2000 is adequately reduced. It may be repeatedly etched into the portion. In other embodiments, the mesa separation etch may be different (eg, different depths) in the portion of the wafer 2000 for removing warpage, but not in other areas for removing bows.

In some embodiments described above, LEDs formed from a single mesa are packaged, but multiple mesas may be grouped or separated into a group such that a plurality of LEDs formed from different adjacent mesas are included in the packaged device. This may provide an extra advantage if some mesas do not form a functional device or if a packaged device still generates light when in use and fails. Additionally, this technique can be used on grids smaller than the final LED size (e.g. 0.5mm) to produce larger LEDs of various rectangular shapes (e.g. 16x9, 4x3, 1x1). have. In addition, multiple LEDs may be packaged in the same package in which light may generate various colors (eg, red, green, blue) or wavelengths.

Although in some of the embodiments described above, multiple mesas initially supported by a substrate (eg, substrate 2008) are transferred such that the mesas are supported by a single submount (eg, submount 2042). However, mesas may alternatively be transferred to a number of different submounts or located at desired locations on other substrates or devices.

In some embodiments, the shape of the mesa may be selected to match or nearly match the shape of the microdisplay. For example, the aspect ratio of the mesa may be chosen to be 16x9 or 4x3 to match a similarly proportional microdisplay, for example a projection microdisplay.

In some embodiments, each mesa may be individually processed within the electrical network in such a way that each LED represents a pixel in a display, eg, a projection display.

Although the laminated layer supported by the substrate in the above embodiments is etched to form mesas, in some embodiments a portion of the substrate may also be etched. This may further increase the flexibility of the wafer.

In some embodiments, as shown in FIG. 97A, the contact layout for the LEDs 1802 extends from the conductive pads 1804a and 1804b toward the central regions of the two conductive pads 1804a and 1804b and the LEDs 1802. A conductive bar (or finger) 1806. Wire bonds (not shown) connected to conductive pads 1804a and 1804b provide current and voltage to LEDs 1802. Current is diffused from the conductive pads 1804a and 1804b to the top surface 1808 of the LED 1802. Bar 1806 allows sufficient current to spread across top surface 1808 while limiting the amount of surface 1808 covered by the contacts.

97B is a top view of an LED 1802 that includes conductive pads 1804a and 1804b and a conductive bar 1806. In some embodiments, the width of the conductive pads 1804a, 1804b may be greater than the width of the conductive bar 1806. The larger width of the pads 1804a, 1804b may allow the pads 1804a, 1804b to function as a power bus and allow a relatively large amount of power to spread through the bus to the bar 1806. The width of the pads 1804a, 1804b and the bars 1806 may correspond to the size of the LED 1802 and / or may be based on other factors such as lithography and processing variables.

For example, the LED may range in size from approximately 0.5 mm to 1 cm on one side. As mentioned above, the aspect ratio of the LED 1802 may also vary. The width of the conductive pads 1804a and 1804b may be, for example, about 50 μm to about 500 μm, and the width of the bars 1806 may be about 1 μm to about 50 μm, for example. The heights of the conductive pads 1804a and 1804b and the bars 1806 may vary, for example, based on current and power supplied to the LEDs or based on lamination and processing parameters. For example, the conductive pads 1804a and 1804b and the bars 1806 may have a height of about 0.1 μm to about 10 μm.

In general, bar 1806 can vary as desired in both length and shape. As shown in FIG. 97B, the bar 1806 is rectangular and may extend from the conductive pads 1804a and 1804b towards the central region of the LED 1802. Optionally, the bars 1806 may have different shapes, such as square, triangular or trapezoidal.

98A-98C show another example of the contact structure. In this example, a number of bars 1812 extend over the entire length of the LED 1810, connecting the conductive pads 1804a to the conductive pads 1804b. Contact bar 1812 has an associated resistivity r _m , a thickness t _b and a length l. The current distribution characteristics for the LED 1810 based on the conductive pads 1804a and 1804b and the contact bar 1812 can be calculated by simplifying the structure with an equivalent circuit model as shown in FIG. 98C.

The aspect ratio of the LED 1810 can affect the current dissipation of the system. The aspect ratio 'L' of the LED 1810 can be calculated according to the following equation as shown below.

L = √ (Ab / a)

Where A is the surface area of the die (eg, length times width) and a and b are the aspect ratios of the die. For an example for an LED with a 16x9 aspect ratio, a is 16 and b is 9.

As described above, the contact bar 1812 does not cover the entire surface of the LED 1810 to allow light generated in the LED to be emitted through the surface. Since the contact covers only a portion of the surface of the LED 1810, the contact resistance is divided by the surface coverage ratio f as shown in the following equation.

The current density across the junction can be estimated according to the following equation as shown below.

Where J ₀ is the junction saturation current and T is the absolute temperature. The estimate ignores the contribution of the n-type material in the lateral current spreading. In general, however, current spreading prevails within metal contacts because the conductivity of the contacts is much higher than that of n-type materials. For example, the ratio of contact conductivity to n-type material conductivity can range from about 100 to about 500.

) 보다 훨씬 크고, 그런 후 접합부에서 전류 밀도 분포의 선형 근사는 다음의 방정식에 따라 개산될 수 있다.In a similar system (but with infinite separation between pads), if the calculation is performed at forward bias (e.g., V _j > kT / e), and if the voltage drop across the series resistance is kT / e (e.g. For

A linear approximation of the current density distribution at the junction can then be estimated according to the equation

Where J ₁ is the current density under the pad, x is the distance from the pad, and L _s is the current spreading length as shown in the following equation.

This estimate assumes infinite separation between pads. However, in the case of linear approximations with finite separation, the solutions for the individual pads can be added together. It is believed that the process described above causes an error that approximates the die center but does not significantly change the physical tendency.

The maximum current density can occur at the center x = L / 2 of the device and can be estimated according to the following equation.

Here, the uniformity factor is estimated as shown in the equation.

For dies of the same surface area that switch from square shape to square shape with aspect ratios (a, b) along the small side, the minimum current density is increased and the uniformity factor is shown in the following equation: Is deformed.

Thus, the uniformity increasing factor can be estimated as shown in the equation.

For example, the uniformity increasing factor 'S' has a minimum value of S = 1 in the square case (eg a = b). For 16 × 9 squares, the following values: ρ _m = 2.2 × 10 ^-6 Ωcm (gold), ρ _pc = 1.0 · 10 ^-3 Ω㎠, ρ _p = 5.0Ωcm, ρ _nc = 1.0 · 10 ^{− 4} Ωcm 2, ρ _n = 5.0 · 10 ⁻³ Ωcm, _n -contact surface coverage 10%, and thicknesses for p-, n- and metal, 0.3 μm, 3.0 μm and 2.0 μm (at 10% coverage) Assume Then L _s is equal to 1.4 mm. If the die has a surface area of A = 25 mm 2. In the case of a square, U = 0.325, in the case of 16 × 9, U '= 0.5 or the uniformity increasing factor S = 1.54, i.e. a 54% increase in current uniformity.

Thus, without wishing to be bound by theory, it is believed that using rectangular shapes for LEDs can provide an advantage in current spreading. Contact resistance can be altered to enhance current spreading selectively or additionally by including an insulating layer 1820 (eg, an oxide layer, FIG. 99A) underneath a portion of the contact. As shown in Figures 99A and 67B, an insulating layer 1820 (indicated by the dashed lines) is included under a portion of the bar 1812. Insulating layer 1820 has a greater width at the top of the bar (eg, close to pad 1804) and thinner toward the center region of the die. An equivalent circuit diagram is shown in FIG. 99B.

Contact resistance is generally proportional to the contact area. For example, the contact resistance increases as the contact area decreases as shown in the following equation.

W is the repetition rate of the bars (eg number of bars per unit area). Because of the underlying insulating layer 1820, the area of the contact is smaller at the edge of the contact closest to the pads 1804a, 1804b and increases as the distance at the pads 1804a, 1804b increases. Because of the difference in contact area, the contact resistance is higher near the pads 1804a and 1804b and gradually decreases toward the center of the LED. The difference in contact resistance causes the current to be delivered farther, reducing current bias, increasing the uniformity of light emission through the surface and reducing performance degradation. The current spreading length can be estimated according to the following equation.

The junction current density along the die can be estimated by the equation

The minimum current at the center of the device (eg at x = L / 2) can be estimated according to the following equation.

The current equalization factor for the structure shown in Fig. 99B can be estimated according to the following equation.

As discussed above, oxide layer 1820 may increase current spreading by directing current toward the end of the contact (eg, toward the central region of the die). Oxide layer 1820 also reduces light generation below the light absorbing contacts, allowing more percentage of the generated light to exit the surface of the LED.

100A and 100B show additional configurations of pads 1804a and 1804b, contacts 1830 and oxide layer 1820 (indicated by dashed lines and disposed under contacts 1830). Here, the contact 1830 is also tapered. Although tapered linearly in FIG. 100A, other taper may be used. Linear taper is the contact 1812 shown in FIG. 99A with the contact width at the pad being at least three times the width shown in FIG. 99A while the contact width at the die center is approximately half the width of the bar 1812 (FIG. 99A). Maintain a total contact area similar to that of The oxide can be tapered at a higher angle such that the contact resistance is maximum at the pad and minimum at the die center. Contact resistance decreases toward the die and bar resistance decreases as it approaches the pad. Tapering of both the contact and insulation layers contributes to directing the current toward the die center. The local diffusion length can be estimated according to the following equation.

Similar integration formulas for the current distribution as described above can be used to estimate the current distribution for the structure shown in FIGS. 100A and 100B.

101A shows a top view of an additional contact structure 1801 and FIGS. 101B and 101C show a cross-sectional view thereof. Conductive contacts 1836 extend toward the center of the die but do not continuously cover the top surface of the LED between pads 1804a and 1804b. An insulating layer 1834 is located between the top of the LED and the metal contact 1836 in the interior portion of the contact. Both the contact 1836 and the insulating layer 1834 are tapered. Arrow 1837 represents the current spreading from the metal contact 1836 into the surface of the die.

FIG. 102 shows a graph 1850 of normalized junction current density estimated as a function of normalized distance between pads 1804a and 1804b for various contact and die configurations based on the equation above. Line 1856 shows a current density for a square die with a rectangular bar and oxide free, line 1858 shows a current density for a rectangular die with a rectangular bar and tapered with a rectangular bar Current density for a rectangular die with oxide is shown, and line 1862 represents a tapered bar and current density for a rectangular die with tapered oxide. Graph 1850 shows an improvement in current density distribution for both the rectangular chip and oxide layer underneath a portion of the contact.

103A shows a top view of an additional contact structure 1803 and FIG. 103B shows a cross sectional view thereof. Insulating layers 1805a and 1805b are positioned between the top of the LED and the metal pads 1804a and 1804b, respectively. Insulating layers 1805a and 1805b are positioned below portions of metal pads 1804a and 1804b, respectively, towards the edge of the die such that portions of metal pads 1804a and 1804b are supported by insulating layers 1805a and 1805b. Pads 1804a and 1804b are supported by the top surface of the light emitting diodes. Oxide layers 1805a and 1805b reduce light generation under light absorbing metal pads 1804a and 1804b to allow more of the generated light to exit the surface of the LED.

Although the embodiment described above includes a single set of contacts extending from the metal pads 1804a and 1804b, multiple sets of contacts can be used. For example, the second set of contacts may extend from a set of contacts connected to metal pad 1804 or the like. Moreover, although oxide layers are described, most commonly the layers may be formed of any suitable electronically insulating material (eg, nitride).

104 illustrates the dimensions of an example of contact 1899 and may be used to approximate the electrical transport inside the n-contact. It is assumed that contact 1899 distributes a uniform current density J ₀ within contact period D 1870. The total current to be carried by the contact can be estimated as shown in the following equation.

The maximum current flows on the pad (at the top of the contact) corresponding to the current density that can be estimated as shown in the following equation.

At any distance x from the end of the bar, the current density can be estimated as shown by the following equation.

The voltage drop per unit length can be approximated as shown in the equation

And the heat generated per unit length can be estimated as shown by the following equation.

Integrating the above equation, the total voltage drop can be estimated as shown in the following equation,

And the heat generated at the bar can be estimated as shown in the following equation.

When the total heat generated becomes important, uniform current assumptions can be broken, and so can the performance of the device (eg, the device is overheated). Thus, the maximum current density (current density is generally linearly proportional to length), voltage drop (voltage drop is generally proportional to the square of the length), and / or heat generated (generated heat is generally length It may be desirable to minimize (in proportion to the cube of). Based on this relationship, a square 9 × 16 die with more but shorter bars has a, b and c reduced by factors of 3/4, 9/16 and 27/64. Since the number of bars is increased by a factor of 4/3, the total heat generated can be reduced by a factor of 9/16.

105 shows a packaged LED device 1890. In general, the package should be able to provide mechanical and environmental protection to the die and allow for easy light collection while allowing the heat generated within the die to dissipate. As discussed above, the LED 1890 includes conductive pads 1804a and 1804b that allow current to spread to multiple contact fingers 1812 and dissipate to the LED surface. Multiple wire bonds 1892 provide a current path between the LED and the package. Wire bond 1892 may be made of various conductive materials such as gold, aluminum, silver, platinum, copper, and other metals or metal alloys. The package also includes a number of castellations 1894 to transport current from the bottom surface of the package to the top surface of the package to facilitate surface mounting on the circuit board. Castration 1894 includes a central zone and a plating layer. The central zone may be composed of a refractory metal such as, for example, tungsten and may be relatively thick (eg, about 100 μm to about 1 mm). The central zone may be plated with an electrically conductive material such as gold. Plating can range in thickness from about 0.5 μm to about 10 μm and provide a current path that supports relatively high power levels. Additionally, the package includes a transparent cover 1896 packaged on the LED to protect the patterned surface 506 (FIG. 56) when no encapsulant is used. Transparent cover 1896 is attached to the package using, for example, glass frits melted in a furnace. Optionally, cover 1896 may be connected using, for example, cap welding or epoxy. Transparent cover 1896 may be further coated with one or more antireflective coatings to increase light transmission. Without wishing to be bound by theory, it is believed that the absence of an encapsulant layer allows for a higher allowable power load per unit area within the patterned surface of the LED 100. Degradation of the encapsulant may be a common failure mechanism for standard LEDs and is avoided by not using the encapsulant layer. Packaged device 1890 may be mounted on a circuit board, on another device, or directly on a heat sink.

106 shows a heat dissipation model for a packaged device 1890 located on a heat sink device. The packaged device 1890 is supported by a core board 1900 that includes insulating and electrically conductive regions (eg, conductive regions using metals such as Al or Cu) attached to the heat sink. For example, packaged device 1890 can be soldered using solder (example solders include AuSn solder, PbSn solder, NiSn solder, InSn solder, InAgSn solder, and PbSnAg solder) or electrically conductive epoxy (eg, , Silver filled epoxy) may be attached to the core board 1900. The core board 1900 is supported by a layer of heat sink metal 1902 or heat sink fins 1904. For example, the core board 1900 can be soldered (example solders include AuSn solder, PbSn solder, NiSn solder, InSn solder, InAgSn solder, and PbSnAg solder) or epoxy (e.g., silver filled) Epoxy) to the heat sink metal 1902. In this model it is assumed that heat is diffused from the packaged device 1890 as it dissipates towards the heat sink. Diffusion angle 1906 represents the angle at which heat dissipates out of packaged device 1890. Diffusion angle 1906 generally varies depending on the material properties and the vertical layout of the system. Diffusion angle 1906 may vary for different layers in the heat sink. The thermal resistance of the slice with thickness dx can be estimated according to the following equation.

Where K ₀ is the thermal conductivity and S 'is the dimension of the heat front at the top of the element. By integration, the following equation for resistance is obtained.

In the case of a square, the resistance can be calculated to yield the result shown in FIG. FIG. 107 shows the calculated ratio of Rth_square / Rth_square, where Rth is thermal resistance, for a system of large thickness and having a diffusion angle of 45 °. As the aspect ratio increases, the thermal resistance may drop. For example, if the square die system has a thermal resistance of 20 ° C./W and it is desirable to dissipate 3 W of power, the junction temperature (assuming an ambient temperature of 25 ° C.) may be 25 + 20 * 3 = 85 ° C. have. However, square dies of the same area and the same dissipated heat will have a low junction temperature. 108 shows a graph of junction temperature as a function of aspect ratio. It is believed that low junction temperatures are desirable for reduced wavelength shifts and higher device efficiency.

As mentioned above, using a rectangular shape for an LED can provide certain advantages (eg, as compared to square). Such advantages may include one or more of the following. Rectangular LEDs can allow more wire bonds per unit area to increase the power that can be input into the LEDs. The rectangular shape can be chosen to match the specific aspect ratio of the pixel or microdisplay, thus eliminating the need for complex beam forming optics. The rectangular shape can also improve heat dissipation from the LED and reduce the likelihood of failure due to device overheating.

Since the cross section of the individual LEDs cut from the wafer is only slightly larger than the light emitting surface area of the LEDs, many individual and separately processable LEDs may be closely packed together in an array. If one LED is not functioning (for example due to a large defect), the performance of the array will not be seriously reduced because the individual devices are tightly packed.

Although specific embodiments have been described, other embodiments are possible.

As an example, while the specific thickness of the light emitting element and associated layer has been described above, other thicknesses are also possible. In general, the luminous means can have any desired thickness and the individual layers inside the luminous means can have any desired thickness. Typically, the thickness of the layer inside the multilayer stack 122 is selected to increase the spatial overlap of the light generating region 130 and the optical mode to increase the output from the light generated in the region 130. Exemplary thicknesses for any layer in the light emitting device include the following. In some embodiments, layer 134 is at least about 100 nm (eg, at least about 200 nm, at least about 300 nm, at least about 400 nm, at least about 500 nm) and / or at most about 10 microns (eg, Up to about 5 microns, up to about 3 microns, up to about 1 micron). In certain embodiments, layer 128 may be at least about 10 nm (eg, at least about 25 nm, at least about 40 nm) and / or at most about 1 micron (eg, at most about 500 nm, at most about 100 nm). ) Has a thickness. In some embodiments, layer 126 is at least about 10 nm (eg, at least about 50 nm, at least about 100 nm) and / or at most about 1 micron (eg, at most about 500 nm, at most about 250 nm). ) Has a thickness. In certain embodiments, photogeneration zone 130 is at least about 10 nm (eg, at least about 25 nm, at least about 50 nm, at least about 100 nm) and / or at most about 500 nm (eg, at most about 250 nm, up to about 150 nm).

As an example, although light emitting diodes have been described, other light emitting devices having the above-described configuration (eg, patterns, processes) can be used. Such light emitting devices include lasers and optical amplifiers.

As another example, although current spreading layer 132 is described as a layer separate from n-doped layer 134, in some embodiments, current spreading layer is integral with layer 134 (eg, a portion thereof). It may be. In such embodiments, the current spreading layer may be a relatively high n-doped portion of layer 134 or a heterojunction between (eg AlGaN / GaN) to form a 2D electron gas.

As a further example, while certain semiconductor materials have been described, other semiconductor materials may also be used. In general, any semiconductor material (eg, III-V semiconductor material, organic semiconductor material, silicon) can be used in the light emitting device. Examples of other light emitting materials include InGaAsP, AlInGaN, AlGaAs, InGaAlP. The organic light emitting material is a composite such as aluminum tris-8-hydroxyquinoline (Alq3) and poly [2-methoxy-5- (2-ethylhexyloxy) -1,4-vinylenephenylene] or MEH-PPV Polymers.

As an additional example, although large area LEDs have been described, the LEDs may also be small area LEDs (eg, LEDs whose edges are less than about 300 microns standard).

By way of example, while a dielectric function has been described that varies spatially with a pattern in which a hole is formed, the pattern can also be formed in other ways. For example, the pattern may be formed of continuous vanes and / or discontinuous vanes in a suitable layer. Moreover, the pattern of changing the dielectric function can be achieved without using holes or vanes. For example, materials with different dielectric functions can be patterned in appropriate layers. Combinations of these patterns can also be used.

As a further example, although layer 126 is described as being formed of silver, other materials may also be used. In some embodiments, layer 126 is formed of a material capable of reflecting at least about 50% of the light generated by the light generating zones impinging on the layer of reflective material, the reflective material being a multi-layer stack of the support and the support In between. Examples of such materials include distributed Bragg reflector stacks and various metals and alloys such as aluminum and aluminum coated alloys.

As another example, the support 120 may be formed of various materials. Examples of materials from which the support 120 can be formed include copper, copper-tungsten, aluminum nitride, silicon carbide, beryllium oxide, diamond, TEC and aluminum.

As an additional example, although layer 126 has been described as being formed of a heat sink material, in some embodiments the light emitting device is a separate layer (eg, layer 126 and submount 120) that acts as a heat sink. Disposed between)). In such an embodiment, layer 126 may or may not include a material that can act as a heat sink.

As a further example, the various functions of the dielectric function are described as extending only into the n-doped layer 134 (which may substantially reduce the likelihood of surface recombination carrier loss) but in addition to the use of the entire photogeneration zone. In embodiments, various patterns of dielectric function may extend beyond the n-doped layer (eg, into the current spreading layer 132, the light generating region 130, and / or the p-doped layer 128). have.

As another example, while embodiments have been described in which air is disposed between surface 110 and cover slip 140, in some embodiments other materials other than or in addition to air may be present between surface 110 and cover slip 140. Can be placed in. Generally, such materials have refractive indices of at least about 1 and less than about 1.5 (eg, less than 1.4, less than about 1.3, less than about 1.2, less than about 1.1). Examples of such materials include nitrogen, air or some high thermally conductive gas. In such embodiments, the surface 110 may or may not be patterned. For example, surface 110 may not be patterned but may be rough (ie, have a randomly distributed shape of various sizes and shapes less than λ / 5).

As another example, embodiments have been described that include planarization and lamination and lithography of layers, but in some embodiments a pre-patterned etch mask can be placed on the surface of an n-doped semiconductor layer.

As a further example, in some embodiments, an etch mask may be disposed between the n-doped semiconductor layer and the planarization layer. In such embodiments, the method may include removing at least a portion of the etch mask layer (eg, to form a pattern in the etch stop layer corresponding to the pattern of the n-doped semiconductor layer).

As an additional example, an embodiment has been disclosed in which the surface 110 is patterned and smoothed, but in some embodiments, the surface 110 may be patterned and rough (ie, less than λ / 5, less than λ / 2, having an arbitrarily distributed shape of varying size and shape less than λ). Also in certain embodiments, the sidewalls of the openings 150 may be rough, with or without rough surfaces 110 (ie, of various sizes and shapes of less than λ / 5, less than λ / 2, and less than λ). Distributed shape). Moreover, in some embodiments, the bottom surface of the opening 150 may be rough (ie, have an arbitrarily distributed shape of various sizes and shapes of less than λ / 5, less than λ / 2, and less than λ). Surface 110, sidewalls of opening 150 and / or bottom surface of opening 150 may be roughened using, for example, etching (eg, wet etching, dry etching, reactive ion etching). Without wishing to be bound by theory, the rough surface 110 and / or sidewalls of the opening 150 indicate the likelihood that light rays will eventually strike and be extracted at an angle less than the critical angle given by Snell's law with respect to the atomically smooth surface. It is believed to increase.

As another example, in some embodiments the submount may be machined to include a spring-like structure. Without wishing to be bound by theory, it is believed that such spring-like structures may reduce crack formation during removal of the substrate.

As a further example, in some embodiments the submount may be supported by an acoustic absorbing platform (eg, polymer foam). Without wishing to be bound by theory, it is believed that such sound absorbing structure may reduce crack formation during removal of the substrate.

As an additional example, in some embodiments the substrate is processed (eg, etched, polished or sandblasted) before being removed. In certain embodiments, the substrate may be patterned before being removed. In some embodiments, the thickness of the layer is such that the mechanical neutral axis of the multilayer stack is substantially close to the interface between the p-doped semiconductor layer and the bonding layer (eg, less than about 500 microns, less than about 100 microns, about Less than 10 microns, less than about 5 microns). In certain embodiments, portions of the substrate are removed separately (eg to reduce the likelihood of cracking).

In another example, an embodiment in which the buffer layer is separated from the n-doped semiconductor layer is described (eg, the buffer layer grows on the substrate with the n-doped semiconductor layer grown separately on the buffer), but in some embodiments instead May be a single layer. For example, a single layer first deposits a relatively low doped (eg undoped) semiconductor material on a substrate and then deposits a relatively high doped (n-doped) semiconductor material (in one process). It can be formed by.

As a further example, while embodiments have been described in which the substrate is removed by a process that includes exposing the surface of the substrate to electromagnetic radiation (eg, laser light), in some embodiments other methods may be used to remove the substrate. have. For example, removal of the substrate may include etching and / or lapping the substrate. In some embodiments, the substrate may be etched and / or wrapped and then exposed to electromagnetic radiation (eg, laser light).

As an additional example, in some embodiments the top surface of the planarization layer may be flattened after depositing the planarization layer but before depositing the lithography layer. For example, a flat object, such as an optical plane, may be placed on the top surface of the planarization layer while heating the planarization layer (eg, with a hot plate). In some embodiments, pressure may be applied (eg, using a physical weight or press) to assist in the flattening process.

As another example, the substrate may be treated before it is removed. For example, the substrate may be exposed to one or more processes selected from etching, polishing, grinding and sandblasting. In certain embodiments, treating the substrate may include patterning the substrate. In some embodiments, treating the substrate includes laminating an antireflective coating on the substrate. Such antireflective coatings may allow a relatively large area of substrate to be removed using a substrate removal process, including, for example, exposing the substrate to electromagnetic radiation because the coating may reduce the reflection of electromagnetic radiation. In certain embodiments, patterns on the surface of the substrate may also be used to achieve antireflective effects.

In some embodiments, it may be desirable for the light emitting device or system to provide linearly polarized light. As mentioned herein, polarization includes about 60% of the total light linearly polarized light and about 40% of the total light orthogonal polarized light (e.g., about 65% of the total light linearly polarized light and about 35% of the total light orthogonal polarized light, totally About 70% of the light is linearly polarized and about 30% of the total light is orthogonal polarization, about 75% of the total light is linearly polarized and about 25% of the total light is orthogonal polarization, about 80% of the total light is linearly polarized and about 20% of the total light is Orthogonal polarization, about 90% of the total light is linearly polarized light, and about 10% of the total light is orthogonal polarized light).

As mentioned herein, unpolarized light refers to light that is not polarized.

In general, the light generating zone (eg, the light generating zone as described above) generates unpolarized light. As described below, in order to generate polarization, the material may be configured to transmit one polarization and reflect (and possibly recycle) the other polarization. Optionally, generation of light of one polarization may be suppressed.

109 shows a system 3000 including an LED 3002 contained in a package 3004. In general, the package 3004 should also be able to facilitate light collection while providing mechanical and environmental protection of the die. Package 3006 includes a transparent cover 3006 disposed between the display and the LED 3002. Light generated by the LED 3002 (in the light emitting area 3003) exiting the package 3004 in use is transmitted through a cover 3006 that selectively transmits polarization. For example, cover 3006 can transmit one or more polarizations while reflecting one or more different polarizations (eg, one or more orthogonal polarizations).

In some embodiments, cover 3006 may include one or more coatings for filtering light. For example, the coating may include slots that form the filter such that a portion of the light waves that are not aligned with the slots in the filter are passed while other orientations are absorbed or reflected. This selective transmission produces polarized light emission from the packaged LED device 3000. For example, a chemical film may be applied to the transparent plastic or glass surface of the cover 3006. Chemical compounds may be composed of molecules that are naturally aligned parallel to each other creating an extremely small filter that absorbs any light that matches their alignment. In another example, the material may be patterned to form a linear grating on cover 3006. Other examples of polarization selective materials include multilayer films of polarization selective mirrors, polarization materials, and birefringent materials.

In some embodiments, in addition to cover 3006 that filters light, cover 3006 also reflects light that is not transmitted through cover 3006. As shown in FIG. 109, light can be emitted from a number of orientations or polarizations (indicated by arrows 3010 and 3012) from the surface of the LED 3002. Cover 3006 selectively filters some polarization so that a first portion of light (indicated by arrow 3014) passes through cover 3006. Light that is not transmitted through the cover 3006 is reflected by the cover 3006 (indicated by arrow 3016). A portion of the reflected light is absorbed by the quantum well containing area of the light emitting device 3002 (indicated by arrow 3018). The absorbed photons are then re-emitted (eg recycled) by the LED 3002. Re-emitted photons may be passed through the cover with the same probability of each polarization or subsequently re-reflected by the LED 3002. In some embodiments, LED 3002 has a pattern of openings 150 in top surface 3015. Without wishing to be bound by theory, the pattern may facilitate coupling the reflected light into the LED 3002 such that the reflected light can be absorbed in the quantum well containing region of the light emitting device 3002.

In some embodiments, integrating the polarization selective mirror or other polarization selective element or material with the cover 3006 of the package (eg, instead of placing the polarization selective mirror outside of the package) may facilitate recycling of reflected polarization. And increase the efficiency of selective polarization and / or efficient illumination of the packaged LED device 3000. The efficiency may depend on the internal quantum efficiency of the material used for the light emitting element 3002. In some embodiments, transparent cover 3006 may be further coated with one or more antireflective coatings to increase light transmission.

110A shows an LED 3030 that includes a patterned layer 3031 designed to reflect / transmit light based on polarization of the light. Light generated in the light generating area 3040 is reflected or transmitted by the patterned layer 3031 based on the polarization of the light. Exemplary patterns are shown in FIGS. 110B, 110C, and 110D. The pattern includes an array of holes etched into the surface of layer 3031. At least a portion of the holes may extend in the same plane direction as the layer 3031 (eg, a direction approximately perpendicular to the normal to the surface of the layer 3031). Without wishing to be bound by theory, it is believed that the elongation of the aperture separates or filters the polarization of the light such that some polarization is transmitted through the surface of the LED 3030 and other polarizations are not reflected and transmitted from the LED 3030. As described above, at least some of the reflected light is recycled and re-emitted from the LED 3030.

Although the patterns shown in FIGS. 110B, 110C, and 110D include elongated ellipses, other elongated shapes, such as rectangles, may be used. In some embodiments, gratings or other linear patterns may be used. In addition to polarizing light emitted by the LED 3030, the pattern 3032 can also facilitate light extraction and collimation (eg, in accordance with one or more methods described above). In addition, the pattern 3032 may be comprised of multiple patterns, each of which facilitates collimation, extraction, polarization, or a combination thereof.

Although the embodiment shown in Figures 109 and 110 generates a polarization beam by filtering the light generated by the light generating zones of the LEDs, the light can also be polarized by suppressing the light generation of certain polarizations relative to other polarizations. For example, a light emitting device can generate light having at least about 60% (eg, at least about 65%, at least about 70%, at least about 80%, at least about 90%) of light having a particular polarization.

In some embodiments, the induced deformation in at least one material layer of the light emitting device changes the electron band structure of the material such that different energy transitions occur in the material. The modification can be used to separate the energy transitions that produce light of the desired polarization. Variations can be introduced into one or more layers in a variety of ways. For example, deformation can be introduced during growth based on the lattice mismatch of the two materials or based on processing variables such as temperature and lamination rate. In another example, bonding variables such as substrate orientation, temperature cycles, material selection, or other processing variables introduce deformation into one or more layers. In another example, the strain is introduced into the material following the manufacture of the LED by bending the device to introduce physical stress in one or more layers. In another example, the deformation is introduced by etching, polishing, or chemical mechanical polishing. In another example, the strain introduced in advance (eg, more or less tensile strain, more or less compressive strain along various crystallographic axes in the semiconductor layer) is adjusted. For example, it is believed that this technique may be useful in post-process wafers containing strains introduced during growth.

111 shows an LED 3050 comprising an n-doped layer 3052, a quantum well containing region 3054, a p-doped layer 3056, and a contact layer 3058. Multiple holes 3060 etched in n-doped layer 3052, quantum well containing region 3054, and p-doped layer 3056 form a photon grating having an etched pattern. Without wishing to be bound by theory, the holes 3060 etched through the quantum well containing region 3054 generate optical band gaps (eg, complete photon band gaps, partial photon band gaps) around a particular polarization mode. It is believed to be. The gap in the allowed mode allows the LED 3050 to emit certain polarizations while suppressing other polarizations. Hole 3060 may extend along an axis (eg, form an oval or rectangular shape). The elongation of the aperture separates the mode of photogeneration such that one mode moves at least partially out of the band gap for photogeneration and the other mode moves at least partially within the band gap for photogeneration (eg, light Degenerates the mode of occurrence). The LED 3050 emits polarized light because the light generating zone generates light with a particular mode and suppresses light with another mode. Additional linear patterns are possible that break the symmetry of the degenerate mode of photogeneration. Since the desired polarity is produced (the undesirable polarization is at least partially suppressed), no polarizing film or surface as described above is necessary to generate polarized light. However, in some embodiments, polarizing films or surfaces, such as those described above, can be used to further improve the degree of polarization.

Hole 3062 creates a photon band gap around a particular polarization mode, while hole 3062 can also introduce non-radiative surface conditions that allow carriers to recombine, potentially reducing efficiency and generating heat. . The holes may be passivated to reduce the surface recombination rate (eg, chemical passivation by exposure to chemical vapor). Hole 3042 may be filled with air, a dielectric, or other material (eg, to facilitate passivation).

In the above-described embodiment, the holes 3062 etched through the n-doped layer 3052, the quantum well containing region 3054, and the p-doped layer 3056 suppress undesirable polarization, but other polarizations. Inhibition methods can be used. In some embodiments, back patterning as shown in FIG. 112 allows the light to be generated with some polarization suppressed relative to other polarizations.

112 shows an LED 3070 that includes an n-doped layer 3052, a quantum well containing region 3054, and a p-doped layer 3056. A set of holes 3074 etched in the p-doped layer 3074 create a photon band gap around the undesirable polarization mode. Hole 3074 may extend partially or completely through p-doped layer 3056. In some embodiments, the apertures 3074 may extend into the quantum well containing region 3054 or into the n-doped layer 3052. Hole 3074 may be filled with air or other dielectric material. The apertures 3074 may additionally be aligned in a pattern for collimating light. The LED 3070 may further have a pattern etched into the n-doped layer 3052 to further enhance collimation, light extraction, or polarization selection using one or more methods or configurations described above. Another embodiment is envisaged where the n doped and p doped layers are reversed.

113 shows an LED 3200 comprising an n-doped layer 3206, a quantum well containing region 3204, a p-doped layer 3202 and a patterned reflective layer 3231. Patterned reflective layer 3231 includes passivation zone 3230 and reflective zone 3214. For example, reflective zone 3214 (eg, patterned region) may be etched and filled with insulating material. Without wishing to be bound by theory, it is believed that the periodicity of passivation zone 3230 and reflection zone 3214 affects the reflectivity of the mirror. The change in reflectance is believed to make the mirror sensitive to polarization and enable a number of standing waves to be formed between the top surface of the layer 3206 and the patterned contact layer 3231. The pattern is where nodes form in the quantum well containing region 3204 for one polarization (eg wave 3090) and the quantum well containing region for polarizations with different peaks (eg wave 3092). Can be designed to form at 3204.

In general, the LED 3200 can be manufactured as desired. In general, the LED 3200 includes various lamination, laser processing, lithography, and etching steps.

In some embodiments, the LED 3200 is manufactured by the method shown in FIGS. 114-102. 114 shows an LED 3201 formed of a multilayer stack comprising a substrate 3208, a layer 3206, a layer 3204, and a layer 3202. Substrate 3208 is generally as described above with respect to substrate 500, and layers 3206, 3204, 3202 may be as described above with respect to layers 506, 510, 512.

115 illustrates a multilayer stack 3210 comprising layers 3206, 3204, 3202 and substrate 3208 as described above. The multilayer stack 3210 also includes a metal layer 3212. Metal layer 3212 may be comprised of a single layer of reflective material (eg, Ag, Al, Cu, W, Pt, Ti, or an alloy thereof), and layer 3212 may include multiple layers. have. For example, layer 3212 consists of layer 3202 (eg, Ni, ITO, Ag, Al, Ti, Cu, Rh, Pt or alloys thereof) and an ohmic contact layer (eg, Ag). Layer) and an ohmic contact layer supported by a reflective layer. Additionally, diffusion barriers (eg, layers composed of Pt or Ti-N) may also be included to prevent or limit diffusion or chemical reactions between any metals in the layered stack (eg, reflections). Supported by layers). In addition, various adhesive layers (eg, layers composed of Ti) may be stacked to assist the adhesion between different layers of the multilayer stack 3210.

As shown in FIG. 116, layer 3212 is patterned (e.g., using nano-imprint, deep-UV, e-beam and holographic lithography), and (e.g., reactive ion etching, It is etched using wet etching to form reflective zone 3214 thereby exposing a portion of surface 3216 of layer 3202.

As shown in FIG. 117, layer 3326 is stacked onto reflective area 3214. Layer 3326 may be transparent to light emitted from a light emitting layer (eg, a layer consisting of Si ₃ N ₄ , SiO ₂ , TiO ₂ , ITO, or Ru ₂ O ₃ ). Layer 3326 may be stacked in a variety of ways. For example, layer 3262 may be deposited using CVD atomic layer deposition (ALD) or sputtering.

As shown in FIG. 118, layer 3326 is etched (eg, using dry etching or CMP) to maintain the surface of reflective zone 3214 while maintaining a transparent material in the indentation between reflective zones 3214. And thereby form a transparent zone 3230 in the light emitted from the emissive layer. Transparent zone 3230 and reflective zone 3214 form a patterned reflective layer 3231 together.

As shown in FIG. 119, in some embodiments, a metal layer 3322 (eg, a layer composed of Ag / Pt / Ti / Ni / Au) is deposited onto the patterned reflective layer 3231. Layer 3322 may promote adhesion of the multilayer stack 3234 to the bonding submount. In some embodiments, layer 3322 is reflective (eg, layer 3232 may form a reflective surface at the boundary between layer 3322 and layer 3230). As shown in FIG. 120, the multilayer stack 3234 is a layer formed of a metal layer 3422 (e.g., AuSn / Au / Ti) to form a bonded multilayer stack 3244 (FIG. 121). Is then joined to a submount 3240 that includes a. After bonding the multilayer stack 3234 to the submount 3240, the substrate 3208 is formed (eg, etched, LLO, polished, or otherwise formed) to form the multilayer stack 3250 as shown in FIG. Epitaxial liftoff).

In another embodiment, as shown in FIG. 123, a layer of transparent material in the light emitted from the light emitting zone is deposited and etched on the p-doped semiconductor layer 3262 to form the transparent zone 3264. Reflective layer 3266 is stacked over the etched surface to form a controlled reflective surface 3268. Additional metal layers (eg, diffusion lamination and adhesion layers) may be laminated. Bonding and substrate removal can occur as described above. In an additional embodiment, a current spreading layer (eg, a layer consisting of Ni, ITO, Au, or RuO ₂ ) is deposited on the p-doped layer before lamination of the transparent layer. In some embodiments, the current spreading layer can be used as an etch stop while etching the transparent layer. Without wishing to be bound by theory, the use of a current spreading layer as an etch stop can help preserve the integrity of the p-surface ohmic contact. In addition, the mesa thickness can be controlled based on the lamination method used for the transparent material. In some embodiments, the adhesive layer may be incorporated before the reflective layer.

124 shows an LED 3100 including an n-doped layer 3110, a quantum well containing region 3112, a p-doped layer 3114 and a reflective layer 3118. Reflective layer 3118 is patterned to form areas of smaller thickness as indicated by arrow 3120 and to form areas of larger thickness as indicated by arrow 3122. Without wishing to be bound by theory, the periodicity of the patterning of layer 3118 may affect the resistivity of the layer. It is believed that the distance between the quantum well containing region 3112 and the reflective layer 3118 changes due to the pattern in the layer 3118 as indicated by the distances 3102, 3104.

Distances 3102 and 3104 may be selected to optimize or enhance the formation of standing waves in the LED 3100 in areas with a greater distance between the layer 3118 and the quantum well containing area 3112 and the layer 3118. And the formation of standing waves in the LED 3100 for the zone 3102 having a smaller distance between the quantum well containing zone 3112 and vice versa.

125 shows an LED 3300 including an n-doped layer 3302, a quantum well containing region 3304, a p-doped layer 3306 and a patterned reflective layer 3314. LED 3300 also includes a plurality of insulating layers 3316 disposed within the patterned region of patterned reflective layer 3314. Without wishing to be bound by theory, it is believed that patterning affects the resistivity of the reflective layer 3314 to render the patterned reflective layer polarization sensitive.

In general, the LED 3300 can be manufactured as desired. Typically, fabrication of LEDs 3300 includes various lamination, laser processing, lithography, and etching steps.

In some embodiments, the LED 3300 is manufactured by the method shown in FIGS. 126-113. 125 illustrates an LED wafer 3301 comprising a multilayer stack comprising a substrate 3308, a layer 3306, a layer 3304, and a layer 3302. Substrate 3308 may generally be as described above with respect to substrate 500 and layers 3306, 3304, 3302 may be as described above with respect to layers 506, 510, 512, respectively.

127 shows a multilayer stack 3310 comprising layers 3306, 3304, 3302 and substrate 3308 as described above. The multilayer stack 3310 also includes a metal layer 3312. Metal layer 3312 may be generally as described above with respect to metal layer 3212. As shown in FIG. 128, layer 3312 is patterned (e.g., using nano-imprint, deep-UV, e-beam, and holographic lithography), and (e.g., reactive ion etching, Using wet etching) to form patterned layer 3314. Etching extends into layer 3302 so that a pattern is formed in layer 3302.

As shown in FIG. 129, a passivation layer 3326 (e.g., a layer consisting of Si ₃ N ₄ , SiO ₂ , TiO ₂ , ITO) is deposited onto the patterned layer 3314. Layer 3326 may be a layer that is compatible such that layer 3326 is stacked onto the sidewalls and bottom of etched region 3325. As shown in FIG. 130, layer 3326 is etched to form a patterned passivation layer 3328 over the bottom and sidewalls of etched region 3325 with the top surface of layer 3314 exposed. do. As shown in FIG. 131, a metal layer 3332 is stacked over the top surface of the patterned passivation layer 3328 and the patterned reflective layer 3314. The metal layer 3332 may at least partially planarize the surface of the multilayer stack 3334. As shown in FIG. 132, the multi-layer stack 3334 has a metal layer 3332 (e.g., a layer composed of AuSn / Au / Ti) to form a bonded multi-layer stack 3344 (FIG. 133). The submount 3340 is included. After bonding the multilayer stack 3340 to the submount 3340, the substrate 3308 is removed to form the multilayer stack 3300 as shown in FIG.

As shown in FIGS. 125-133, the etched region extends into layer 3302 (FIG. 128), but in some embodiments, the etched region is layer 3302 into or through layer 3304. Extend further into).

134 and 135 show additional embodiments in which the back pattern suppresses light emission of one polarization with respect to another polarization. More specifically, Figure 134 illustrates an embodiment in which the mirror (e.g., metal mirror) is patterned with a set of air holes. Without wishing to be bound by theory, the pattern of air holes may create stronger perturbations due to differences in material properties, resulting in greater suppression of one polarization to another. 135 illustrates an embodiment in which the back pattern extends beyond the mirror or contact layer. In general, the holes may extend to various depths. For example, the hole may not extend beyond the contact layer, the hole may extend to both the contact layer and the mirror layer, or the hole may extend to the bonding layer. The hole may be air or other material, including for example a material from another layer. In some embodiments, Ni-containing material is used to form contacts and Ag-containing material is used to refill holes in the Ni layer. It may be advantageous according to the manufacturing process to manufacture an element having a pattern extending to the bonding layer.

Without wishing to be bound by theory, it is believed that breaking the uniformity of space using a reflective layer, such as a metal mirror, can alter the density of states. In general, electrons and holes in the LED are captured in an excited state during use. Electrons and holes can be relaxed from the excited state through a radiation process (e.g., by light emission) or a non-radioactive process (e.g. by heat dissipation). Without wishing to be bound by theory, it is believed that changing the relative density of states can change the relative strength of the two relaxation processes. If there are multiple emission processes (eg, emission of light with different polarizations), the emission of each polarization may be proportional to the corresponding density of the states. In some embodiments, it may be advantageous to alter the density of states to increase or maximize the emission of light with the first polarization and to reduce or minimize the emission of light with other polarizations (eg, orthogonal polarization).

Without wishing to be bound by theory, as mentioned above, one way of changing the density of states is to break the uniformity of the space as described in subsequent calculations. For subsequent calculations, the horizontal emitting planar light source is positioned at a distance d from the horizontal mirror. A boundary condition is used that sets the parallel electric field to zero at the mirror surface. Moreover, it is assumed that upon reflection the light experiences a π phase shift. Based on these boundary conditions, light sources at a quarter wavelength distance from the mirror will experience constructive interference with reflected waves and light sources at half wavelength distance will experience canceled interference with reflected waves. Assuming that the total number of states must be preserved, the density of states for constructive interfering waves will nearly double and the density of states for destructive interfering waves will be nearly zero. Based on constructive and destructive interference, there will be a wavelength at which emission is suppressed at a certain distance from the reflective surface, or equivalently, there will be a distance at which emission is suppressed for a given wavelength.

The data shown in FIG. 137 was calculated using a planar light source emitting white light in a wide frequency range. Calculations using the finite difference time zone (FDTD) assume that the energy emitted by the light source is directly proportional to the local density of the state. As shown in FIG. 136A, the light source 3400 positioned in the free space can be used to calculate the spectral energy E ₀ (λ) 3402a, 3402b emitted from the light sources in both directions. As shown in FIG. 136B, the light source 3404 positioned away from the reflective surface 3408 (e.g., Ag mirror) by a distance 3406 is the spectral energy E (λ) emitted from the light source in a direction away from the mirror. May be used to calculate 3410 (eg, the mirror is assumed to be optically thick). The data shown in FIG. 137 corresponds to the calculation of the ratio of spectral energy 3410 divided by the spectral energy of the light source in free space 3402a for various wavelengths of light when the light source is positioned at various distances from the reflective surface. . Line 3414 represents E (λ) / E ₀ (λ) when the light source is positioned at a distance of 100 nm from the reflective surface. Line 3416 represents E (λ) / E ₀ (λ) when the light source is positioned at a distance of 200 nm from the reflective surface. Line 3418 represents E (λ) / E ₀ (λ) when the light source is positioned at a distance of 1000 nm from the reflective surface.

In the data shown in FIG. 137, there is no difference between the two equivalent polarizations. Without wishing to be bound by theory, it is believed that the polarization source can be generated by destroying the symmetry of the reflective surface. For example, symmetry can be broken by introducing a pattern of raised portions 3420 and grooves 3424 in reflective surface 3422 as shown in FIGS. 138A and 138B. The reflective surface 3422 has a pattern with a width 3426 between the raised portion 3420 and a height 3428 between the groove 3424 and the surface of the raised portion 3420. Because of the patterned reflective surface 3422, the two polarizations see different efficient mirrors, and thus can obtain different phases after interacting with the reflective surface 3422.

140 and 141 have been calculated by using a light source positioned at a distance away from the reflective surface 3422. The calculations shown in FIGS. 140 and 141 assume boundary conditions of the displacement field at right angles in the continuous and metal sidewalls 3430 (FIG. 139A) of the parallel electric field. These boundary conditions introduce a frequency cut-off for parallel polarization 3432, where propagation conditions are not allowed. Additionally, these boundary conditions do not impose limits on orthogonal polarization 3434, so propagation conditions exist for multiple frequencies (as shown in FIG. 139B). Without wishing to be bound by theory, it is believed that both polarizations may pass through grooves 3424 above cutoff 3438 but polarizations will have different propagation constants and obtain different phases. Under cutoff 3438 only one of the two polarizations may pass through groove 3424. Thus, orthogonal polarization 3434 will reflect at the bottom of the mirror (eg, groove 3424) and parallel polarization 3432 will reflect at the top of the mirror (eg, raised portion 3420). . In some embodiments, it is believed that the mirror is not necessary on the upper side because parallel polarization 3432 cannot penetrate into the groove 3424 and will be reflected. For some embodiments, it may be advantageous to use more suitable ohmic contacts that may not be reflective.

The data shown in FIGS. 140 and 141 were calculated for both polarizations maintaining a pitch or distance between the bottom of the mirror (e.g., groove 3424) and the light source at 200 nm. FIG. 140 shows a plot of E (λ) / E ₀ (λ) for a reflective surface with a pattern having a pitch of 220 nm, a width 3426 of 110 nm, and a height 3428 of 100 nm. . FIG. 141 shows a diagram of E (λ) / E ₀ (λ) for a reflective surface having a pattern having a pitch of 220 nm, a width 3426 of 110 nm, and a height 3428 of 50 nm. In both cases, the calculations show wavelengths where one polarization is completely suppressed and the other has the largest improvement (eg, as indicated by arrows 3440 and 3442). In addition, there are a number of geometries and wavelengths that enhance light emission at one polarization and suppress light emission at another polarization for a particular wavelength.

The calculations shown in FIGS. 140 and 141 are based on plane wave sources, but other sources may be used. For example, a dipole source can introduce emissions in all directions. Interference conditions may vary for different incidence directions, but without wishing to be limited by theory, it is believed that the patterned layer can be used to at least partially suppress light emission into one polarization compared to other polarizations.

Without wishing to be bound by theory, patterning the top surface through which light is emitted can improve the extraction of one desired polarization and improve reflection of different polarizations. For example, light polarized parallel to the top surface pattern (but in any direction within the plane of the pattern) will predominantly propagate and thus be extracted in a direction perpendicular to the pattern, and light polarized at right angles to the pattern will It will propagate predominantly in a direction parallel to the pattern and will therefore be guided predominantly.

In some embodiments, the light emitting device can have a combination of polarizing the reflective layer pattern, polarizing the surface pattern, and / or polarizing the window. Alternatively or additionally, the window or LED surface may also include layer (s) of birefringent material that acts as a quarter wave plate and will convert linearly polarized light into circularly polarized light.

In some embodiments, the LED can include a plurality of patterned layers. The pattern of multiple patterned layers can be selected to enhance or achieve the desired effect (eg, extraction, collimation, polarization). For example, the LED may include a first patterned layer having a pattern that increases collimation of light coming from the surface of the LED and a second pattern that enhances or suppresses emission of light having a particular polarization.

In some embodiments, the light emitting device can include a layer of phosphor material coated on the surface 110, cover layer 140, and support 142.

In a particular embodiment, the light emitting device can include a cover layer 140 having a phosphor material disposed therein. In such embodiments, surface 110 may or may not be patterned.

In some embodiments, other methods of introducing anisotropy (eg, using an anisotropic material) to the propagation constant between two polarizations can be used. These materials may additionally be combined with the reflective layer.

In another embodiment, the light emitted by the light-generating region 130 is UV (or violet, or blue) and the phosphor layer 180 includes red phosphor material (e. _{G., L 2 O 2 S: Eu} 3 +), Green phosphor material (eg, ZnS: Cu, Al, Mn) and blue phosphor material (eg, (Sr, Ca, Ba, Mg) ₁₀ (PO ₄ ) ₆ Cl: Eu ²⁺ ).

Other embodiments are present in the claims.

Claims (56)

A panel having an edge having a thickness, A light emitting element having a surface and arranged such that light emitted therefrom impinges on an edge of the panel, The ratio of the width of the surface of the light emitting element to the thickness of the edge of the panel is from about 0.5 to about 1.1. The system of claim 1, wherein the panel comprises a liquid crystal display (LCD). The system of claim 1, wherein the length of the surface of the light emitting element is at least about 1 mm. The system of claim 1, wherein the length of the surface of the light emitting element is at least about 2 mm. The system of claim 1, wherein the length of the surface of the light emitting element is at least about 3 mm. The system of claim 1, wherein the length of the surface of the light emitting element is at least about 5 mm. The system of claim 1, wherein the length of the surface of the light emitting element is at least about 10 mm. The system of claim 1, wherein the ratio of the width of the surface of the light emitting device to the thickness of the edge of the panel is from about 0.75 to about 1.05. The system of claim 1, wherein the ratio of the width of the surface of the light emitting device to the thickness of the edge of the panel is from about 0.9 to about 1. 8. The system of claim 1, further comprising at least one optical component disposed between the light emitting element and the panel. The system of claim 10, wherein the at least one optical component comprises a light homogenizer. The system of claim 1, wherein the light emitting device is a non-lambertian light emitting device. The system of claim 1 wherein the light emitting device is a photonic lattice light emitting device. The light emitting device of claim 1, wherein the light emitting device comprises a multi-layer stack of material comprising a light generating zone and a first layer supported by the light generating zone, the surface of the first layer being generated by the light generating zone. The light configured to exit the light emitting element through the surface of the first layer. The system of claim 14, wherein the surface of the first layer has a dielectric function that varies spatially with the pattern, and the pattern has a detuning parameter with an ideal lattice constant and a value greater than zero. The system of claim 14, wherein the surface of the first layer has a dielectric function that varies spatially according to a nonperiodic pattern. The system of claim 14, wherein the surface of the first layer has a dielectric function that varies spatially with a complex periodic pattern. The system of claim 14, wherein the surface of the first layer has a dielectric function that varies spatially with a periodic pattern. The system of claim 1, wherein the light emitting element comprises a light emitting diode. The system of claim 1 wherein the light emitting device comprises a single light emitting device. The system of claim 1 wherein the light emitting device comprises a plurality of light emitting devices. The system of claim 21, wherein the plurality of light emitting elements are disposed in a serrated arrangement along the edge of the panel. The system of claim 1 wherein the plurality of light emitting elements are arranged in a plurality of columns. The system of claim 23, wherein the plurality of columns comprises at least a first column and a second column. The method of claim 24, The first column includes a plurality of light emitting elements configured to emit light of a first color, The second column includes a plurality of light emitting elements configured to emit light of a second color, The light of the first color and the second color are different systems. 27. The system of claim 25, wherein the third column comprises a plurality of light emitting elements configured to emit light of a third color, wherein light of the first, second and third colors are different. 27. The system of claim 26, wherein the first, second and third colors are selected from the group consisting of red, green and blue. The method of claim 1, wherein the edge comprises a first edge, the panel further comprises a second edge having a thickness, The system further comprises a light emitting element disposed such that light emitted therefrom impinges on the second edge of the panel. The system of claim 1, further comprising a cooling system configured to adjust the temperature of the light emitting diode during use. The system of claim 1 wherein the light emitting element is mounted on a heat sink device. A panel having an edge, An array of light emitting elements disposed such that light emitted therefrom impinges on the panel, The array of light emitting elements,  A first column of a light emitting device having a first edge and a second edge approximately perpendicular to the first edge, A second column of light emitting elements having a first edge, a second edge, and a third edge, The first and second edges of the second column are approximately parallel to the first edge of the first column, the second edge of the second column is approximately parallel to the second edge of the first column, and the second edge of the second column Is offset by at least about 0.05 mm from the second edge of the first column in a direction approximately perpendicular to the second edge of the first column. 32. The device of claim 31, further comprising a third column of light emitting devices having a first edge and a second edge, the first edge of the third column being approximately parallel to the third edge of the second column, The second edge is approximately parallel to the second edge of the second column and the second edge of the third column is at least about 0.05 mm from the second edge of the second column in a direction substantially perpendicular to the second edge of the first column. System being offset. 32. The system of claim 31, wherein the panel comprises a liquid crystal display (LCD). The method of claim 31, wherein The first column includes a plurality of light emitting elements configured to emit light of a first color, The second column includes a plurality of light emitting elements configured to emit light of a second color, The light of the first and second colors is different. 33. The system of claim 32, wherein the third column comprises a plurality of light emitting elements configured to emit light of a third color, wherein light of the first, second and third colors are different. 36. The system of claim 35, wherein the first, second and third colors are selected from the group consisting of red, green and blue. 33. The method of claim 32, The first column has a first width, The second column has a second width, The third column has a third width, The ratio of the sum of the first, second and third widths to the thickness of the edge of the panel is from about 0.5 to about 1.1. 32. The light emitting device of claim 31, wherein at least one of the light emitting devices in the array of light emitting devices comprises a first layer supported by the light generating zones, wherein a surface of the first layer is formed by the light generation of the first layer. A system configured to exit from the light emitting element through the surface. The system of claim 38, wherein the surface of the first layer has a dielectric function that varies spatially with the pattern, and the pattern has a detuning variable having an ideal lattice constant and a value greater than zero. The system of claim 38, wherein the surface of the first layer has a dielectric function that varies spatially with an aperiodic pattern. The system of claim 38, wherein the surface of the first layer has a dielectric function that varies spatially with a complex periodic pattern. The system of claim 8, wherein the surface of the first layer has a dielectric function that varies spatially with a periodic pattern. The system of claim 31, wherein the second column is offset by at least about 0.1 mm from the first column and the third column. The system of claim 31, wherein the second column is offset by at least about 0.2 mm from the first column and the third column. The system of claim 31, wherein the second column is offset by at least about 0.3 mm from the first column and the third column. The system of claim 31, wherein the second column is offset by at least about 0.5 mm from the first column and the third column. The system of claim 31, wherein the second column is offset by at least about 1 mm from the first column and the third column. 32. The system of claim 31, further comprising at least one optical component disposed between the light emitting element and the panel. 49. The system of claim 48, wherein at least one optical component is an optical homogenizer. 32. The system of claim 31, wherein the light emitting device is a non-lamberian light emitting device. 32. The system of claim 31, wherein the light emitting device is a photon lattice light emitting device. 32. The system of claim 31, wherein the light emitting element comprises a light emitting diode. 32. The system of claim 31, wherein the array of light emitting diodes comprises at least one light emitting diode selected from the group consisting of red light emitting diodes, blue light emitting diodes, and green light emitting diodes. 32. The system of claim 31, wherein the array of light emitting diodes comprises a red light emitting diode, a blue light emitting diode, and a green light emitting diode. 32. The system of claim 31, wherein the array of light emitting elements is disposed in a serrated arrangement along the edge of the panel. 32. The system of claim 31, further comprising a cooling system configured to adjust the temperature of the array of light emitting diodes during use.

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