KR20070109035A - Plasma display panel - Google Patents

Abstract

A plasma display panel is provided to reduce the reflective luminance and the happening of short circuit by forming only plural bus electrodes as a sustain electrode and a scan electrode. A first substrate(100) and a second substrate(125) are disposed opposite to each other, and barrier ribs(135) are interposed between the substrates to define discharge cells(150). Address electrodes(145) are formed in a first direction over the second substrate, and display electrodes are formed in a second direction intersecting the first direction over the first substrate. Each of the display electrodes has at least one pair of bus lines made of metal electrode. Each bus line has a first electrode layer and a second electrode which have different shrinkage rate.

Description

Plasma Display Panel {PLASMA DISPLAY PANEL}

1 is a partially exploded perspective view schematically illustrating a plasma display panel according to a first embodiment of the present invention.

FIG. 2 is a cross-sectional view illustrating a plane taken along the line II-II of FIG. 1.

3 is a cross-sectional view illustrating a first electrode layer and a second electrode layer forming a display electrode of a plasma display panel according to a first embodiment of the present invention.

FIG. 4 is a partial cross-sectional view of a shape in which the shape of the second electrode layer is larger than that of the first electrode layer in the display electrode of the plasma display panel.

5 is a plan view illustrating an arrangement relationship of display electrodes of a plasma display panel according to a second exemplary embodiment of the present invention.

6 is a partial cross-sectional view illustrating a display electrode of a plasma display panel according to a third exemplary embodiment of the present invention.

7 is a partial plan view of a display electrode of a plasma display panel according to a fourth exemplary embodiment of the present invention.

<Description of the symbols for the main parts of the drawings>

100: first substrate 105: scanning electrode

110: sustain electrode 115: first dielectric layer

120: protective layer 125: second substrate

130: second dielectric layer 135: partition wall

140: superconducting layer 145: address electrode

150: discharge cell 200: first electrode layer

205: second electrode layer

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel, and more particularly, to a plasma display panel including a display electrode formed only of a bus electrode without a transparent electrode, and such a display electrode being easily formed.

In general, a plasma display panel is a display device that implements an image by using a discharge phenomenon and has excellent display capability such as display capacity, brightness, contrast, afterimage, and viewing angle.

The plasma display panel is formed by sealing a first substrate and a second substrate between partition walls that partition discharge cells. The first substrate is provided with a sustain electrode and a scan electrode to correspond to the discharge cells, and the second substrate is provided with an address electrode to correspond to the discharge cells.

In this discharge cell, a discharge gas (for example, a mixed gas of neon Ne and xenon) is filled, and a mold layer for forming visible light of red, green, or blue color is formed, respectively.

The plasma display panel selects a discharge cell by address discharge by an address pulse applied to the address electrode and a scan pulse applied to the scan electrode, and applies the sustain pulse to the sustain electrode and the scan electrode of the selected discharge cell. Sustain discharge occurs.

Such sustain discharge generates ultraviolet rays as a kind of gas discharge, and the ultraviolet rays excite the phosphor in the discharge cell. The excited phosphors generate red, green, or blue visible light while stabilizing, and the visible light is appropriately combined to realize an image.

According to this plasma display panel, an image is realized such that the image gradually changes from the minimum brightness (low gradation) to the maximum brightness (high gradation) by the characteristics of the sustain pulses applied to the sustain electrode and the scan electrode. For this purpose, the unit light indicating the minimum brightness is required to be low.

On the other hand, the sustain electrode and the scan electrode provided on the first substrate are divided into a transparent electrode and a bus electrode, respectively. Each transparent electrode has a structure in which a transparent electrode covers a substantial portion of the discharge cells as a part causing mutual surface discharge. In addition, the transparent electrode is formed of a transparent material such as indium tin oxide (ITO) so that visible light passes easily, while the bus electrode is formed of a material having excellent conductivity.

In a plasma display panel using a transparent electrode and a bus electrode, the transparent electrode has a problem of not only poor conductivity but also a complicated manufacturing process. In addition, since the transparent electrode is a transparent material, there is a limit to increasing the black portion of the panel.

On the other hand, a bus electrode passes through each of the discharge cells, and a sustain electrode and a scan electrode are formed on the bus electrode. When the bus electrode is disconnected, current is not easily applied to the sustain electrode and the scan electrode. There is a problem that this is not formed.

In addition, the bus electrode is usually formed on the front substrate, the bus electrode includes a plurality of layers of the first electrode layer and the second electrode layer. The first electrode layer is formed on the first substrate, and since the first electrode layer has a dark color, the absorption rate of the plasma display panel is increased. In addition, the second electrode layer is formed of a material such as Ag having good conductivity.

On the other hand, after forming the heterogeneous second electrode layer on the first electrode layer, the bus electrode is formed through the firing process, wherein the shape of the bus electrode is deformed differently from the originally intended shape due to the difference in shrinkage of the first electrode layer and the second electrode layer. There is a problem.

An object of the present invention is to provide a plasma display panel in which a display electrode formed of a bus electrode without a transparent electrode can be prevented from being deformed during the firing process.

According to an embodiment of the present invention, a plasma display panel includes a first substrate and a second substrate that are disposed to face each other at a distance, a partition wall disposed between the first substrate and the second substrate to partition a plurality of discharge cells, and the discharge. A mold layer formed on an inner surface of the cell, an address electrode formed in a first direction adjacent to the second substrate, and a second direction adjacent to the first substrate and intersecting the first direction, wherein the respective discharges And a display electrode disposed to form a discharge gap corresponding to the cell, wherein each display electrode is formed of at least one pair of bus lines formed of metal electrodes, each bus line comprising: a first electrode layer having different shrinkage ratios; And a second electrode layer.

The first electrode layer and the second electrode layer of the bus line are in close contact with each other.

The first electrode layer of each bus line is formed closer to the first substrate side, and the second electrode layer is formed closer to the second substrate side.

The first electrode layer of each bus line is formed in contact with the first substrate.

In the firing process, the first electrode layer has a larger shrinkage rate than the second electrode layer.

The first electrode layer has a dark color close to black.

The width of the first electrode layer and the width of the second electrode layer of each bus line are formed to be the same.

The width of the first electrode layer of each bus line is greater than the width of the second electrode layer.

Each display electrode is formed of three bus lines.

Each display electrode is formed of two bus lines.

And a connection bar corresponding to each of the discharge cells, crossing the bus lines of the display electrodes and connecting them to each other.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention. In the drawings, parts irrelevant to the description are omitted in order to clearly describe the present invention, and like reference numerals designate like elements throughout the specification.

1 is a partially exploded perspective view schematically illustrating a plasma display panel according to a first embodiment of the present invention.

As shown in FIG. 1, a plasma display panel includes a first substrate 100 on an upper side thereof, and a sustain electrode 110 and a scan electrode 105 on a lower surface of the first substrate 100 in a third direction. The first dielectric layer 115 is formed on the sustain electrode 110 and the scan electrode 105, and a protective layer 120 is further formed on the first dielectric layer 115. The sustain electrode 110 and the scan electrode 105 are called display electrodes.

In addition, the plasma display panel includes a second substrate 125 on the lower side, and an address electrode 145 is formed on the upper surface of the second substrate 125 in a first direction (x-axis direction in the drawing). The second dielectric layer 130 is formed on the electrode 145. In addition, the first partition wall 135a is formed in a first direction (x-axis direction in the drawing) on the outer surface of the second dielectric layer 130, and the second partition wall 135b is formed in a second direction (y-axis direction in the drawing). The discharge cell 150 is partitioned by the first partition 135a and the second partition 135b, and is formed along the inner surface of the partition 135 and the outer surface of the first dielectric layer 115. 140 is formed.

The sustain electrode 110 includes a first sustain bus line 110a, a second sustain bus line 110b, and a third sustain bus line 110c, and the scan electrode 105 includes the first scan bus line 105a. And a second scan bus line 105b and a third scan bus line 105c.

The connection bar 150 electrically connects the first sustain bus line 110a, the second sustain bus line 110b, and the third sustain bus line 110c, and the first scan bus line 105a and the second scan. The bus line 105b and the third scan bus line 105c are electrically connected to each other. In addition, the connection bar 150 is formed corresponding to each discharge cell 150.

The partition wall 135 is formed at a predetermined height between the first substrate 100 and the second substrate 125 to partition the plurality of discharge cells 150, and the discharge cells 150 include an inert gas (eg, Ne). And a discharge gas of Xe). Such a discharge gas facilitates discharge between the sustain electrode 110 and the scan electrode 105. By this discharge, the plasma display panel realizes an image.

In order to cause the discharge cells 150 to discharge, an address electrode 145, a sustain electrode 110, and a scan electrode 105 are provided along the discharge cells 150. Meanwhile, the first dielectric layer 115 and the second dielectric layer 130 cover the address electrode 145, the sustain electrode 110, and the scan electrode 105, respectively, and prevent them from being damaged from discharge. In addition, when an address pulse is applied to the address electrode 145 and a scan pulse is applied to the scan electrode 105, wall charges are formed or accumulated around the electrode to facilitate discharge.

The protective layer 120 formed on the lower surface of the first substrate 100 is a transparent material to easily transmit visible light emitted from the mold layer 140 and to protect the first dielectric layer 115 from discharge. In addition, the secondary electron emission coefficient is increased to lower the discharge start voltage so that the discharge occurs easily.

On the other hand, in the plasma display panel, a reset pulse is applied to the scan electrode 105, followed by a scan pulse to the scan electrode 105 and an address pulse to the address electrode 145 followed by the reset pulse. And an address discharge occur between and the address electrode 145. Thereafter, the discharge is caused by the sustain pulses applied to the sustain electrode 110 and the scan electrode 105.

The sustain electrode 110, the scan electrode 105, and the address electrode 145 both transmit electrical signals, and may play different roles depending on the waveform of the voltage applied to each other. It is not limited.

As shown in the embodiment, the first sustain bus line 110a, the second sustain bus line, and the third sustain bus line 110c form the sustain electrode 110, and the first scan bus line 105a, The second scan bus line and the third scan bus line 105c form the scan electrode 105, and the discharge is generated between the sustain electrode 100 and the scan electrode 105 to implement an image. That is, the sustain electrode 100 is formed of three bus lines, and the scan electrode 105 is also formed of three bus lines.

In this embodiment, since no transparent electrode is formed in the bus line, the manufacturing process of the plasma display panel is simplified and the production cost is saved. In addition, although the sustain electrode 110 and the scan electrode 105 are each formed of three bus lines, there is no particular limitation on the number.

FIG. 2 is a cross-sectional view illustrating a plane taken along the line II-II of FIG. 1.

As shown in FIG. 2, the sustain electrode 110 is formed of a first sustain bus line 110a, a second sustain bus line 110b, and a third sustain bus line 110c. The first scan bus line 105a, the second scan bus line 105b, and the third scan bus line 105c are formed. The sustain electrode 110 and the scan electrode 105 are also referred to as display electrodes.

Since the sustain electrode 110 and the scan electrode 105 are each formed of three electrode lines, the risk of disconnection is reduced.

On the other hand, the display electrode consisting of the sustain electrode 110 and the scan electrode 105 is divided into a first electrode layer 200 and a second electrode layer 205, respectively. Since the first electrode layer 200 has a dark color, the first electrode layer 200 easily absorbs light. Therefore, the first electrode layer 200 increases the black portion of the plasma display panel and improves the contrast so that an image can be easily implemented.

By controlling the number of bus electrodes forming the display electrode, the black ratio and contrast of the plasma display panel can be easily adjusted.

3 is a cross-sectional view illustrating a first electrode layer and a second electrode layer forming a display electrode of a plasma display panel according to a first embodiment of the present invention.

As shown in FIG. 3, the first electrode layer 200 is formed on one side of the first substrate 100, and the second electrode layer 205 is formed thereon. In addition, the first electrode layer 200 and the second electrode layer 205 are covered with the first dielectric layer 115, and a protective layer 120 is further formed on the outer surface of the first dielectric layer 115. This protective layer is formed of a film composed of MgO components.

Formation methods of the first electrode layer 200 and the second electrode layer 205 include photoetching, lift off, and pattern printing. Detailed description of the method is omitted.

In the present embodiment, the first electrode layer 200 is first formed on the first substrate 100, the second electrode layer 205 is formed thereon, and the first electrode layer 200 and the second electrode layer 205 are formed. Afterwards, an additional process of a heating or drying process is performed. In this additional process, the first electrode layer 200 and the second electrode layer 205 are contracted, respectively.

The shrinkage ratios of the first electrode layer 200 and the second electrode layer 205 are also different. The shape of the first electrode layer 200 and the second electrode layer 205 is changed according to the shrinkage rate.

In more detail, when the shrinkage of the first electrode layer 200 is larger than that of the second electrode layer 205, the first electrode layer 200 causes the edge end of the second electrode layer 205 to bend downward. The phenomenon that the edge portion of the first electrode layer 200 is separated from the first substrate 100 can be reduced.

FIG. 4 is a partial cross-sectional view of a shape in which the shape of the second electrode layer is larger than that of the first electrode layer in the display electrode of the plasma display panel.

In the first electrode layer 200 and the second electrode layer 205, when the shrinkage rate of the second electrode layer 205 is greater than the shrinkage rate of the first electrode layer 200, as illustrated in FIG. 4, the second electrode layer 205 may be formed. The edge end is bent upwards. Therefore, the edge portion of the first electrode layer 200 is separated from the first substrate 100.

As shown in FIG. 4, a fine gap 400 is formed between the first substrate 100 and the first electrode layer 200. When the first electrode layer 200 and the second electrode layer 205 are formed and the second dielectric layer 130 is formed, the gap 400 is not filled and bubbles are formed therein. In addition, the shape of the first electrode layer 200 and the second electrode layer 205 is deformed, so that the discharge is not easily generated in the discharge cell 150.

5 is a plan view illustrating an arrangement relationship of display electrodes of a plasma display panel according to a second exemplary embodiment of the present invention.

As shown in FIG. 5, the first partition 135a is formed in the first direction (the x-axis direction in the drawing), and the second partition 135b is formed in the third direction. In addition, the discharge cell 150 is partitioned by the first partition 135a and the second partition 135b, and the sustain electrode 110 and the scan electrode 105 pass through each discharge cell 150, and the discharge cell ( On the inner surface of the 150 is a mold layer 140 is formed.

Three bus lines of the sustain electrode 110 are formed of a first sustain bus line 110a, a second sustain bus line 110b, and a third sustain bus line 110c. In particular, the difference from the first embodiment is that the connection bar 150 is not formed. On the other hand, each of the sustain electrodes 100 is integrated into one line outside the discharge cell 150.

In the embodiment of the present invention, three lines are integrated into one line, but two of the three lines may be integrated into one line and one line may be provided as a separate line, and three lines may be formed separately. May be

Like the sustain electrode 100, three bus lines of the scan electrode 105 are formed of the first scan bus line 105a, the second scan bus line 105b, and the third scan bus line 105c. In particular, the difference from the first embodiment is that the connection bar 150 is not formed. On the other hand, outside the discharge cell 150, each scan electrode 105 is integrated into one line.

In the embodiment of the present invention, three lines are integrated into one line, but two of the three lines may be integrated into one line and one line may be provided as a separate line, and three lines may be formed separately. May be

6 is a partial cross-sectional view illustrating a display electrode of a plasma display panel according to a third exemplary embodiment of the present invention.

The sustain electrode 100 is formed on the first substrate 100. The sustain electrode 100 is divided into a first electrode layer 200 and a second electrode layer 205. The sustain electrode 100 is covered with the first dielectric layer 115, and a protective layer 120 is further formed on the first dielectric layer 115.

As shown in FIG. 6, the width W1 of the first electrode layer is longer than the width W2 of the second electrode layer.

When the sustain electrode 100 is made, first the first electrode layer 200 and the second electrode layer 205 are formed, followed by the firing process. After the firing process, the first dielectric layer 115 and the protective layer 120 are formed.

When the first electrode layer 200 and the second electrode layer 205 are formed, the width W1 of the first electrode layer is formed longer than the width W2 of the second electrode layer. Therefore, when the shrinkage rate of the first electrode layer 200 is greater than the export rate of the second electrode layer 205, the width W1 of the first electrode layer does not become shorter than the width W2 of the second electrode layer after the firing process is finished. do.

When the width W1 of the first electrode layer is long and the first electrode layer 200 has a dark color, visible light is easily absorbed in a large area. Therefore, the black fraction of the plasma display panel increases, resulting in an increase in bright room contrast. In addition, the reflected luminance is reduced, so that the image is easily realized.

7 is a partial plan view of a display electrode of a plasma display panel according to a fourth exemplary embodiment of the present invention.

As shown in FIG. 7, the first partition 135a is formed in the first direction (the x-axis direction in the drawing), and the second partition 135b is formed in the third direction. In addition, the discharge cell 150 is partitioned by the first partition 135a and the second partition 135b, and the sustain electrode 110 and the scan electrode 105 pass through each discharge cell 150, and the discharge cell ( On the inner surface of the 150 is a mold layer 140 is formed.

The sustain electrode 110 is formed of two bus lines, a first sustain bus line 110a and a second sustain bus line 110b. On the other hand, each of the sustain electrodes 100 is integrated into one line outside the discharge cell 150.

In the embodiment of the present invention, the sustain electrode 100 is formed of two lines, and these two lines are connected to one line. However, two lines may be provided separately.

Like the sustain electrode 100, the scan electrode 105 is formed of two bus lines, a first scan bus line 105a and a second scan bus line 105b. In particular, the difference from the first embodiment is that the connection bar 150 is not formed. On the other hand, outside the discharge cell 150, each scan electrode 105 is integrated into one line.

In the embodiment of the present invention, the scan electrode 105 is formed of two lines, and these two lines are connected to one line. However, two lines may be provided separately.

Although the preferred embodiments of the present invention have been described above, the present invention is not limited thereto, and various modifications and changes can be made within the scope of the claims and the detailed description of the invention and the accompanying drawings. Naturally, it belongs to the scope of the invention.

As described above, according to the plasma display panel according to the present invention, the manufacturing process is simplified by forming the sustain electrode and the scan electrode only as the bus electrode, thereby reducing the manufacturing cost.

In addition, since the sustain electrode and the scan electrode are formed of only a plurality of bus electrodes, the reflection luminance is reduced and the risk of disconnection is reduced.

In addition, by using a material having a smaller shrinkage ratio of the second electrode layer than the first electrode layer, there is an effect of preventing the shape of the first electrode layer and the second electrode layer from being deformed.

Claims (11)

A first substrate and a second substrate disposed to face each other at intervals; Barrier ribs disposed between the first substrate and the second substrate to partition a plurality of discharge cells; A mold layer formed on an inner surface of the discharge cell; An address electrode formed in a first direction adjacent to the second substrate; And A display electrode formed in a second direction adjacent to the first substrate and crossing the first direction, and formed to form a discharge gap corresponding to each of the discharge cells; Each of the display electrodes is formed of at least one pair of bus lines formed of metal electrodes, Each bus line includes a first electrode layer and a second electrode layer having different shrinkage rates. According to claim 1, And a first electrode layer and a second electrode layer of the bus line are in close contact with each other. According to claim 1, The first electrode layer of each of the bus lines is formed closer to the first substrate side, and the second electrode layer is formed closer to the second substrate side. The method of claim 3, wherein And the first electrode layer of each of the bus lines is formed in contact with the first substrate. The method of claim 3, wherein The first display electrode layer has a shrinkage greater than the second electrode layer during the firing process. The method of claim 3, wherein The dark index plasma display panel of which the first electrode layer is close to black. The method of claim 3, wherein And a width of the first electrode layer and a width of the second electrode layer of each of the bus lines are equal to each other. The method of claim 3, wherein And a width of the first electrode layer of each of the bus lines is greater than a width of the second electrode layer. According to claim 1, And each display electrode is formed of three bus lines. According to claim 1, And each display electrode is formed of two bus lines. According to claim 1, And a connection bar corresponding to each of the discharge cells and intersecting with the bus lines of the display electrodes and connecting them to each other.

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