KR20070101712A - Lcd controller supporting both sync interface type and cpu interface type - Google Patents

Abstract

An LCD(Liquid Crystal Display) controller is provided to support an SYNC interface type and a CPU interface type by using an LCD module for mixing at least two or more image data. An LCD controller includes first and second buffers(221,222), an image processing unit(225), a CPU interface instruction delivering unit(223) and a timing controller(224). The first and second buffers receive first and second image data, and store the received data, respectively. The image processing unit processes the first and second image data from the first and second buffers, and outputs the processed data signal to an LCD module. The CPU interface instruction delivering unit delivers a CPU interface instruction signal to the LCD module when the LCD module is operated in a CPU interface instruction type. The timing controller supplies timing control signals to the LCD module.

Description

LCD controller supporting both SYNC interface type and CPU interface type

BRIEF DESCRIPTION OF THE DRAWINGS In order to understand the drawings referred to in the detailed description of the invention, a brief description of each drawing is provided.

1 is a view showing a part of a conventional LCD device.

2 is a view showing an LCD controller according to a preferred embodiment of the present invention.

3A to 3C are diagrams illustrating timing control signals output by the timing controller 224 of FIG. 2 according to the interface method of the LCD module 230.

<Description of Reference Number in Drawing>

102: storage unit 104: processor

110: system bus 120: LCD controller

130: LCD module 132: gate driver

134: source driver 136: LCD panel

210: system bus 220: LCD controller

221: first buffer 222: second buffer

223: CPU interface command transfer unit

224: timing controller

225: image processing unit 226: mixing unit

227: dithering unit 228: gamma correction unit

229: color-key processing unit 230: LCD module

The present invention relates to an LCD controller, and more particularly, to an LCD controller supporting both a SYNC interface method and a CPU interface method.

Liquid crystal display (LCD) devices are display devices applied to various fields. In particular, TFT-LCD (Thin Film Transistor-LCD) devices are widely used in current notebooks, desktops, mobile communication terminals, and portable game machines.

1 is a view showing a part of a conventional LCD device.

1 illustrates a storage unit 102 such as a dynamic random access memory (DRAM) or a flash memory for storing image data input from the outside, a processor 104, a system bus 110, an LCD controller 120, and an LCD module ( 130 is shown. The LCD module 130 includes a gate driver 132, a source driver 134, and an LCD panel 136.

The image data output from the storage unit 102 and the command signal output from the processor 104 are input to the LCD controller 120 through the system bus 110.

The LCD controller 120 transmits a command signal received through the system bus 110 to the LCD module 130, or processes the image data received through the system bus 110 to process the image data, thereby processing the image signal. Output to 130. In addition, the LCD controller 120 is also responsible for providing timing control signals necessary for driving the LCD module 130 to the LCD module 130.

The LCD panel 136 includes a plurality of gate lines and a plurality of source lines respectively corresponding to the plurality of pixels. The gate line is driven by the driving voltage output by the gate driver 132, and the source line is driven by the driving voltage output by the source driver 134. The source driver 134 receives a data signal processed by the LCD controller 120 and converts the image signal into a gray level voltage, and amplifies the gray voltage output from the decoder to provide a driving voltage to the source line. An amplifier Amp etc. to apply are provided.

An interface type for driving the LCD module 130 includes a SYNC interface and a CPU interface. The SYNC interface method is a method of outputting image data in accordance with a frame and a line by timing control by a vertical sync signal VSYNC, a horizontal sync signal HSYNC, a clock signal, and the like. In the SYNC interface method, it is common for image data not to separately pass through a graphic memory. In the CPU interface method, image data is controlled by timing control using a register select signal (RS), a chip select signal (CS), a write enable signal, and a read enable signal. This is the way of output. In the CPU interface method, the image data is usually output to the LCD module 130 via the graphics memory. CPU interface methods can be divided into 6800 series and 8080 series.

However, the conventional LCD controller 120 could support only one interface method among the SYNC interface method and the CPU interface method. Therefore, in order to drive the LCD module 130 operating in the SYNC interface method, the LCD controller 120 supporting the SYNC interface method should be used, and the CPU interface in order to drive the LCD module 130 operating in the CPU interface method. LCD controller 120 to support the method had to be used.

In addition, the LCD controller 120 supporting the CPU interface method does not provide a function of mixing and outputting two or more pieces of image data, and gamma the function of dithering the image data or the image data. It also did not provide the function of gamma-correction processing.

An object of the present invention is to provide an LCD controller supporting both a SYNC interface method and a CPU interface method. The present invention also provides an LCD controller capable of mixing and outputting two or more image data in the case of a CPU interface method.

The LCD controller according to the present invention includes a first buffer, a second buffer, an image processor, a CPU interface command transmitter, and a timing controller. The first buffer receives and stores the first image data, and the second buffer receives and stores the second image data. The image processor may process the first image data or the second image data input from the first buffer or the second buffer and output an image processed data signal to an LCD (Liquid Crystal Display) module. The CPU interface command transfer unit transmits an input CPU interface command signal to the LCD module when the LCD module operates in a CPU interface manner. The timing controller provides timing control signals for driving the LCD module to the LCD module. LCD controller according to the invention is characterized in that it can support both the SYNC interface method and the CPU interface method.

In one embodiment of the present invention, the LCD controller, when the LCD module is an LCD module operating in the SYNC interface method, supports the interface according to the SYNC interface method, the LCD module is the CPU interface method In the case of the LCD module that operates in accordance with the CPU interface method supports the interface.

In one embodiment of the present invention, the timing controller outputs timing control signals according to the SYNC interface method or timing control signals according to the CPU interface method according to the interface method of the LCD module.

In one embodiment of the present invention, the image processing unit, in response to a mixing control signal, the mixing unit (Mixing unit) responsible for mixing the first image data and the second image data (Mixing unit) Equipped.

In one embodiment of the present invention, the image processing unit, in response to a dithering control signal, the dithering unit responsible for dithering and outputting the first image data or the second image data (Dithering) unit).

In one embodiment of the present invention, the image processing unit, in response to a gamma correction control signal, responsible for the gamma correction processing and outputting the first image data or the second image data. Gamma-Correction unit is provided.

In one embodiment of the present invention, the image processing unit, in response to the color-key (Color-key) control signal, performs a color-key processing and outputting the first image data and the second image data. It is provided with a color-key unit in charge.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. In describing the present invention, if it is determined that the detailed description of the related well-known configuration or function may unnecessarily obscure the subject matter of the present invention, the detailed description thereof will be omitted.

2 is a view showing an LCD controller according to a preferred embodiment of the present invention.

2 shows a system bus 210, an LCD controller 220, and an LCD module 230. The LCD controller 220 according to an exemplary embodiment of the present invention includes a first buffer 221, a second buffer 222, a CPU interface command transfer unit 223, a timing controller 224, and an image processor 225. do. As shown in FIG. 2, the image processor 225 may include a mixing unit 226, a dithering unit 227, a gamma correction unit 228, and a color-key processing unit. 229) may be provided with image processing blocks.

The LCD controller 220 according to the present invention may support both the SYNC interface method and the CPU interface method. That is, the LCD controller 220 according to the present invention supports the interface according to the SYNC interface method when the LCD module 230 is an LCD module operating in the SYNC interface method, and the LCD module 230 uses the CPU interface method. In the case of a running LCD module, the CPU interface supports the interface. The first buffer 221, the second buffer 222, and the image processor 225 in FIG. 2 are components that operate regardless of how the interface of the LCD module 230 is applied, and the CPU interface command transfer unit. 223 is a component that operates when the interface method of the LCD module 230 is a CPU interface method, and the timing controller 224 distinguishes which method is the interface method of the LCD module 230. Each element operates differently depending on the interface type of the).

The first buffer 221, the second buffer 222, and the image processor 225 perform image processing on the image data received from the system bus 210 and output the processed image signal to the LCD module 230. These are the necessary components. The first buffer 221, the second buffer 222, and the image processor 225 operate without discriminating what kind of interface the LCD module 230 has.

The CPU interface command transfer unit 223 is responsible for transferring the CPU interface command signal input from the system bus 210 to the LCD module 230 when the LCD module 230 operates in the CPU interface method. . In the CPU interface method, a command signal in addition to the image data must also be transmitted to the LCD panel 230, so that the CPU interface command transfer unit 223 temporarily stores the CPU interface command signal input from the system bus 210. After output to the LCD module 230. When the interface method of the LCD module 230 is the VSYNC interface method, since the CPU interface command signal is not required to be transmitted, the CPU interface command transfer unit 223 does not perform a separate operation.

The timing controller 224 is responsible for providing timing control signals to the LCD module 230 for driving the LCD module 230. In particular, the timing controller 224 of the LCD controller 220 according to the present invention distinguishes which method of the interface method of the LCD module 230, and different timing control signals according to the interface method of the LCD module 230. Output them. That is, the timing controller 224 outputs timing control signals according to the SYNC interface method to the LCD module 230 when the LCD module 230 is an LCD module operating in the SYNC interface method, and the LCD module 230 controls the CPU. In the case of the LCD module operating in the interface method, timing control signals according to the CPU interface method are output to the LCD module 230. Timing control signals output by the timing controller 224 according to the interface method of the LCD module 230 are described in detail in the description of FIGS. 3A to 3C.

The function of the image processor 225 will be described in more detail.

The mixing unit 226 of the image processing unit 225 receives the first image data and the second buffer 222 input from the first buffer 221 in response to a mixing control signal (not shown). It is responsible for mixing (Mixing) the second image data input from. In the present invention, the LCD controller 220 includes two or more buffers 221 and 222 for mixing two or more image data. By mixing two or more pieces of image data, a screen containing subtitles or a composite screen may be displayed.

In the LCD controller 220 according to the present invention, not only in the case of the VSYNC interface system but also in the case of the CPU interface system, two or more images are generated by the first buffer 221, the second buffer 222, and the mixing unit 226. A function of mixing data may be performed.

The dithering unit 227 of the image processor 225 is responsible for dithering and outputting the first image data or the second image data in response to a dithering control signal (not shown). do.

Dithering means converting multi-gradation image data exceeding the resolution of the LCD panel into multi-gradation image data suitable for the resolution of the LCD panel when multi-gradation image data exceeding the resolution of the LCD panel is input. Refers to the technology to output. By means of proper dithering, smooth borders or stair-shaped bumpy contours can be displayed smoothly at low resolution.

A gamma correction unit 228 of the image processor 225 gamma corrects the first image data or the second image data in response to a gamma correction control signal (not shown). It is in charge of processing and outputting.

Gamma-Correction refers to correcting the data voltage level interval so that the linear output luminance characteristic appears in consideration of the fact that the relationship between the data voltage and the output luminance in the LCD panel has an S-linear nonlinear characteristic. .

The color-key unit 229 of the image processor 225 may transmit the first image data and the second image data in response to a color-key control signal (not shown). It is responsible for color-key processing.

Color-key processing is performed by removing a specific color part from an image photographed by placing a plate of a specific color on a background of a person or an object and replacing the image part from which the specific color is removed with another image. It's about getting an effect. For example, in a weather forecast scene, a video with a blue plate installed in the background of the weather forecaster removes the blue background and only the weather forecaster remains, and other images necessary for the weather forecast (diary, satellite, etc.). You can compose a picture of a cloud, etc., to make the necessary weather forecast screen. Color-key may mean the specific color as a background, or may mean such an image processing technique.

3A to 3C are diagrams illustrating timing control signals output by the timing controller 224 of FIG. 2 according to the interface method of the LCD module 230. 3A to 3C, not only timing control signals but also data signals are shown together in order to compare timing between respective signals.

3A illustrates a case in which the interface method of the LCD module 230 is a CPU interface method of the 6800 series. In FIG. 3A, RS denotes a register select signal, RW denotes a read / write division signal, CSB denotes a chip select signal, and E denotes an enable signal. DB_W represents a data write (Data_Write) signal, and DB_R represents a data read (Data_Read) signal.

3B illustrates a case in which the interface method of the LCD module 230 is a CPU interface method of the 8080 series. In FIG. 3B, RS represents a register select signal, CS represents a chip select signal, / RD represents a read enable signal, and / WR represents a write enable signal. enable) signal, DB_W represents a data write (Data_Write) signal, DB_R represents a data read (Data_Read) signal.

3C illustrates a case in which the interface scheme of the LCD module 230 is a VSYNC interface scheme. In FIG. 3C, VSYNC represents a vertical sync signal, HSYNC represents a horizontal sync signal, VCLK represents a clock signal, and VD represents a data signal. VDEN represents a data enable signal.

In the above described the present invention with reference to the specific embodiment shown in the drawings, but this is only exemplary, those of ordinary skill in the art to which the present invention belongs will be able to various modifications and variations therefrom. Therefore, the protection scope of the present invention should be interpreted by the claims to be described later, and all the technical ideas within the equivalent and equivalent ranges should be construed as being included in the protection scope of the present invention.

As described above, the present invention has the following effects.

First, only one LCD controller can support both SYNC interface and CPU interface.

Second, even when operating in a CPU interface method, two or more types of image data may be mixed and output.

Claims (7)

A first buffer configured to receive and store first image data; A second buffer configured to receive and store second image data; An image processor configured to image-process the first image data or the second image data input from the first buffer or the second buffer, and output an image processed data signal to a liquid crystal display (LCD) module; A CPU interface command transfer unit configured to transfer an input CPU interface command signal to the LCD module when the LCD module operates in a CPU interface method; And A timing controller for providing timing control signals to the LCD module for driving the LCD module; And an SYNC interface system and a CPU interface system. The method of claim 1, The LCD controller, If the LCD module is an LCD module operating in the SYNC interface method, and supports the interface according to the SYNC interface method, And the LCD module supports an interface according to the CPU interface method when the LCD module is an LCD module operating according to the CPU interface method. The method of claim 2, The timing controller, And output timing control signals according to the SYNC interface method or timing control signals according to the CPU interface method according to the interface method of the LCD module. The method of claim 1, The image processor, And a mixing unit configured to mix the first image data and the second image data in response to a mixing control signal. The method of claim 1, The image processor, And a dithering unit configured to dither and output the first image data or the second image data in response to a dithering control signal. The method of claim 1, The image processor, And a gamma correction unit configured to perform a gamma correction process on the first image data or the second image data and output the gamma correction unit in response to a gamma correction control signal. LCD controller. The method of claim 1, The image processor, In response to a color-key control signal, comprising a color-key processing unit (Color-key unit) responsible for the color-key processing and outputting the first image data and the second image data; LCD controller, characterized in that.

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