KR20070079615A - Liquid crystal display and repair method of the same - Google Patents

Abstract

An LCD(Liquid Crystal Display) and a repairing method thereof are provided to equip a redundancy transistor connected in parallel to an output transistor at each shift register. A first gate driving circuit includes plural shift registers connected with sides of plural gate lines and for driving the plural gate lines. The second gate driving circuit includes plural shift registers connected with the other sides of plural gate lines and for driving the plural gate lines. The plural shift registers include the first transistor(TR1) for driving each gate line. A redundancy transistor(45) is electrically connected with the output line of the first transistor. The first bridge electrode(60) is overlapped with the output line of the first transistor. Plural repair lines are crossed with each gate line and overlapped with the input lines of the shift registers connected with the gate lines at the before and next stages.

Description

Liquid crystal display and repair method thereof {LIQUID CRYSTAL DISPLAY AND REPAIR METHOD OF THE SAME}

1 is a plan view illustrating a liquid crystal display according to an exemplary embodiment of the present invention.

FIG. 2 is a block diagram illustrating each shift register included in the gate driving circuit shown in FIG. 1.

3 is a block diagram illustrating an output unit of the shift register illustrated in FIG. 2.

4 is a block diagram illustrating a liquid crystal display according to a second embodiment of the present invention.

5 is a block diagram illustrating a liquid crystal display according to a third exemplary embodiment of the present invention.

6 is a block diagram showing an output of the shift register on the other side when a bad shift register is generated.

FIG. 7 is a diagram illustrating a liquid crystal display after repairing the liquid crystal display shown in FIG. 4 when a bad shift register is generated.

FIG. 8 is a diagram illustrating a liquid crystal display after repairing the liquid crystal display shown in FIG. 5 when a bad shift register is generated.

9 is a flowchart sequentially illustrating a repairing method of a liquid crystal display according to an exemplary embodiment of the present invention.

<Brief Description of Drawings>

10: liquid crystal panel 20: thin film transistor substrate

30: first gate driving circuit 31: second gate driving circuit

41: control unit 42: output unit

44: first output line 45: redundancy transistor

46: second output line 47: first node

48: second node 51: first signal line

52: second signal line 60: first bridge electrode

90: repair line

61, 62, 91 to 93, 101, 102: shorting point

100: second bridge electrode

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device having a redundancy transistor connected in parallel with an output transistor in each of the shift registers included in a gate driving circuit, and to preventing display defects due to a shift register failure. It is about.

BACKGROUND ART In general, a liquid crystal display device includes a backlight unit for providing light, a liquid crystal panel for displaying an image by adjusting the transmittance of light from the backlight unit, a gate driving circuit for driving a gate line of the liquid crystal panel, and a gate driving circuit for driving the gate driving circuit. A gate printed circuit board, a data driving circuit for driving data lines of a liquid crystal panel, and a data printed circuit board for driving a data driving circuit are included.

In the conventional liquid crystal display device having the above-described configuration, the gate driving circuit is connected to the liquid crystal panel and the gate printed circuit board in a state of being mounted on a gate tape carrier package (hereinafter referred to as 'TCP'). Further, the data driving circuit is connected to the liquid crystal panel and the data printed circuit board in a state of being mounted on the data TCP.

However, the conventional liquid crystal display device suffers from an increase in cost and a large size of the liquid crystal display device due to the gate driving circuit, the gate TCP, and the gate printed circuit board.

For this reason, recently, a liquid crystal display device having an Amorphous Silicon Gate (hereinafter referred to as "ASG") type for integrating a gate driving circuit in a liquid crystal panel has been developed.

An ASG type liquid crystal display device includes a backlight unit for providing light, a liquid crystal panel in which an image is controlled by adjusting the transmittance of light from the backlight unit, and a gate driving circuit is integrated, and a data driving circuit for driving data lines of the liquid crystal panel. And a printed circuit board for driving the gate driving circuit of the liquid crystal panel and the data driving circuit.

The ASG type liquid crystal display device can eliminate the gate TCP, the gate driving circuit mounted thereon, and the gate printed circuit board, thereby reducing the cost and size of the liquid crystal display device. However, in the ASG type liquid crystal display, when a shift register formed in the gate driving circuit occurs, a normal signal may not be supplied to the next gate line or a abnormal signal may be supplied to the next gate line when the shift register is defective. The problem arises. In addition, when such a defect occurs, most of the liquid crystal panels are discarded, resulting in a waste of cost.

Accordingly, it is an object of the present invention to provide a redundancy transistor connected in parallel with an output transistor of each shift register included in each gate driving circuit and having a plurality of gate driving circuits, so that a failure occurs in any one of the shift registers. The present invention provides a liquid crystal display and a repair method thereof, in which a display defect is prevented by driving a gate line using a shift register on the other side.

In order to achieve the above object, the present invention provides a first gate driving circuit including a plurality of shift registers connected to one side of a plurality of gate lines to drive each of the plurality of gate lines, and the other side of the plurality of gate lines. And a second gate driving circuit connected to a second gate driving circuit, the second gate driving circuit including a plurality of shift registers to drive each of the plurality of gate lines, wherein each of the plurality of shift registers comprises: a first transistor driving the respective gate lines; A liquid crystal display comprising a redundancy transistor electrically insulated from an output line of one transistor.

And a first bridge electrode formed to overlap the output line of the first transistor and the second output line.

The apparatus may further include a plurality of repair lines that cross each of the gate lines and overlap each of the input lines of the previous and next shift registers connected to the gate lines.

A second gate line connected to the first gate driving circuit on one side and a second gate line connected to the second gate driving circuit on the other side, the second gate line being electrically insulated from the first gate line and overlapping the first and second gate lines It further comprises a bridge electrode.

In order to achieve the above object, the present invention provides a first gate driving circuit including a plurality of shift registers connected to one side of a plurality of gate lines to drive each of the plurality of gate lines, and a plurality of gate lines. A second gate driving circuit including a plurality of shift registers connected to the other side to drive each of the plurality of gate lines, and the nth shift register when the nth shift register included in the first gate driving circuit is defective A redundancy transistor separated from the gate line connected to the shift register and electrically connected to the output line of the first transistor driving the gate line of the n-th shift register included in the second gate driving circuit. A liquid crystal display device is provided.

The first bridge electrode formed to overlap the output line of the first transistor and the second output line may be connected to the output line of the first transistor and the output line of the redundancy transistor.

The n-th gate line connected to the defective shift register is disconnected, and the repair line crossing the n-th gate line is connected to the input lines of the n-th gate line, the previous shift register and the next shift register. It features.

A second bridge electrode formed by overlapping a first gate line connected to the first gate driving circuit on one side and a second gate line connected to the second gate driving circuit on the other side, and connected to the first and second gate lines Further comprising connecting one gate line and a second gate line

In order to achieve the above object, in the repair method of the liquid crystal display according to the present invention, if a defect occurs in the n-th shift register included in the first gate driving circuit, the defective shift register and the gate line connected thereto are disconnected. And electrically connecting the output line of the first transistor and the output line of the redundancy transistor to drive the gate line of the n-th shift register included in the second gate driving circuit.

The method may further include connecting a repair line formed to intersect the gate line with the gate line, and connecting the repair line with signal lines of the previous and next stage shift registers respectively overlapped with the repair line. .

The second gate line may be electrically insulated from one end of the first gate line connected to the first gate driving circuit and overlapped with one end of the second gate line connected to the second gate driving circuit. Connecting the bridge electrode with the first and second gate lines to electrically connect the first gate line and the second gate line.

Other objects and advantages of the present invention in addition to the above objects will become apparent from the detailed description of the embodiments with reference to the accompanying drawings. Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a plan view illustrating a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 2 is a block diagram illustrating the shift register illustrated in FIG. 1.

1 and 2, a liquid crystal display according to an exemplary embodiment of the present invention is connected to one side of a plurality of gate lines GL to drive a plurality of shift registers SCR to drive each of the plurality of gate lines GL. A second gate driving circuit including a first gate driving circuit 30 including a plurality of shift registers and a plurality of shift registers SCR connected to the other side of the plurality of gate lines GL to drive each of the plurality of gate lines GL. Each of the plurality of shift registers SCR has a furnace 31, and each of the plurality of shift registers SCR is electrically connected to a first transistor TR1 for driving each gate line GL and a first output line 44 of the first transistor TR1. A redundancy transistor 45 insulated from each other.

Specifically, the liquid crystal panel 10 includes a thin film transistor substrate 20 on which a thin film transistor array is formed, a color filter substrate on which a color filter array is formed, facing the thin film transistor substrate 20, and a thin filter transistor substrate 20 and a color filter substrate. It has a liquid crystal interposed therebetween.

The color filter substrate includes a black matrix for preventing light leakage on the substrate, a color filter array for color implementation, and a common electrode for applying a common voltage to the liquid crystal.

The liquid crystal is driven by the voltage difference between the pixel electrode supplied with the data signal and the common electrode supplied with the common voltage which is a reference voltage. As a result, the liquid crystal having the dielectric anisotropy rotates according to the voltage difference to vary the transmittance of the light incident from the light source.

The thin film transistor substrate 20 includes a gate line and a data line formed to cross each other on a lower substrate, a thin film transistor formed at an intersection thereof, and a pixel electrode connected to the thin film transistor.

The thin film transistor substrate 20 includes a pixel area defined by the gate line GL and the data line DL, the gate line GL and the data line DL intersect, and a gate line GL in each pixel area. And a thin film transistor TFT connected to the data line DL, and a pixel electrode connected to the thin film transistor TFT. The first and second gate driving circuits 30 and 31 for driving the gate line GL are integrally formed.

The first and second gate driving circuits 30 and 31 are formed at both sides of the gate lines GL, respectively. The first and second gate driving circuits 30 and 31 include shift registers SCRs driving the gate lines GL, respectively. The shift registers SCR are connected to both ends of each gate line GL and supply a gate driving signal for driving the gate line GL in both directions.

The shift register SCR includes a control unit 41 that controls the first and second transistors TR1 and TR2 of the output unit 42 according to input clock signals, a gate on voltage Von, and a gate off voltage And an output unit 42 for selectively outputting Voff). And a first signal line 51 and a second signal line 52 for supplying a gate driving signal output from the output unit 42 to the previous shift register SCR and the next shift register SCR.

2, the control unit 41 may include a gate-off voltage Voff input from a power supply unit (not shown), a first clock signal CKV and a second clock signal input from a timing controller (not shown). CKVB), the first signal line 51 for supplying the start pulse and the gate driving signal of the previous shift register SCR, and the second signal line 52 for supplying the gate driving signal of the next shift register SCR. The output unit 42 is controlled by the gate driving signals supplied through the gate driving signals.

Here, the first clock signal CKV is synchronized with the gate-on voltage Von input to the output unit 42 through the first node 47 connecting the control unit 41 and the output unit 42. The gate-on voltage Von is output at (SCR). The second clock signal CKVB is inputted in a form in which the first clock signal CKV is inverted, and is outputted from the output unit 42 through a second node 48 connecting the control unit 41 and the output unit 42. The gate-off voltage Voff is output from the shift register SCR in synchronization with the gate-off voltage Voff to stop the gate-on voltage Von from being output and output the gate-off voltage Voff. The start pulse is supplied to the first shift registers SCR to drive the first gate line GL.

In particular, the previous gate driving signal and the next gate driving signal are input to speed up the output timing of the gate-off voltage Voff of the shift register SCR. That is, when the n th shift register SCRn outputs the gate-on voltage Von to the n th gate line GLn, the n-1 th shift register SCRn-1 and the n + 1 th shift register SCRn + The output voltage of 1) is input to the controller 41 of the n-th shift register SCRn through the first and second signal lines 51 and 52. The second transistor included in the output unit 42 of the nth shift register SCRn according to the input signals of the n-1 and n + 1 shift registers SCRn-1 and SCRn + 1 input to the controller 41. Turn off (TR2). When the n + 1 th shift register SCRn + 1 is driven to output the gate on voltage Von, the output gate on voltage Von is supplied to the control unit 41 of the n th shift register SCRn to control the controller. At 41, the gate-off voltage Voff is supplied to the second transistor TR2. At this time, the control unit 41 of the n-th shift register SCRn turns off the first transistor TR1 and turns on the second transistor TR2 through the second click signal CKVB. It supplies to the output part 42 through 2 nodes 47 and 78, respectively.

3 is a block diagram illustrating an output unit of the shift register illustrated in FIG. 2.

Referring to FIG. 3, the output unit 42 includes a first transistor TR1 that outputs a gate-on voltage Von and a second transistor TR2 that outputs a gate-off voltage Voff. 41) and first and second nodes 47 and 48, respectively. In the first and second transistors TR1 and TR2, an output line is connected in series between the gate-on voltage Von and the gate-off voltage Voff. That is, the gate-on voltage Von is applied to the source electrode of the first transistor TR1, the gate-off voltage Voff is applied to the drain electrode of the second transistor TR2, and the first and second transistors TR1 are provided. , The output lines of TR2) are connected in series. The first and second transistors TR1 and TR2 are turned on / off in response to a signal from the controller 42. When the first clock signal CKV is input to the controller 41, the first transistor TR1 is turned on through the clock signal output through the first node 47, and the gate-on voltage Von is applied to the gate line GL. To supply. At this time, the second transistor TR2 is turned off. On the contrary, when the second clock signal CKVB, which is an inverted signal of the first clock signal CKV, is input to the controller 41, the second transistor TR2 is turned on to turn the gate-off voltage Voff into the gate line GL. The first transistor TR1 is turned off. Here, the output part 42 is provided with the redundancy transistor 45 which can be connected in parallel with the 1st transistor TR1. The redundancy transistor 45 is formed in the same structure as the first transistor TR1. The first and second transistors TR1 and TR2 and the redundancy transistor 45 are formed by connecting a plurality of thin film transistors in parallel. The redundancy transistor 45 is connected to the first transistor TR1 at the other register SCR of the shift register SCR in which a failure occurs. When the gate driving signal supplied from the shift registers SCR on both sides of the gate line GL is driven to the other shift register SCR due to a fault on one side, the amount of current supplied to the gate line GL decreases. Since the luminance of the pixels connected to the GL may be reduced, the channel width between the drain electrode and the source electrode of the first transistor TR1 is extended to compensate for the charging rate.

In this case, the first bridge electrode 60 is further provided to overlap the output line 44 of the first transistor TR1 and the output line 46 of the redundancy transistor 45, respectively.

The first bridge electrode 60 is formed by overlapping the first and second output lines 44 and 46 of the first transistor TR1 and the redundancy transistor 45 separated from each other. When the shift registers SCR are not defective, the first and second output lines 44 and 46 are electrically insulated. The first bridge electrode 60 further includes short points 61 and 62 which can be electrically connected to the first and second output lines 44 and 46 later. The first bridge electrode 60 is formed of a transparent electrode such as indium tin oxide (ITO) or indium zinc oxide (IZO).

Here, the first and second transistors TR1 and TR2 and the redundancy transistor 45 are formed by the same process as the thin film transistor TFT formed in the pixel region, and the plurality of thin film transistors are connected in series or in parallel or in series or parallel connection. do.

4 is a plan view illustrating a liquid crystal display according to a second exemplary embodiment of the present invention.

Referring to FIG. 4, a liquid crystal display according to a second exemplary embodiment of the present invention may be connected to one side of a plurality of gate lines GL to drive a plurality of shift registers SCRs driving each of the plurality of gate lines GL. A second gate driving circuit 30 including a first gate driving circuit 30 including a plurality of shift registers SCR connected to the other side of the plurality of gate lines GL to drive each of the plurality of gate lines GL; Each of the plurality of shift registers SCR is electrically connected to a first transistor TR1 for driving each gate line GL, and a first output line 44 of the first transistor TR1. A first transistor of the previous and next stage shift registers SCRn-1 and SCRn + 1, which includes a redundancy transistor 45 insulated from each other, intersects each gate line GL, and is connected to each gate line GL. And a plurality of repair lines 90 overlapping each of the second signal lines 51 and 52. The.

The repair line 90 crosses the gate line GL and overlaps the first and second signal lines 51 and 52. Shorting points 91 to 93 are provided at intersections or overlapping portions between the repair line 90, the gate line GL, and the first and second signal lines 51 and 52.

5 is a plan view illustrating a liquid crystal display according to a third exemplary embodiment of the present invention.

FIG. 5 further illustrates the first and second gate lines 1GL and 2GL separated from those of FIG. 4 and a second bridge electrode 100 overlapping the first and second gate lines 1GL and 2GL to connect the first and second gate lines 1GL and 2GL. It has the same components except those provided. Therefore, detailed description of the same components will be omitted.

The second bridge electrode formed to overlap the first gate line 1GL connected to the first gate driving circuit 30 on one side and the second gate line 2GL connected to the second gate driving circuit 31 on the other side. 100 is provided.

Specifically, the first and second gate lines 1GL and 2GL connected to the first and second gate driving circuits 30 and 31, respectively, are formed by separating the central portions from each other. And a second bridge electrode 100 overlapping one end of the first and second gate lines 1GL and 2GL. The second bridge electrode 100 is formed of a metal layer different from the first and second gate lines 1GL and 2GL, and further includes shorting points 101 and 102 for connecting the first and second gate lines. The second bridge electrode 100 is formed of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO).

Here, the first gate line 1GL supplies the gate driving signal supplied from the first gate driving circuit 30 to the gate electrode of the TFT connected thereto, and the second gate line 2GL supplies the second gate. The gate driving signal supplied from the driving circuit 31 is supplied to the gate electrode of the thin film transistor connected thereto.

Next, when the bad shift register occurs, the repaired LCD will be described with reference to FIGS. 6 to 8.

6 is a block diagram showing an output of the shift register on the other side when a bad shift register is generated.

Referring to FIG. 6, when a defect occurs in the n-th shift register SCRn of the first gate driving circuit 30, the first portion formed in the output part 42 of the n-th shift register of the second gate driving circuit 31 is described. The first output line 44 of the transistor and the second output line 46 of the redundancy transistor 45 are electrically connected. The first transistor TR1 and the redundancy transistor are electrically connected to each other through the first bridge electrode 60 formed to overlap each of the first and second output lines 44 and 46. That is, the shorting points 61 and 62 formed in the overlapping region of the first bridge electrode 60 and the first transistor TR1 and the overlapping transistor 45 formed in the overlapping region of the first bridge electrode 60 and the redundancy transistor 45 are formed. The shorting points 61 and 62 are electrically connected using the laser shorting method. Therefore, the first output line 44 of the first transistor TR1 and the second output line 46 of the redundancy transistor 45 are connected to each other via the first bridge electrode 60. As a result, when the first transistor TR1 and the redundancy transistor 45 are connected to each other, the channel widths of the drain and source electrodes of the two transistors TR1 and 45 may be increased to increase the charge rate, and the second gate driving circuit 31 may be used. The image quality may be compensated by driving the n-th gate line GLn with the n-th shift register SCRn.

FIG. 7 is a diagram illustrating a liquid crystal display after repairing the liquid crystal display shown in FIG. 4 when a bad shift register is generated.

Since FIG. 7 has the same components as the liquid crystal display shown in FIG. 4, redundant descriptions of the components will be omitted.

Referring to FIG. 7, when a defect occurs in the n-th shift register SCRn of the first gate driving circuit 30, the shift register SCRn is disconnected from the gate line GL, and shifts the previous and next stages. It is also disconnected from the I / O lines of the register. The repair line 90 is connected to the gate line GL on the shift register nSCRn side, and one end of the repair line 90 has the first signal line 51 of the n-1 th shift register SCRn-1. Is connected to the second signal line 52 of the n + 1th shift register SCRn + 1. In other words, the repair line 90 and the gate line GL are laser shorted by performing a laser short on the shorting point 91 in which the repair line 90 and the gate line GL on the n-th shift register SCRn side where the failure occurs are overlapped. Connect In addition, laser shorting is performed on the shorting point 92 in which the first signal line 51 and the repair line 90 overlap, and the shorting point 93 in which the second signal line 52 and the repair line 90 overlap. Each of the first and second signal lines 51 and 52 is connected to the repair line 90. At this time, the bad shift register SCRn is cut at the gate line GL. The gate line GL is driven by using the gate driving signal supplied from the n-th shift register SCRn of the second gate driving circuit 31.

If the repair line 90 bypasses the bad shift register SCR and is connected to the first and second signal lines 51 and 52 of the previous and next stage shift registers SCRn-1 and SCRn + 1, the repair line 90 is defective. The gate driving signal supplied from the shift register formed on the other side of the gate line GLn connected to the shift register is supplied to the shift register at the previous stage and the shift register at the next stage. This enables the gate line to be driven even when a failure occurs in the shift register.

FIG. 8 is a diagram illustrating a liquid crystal display after repairing the liquid crystal display shown in FIG. 5 when a bad shift register is generated.

Referring to FIG. 8, when a failure occurs in the n-th shift register of the first gate driving circuit 30, the n-th shift register SCRn is disconnected from the first gate line 1GL. The first gate line 1GL is electrically connected to the second gate line 2GL. That is, the shorting points 101 and 102 of the second bridge electrode 100 formed by overlapping ends of the first and second gate lines 1GL and 2GL, respectively, are laser shorted to form the second bridge electrode 100. The first and second gate lines 1GL and 2GL are electrically connected via each other.

As a result, display defects may be prevented by driving both the first and second gate lines 1GL and 2GL using only the nth shift register of the second gate driving circuit.

9 is a flowchart sequentially illustrating a repairing method of a liquid crystal display according to an exemplary embodiment of the present invention.

Referring to FIG. 9, in the repairing method of the liquid crystal display according to the present invention, if a defect occurs in the n-th shift register included in the first gate driving circuit, the fault shift register and the gate line connected thereto are disconnected (S1). And electrically connecting the output line of the first transistor and the output line of the redundancy transistor to drive the gate line connected to the nth shift register included in the second gate driving circuit.

Specifically, when a defect occurs in the n-th shift register of the first gate driving circuit, the n-th gate line GLn connected thereto is laser cut and disconnected. The I / O lines of the previous and next shift registers are also laser cut and disconnected. Next, a short point provided at the first bridge electrode formed to overlap the first output line of the first transistor TR1 and the second output line of the redundancy transistor formed at the output of the n-th shift register of the second gate driving circuit. Laser shorting is used to electrically connect the first output line and the second output line via the first bridge electrode.

The repair method of the liquid crystal display according to the present invention includes the steps of connecting a repair line formed by crossing the gate line with the gate line, and the signal lines of the previous and next shift registers of the defective shift register overlapping the repair line. Each step further includes the step of connecting.

Specifically, when a defect occurs in the n-th shift register of the first gate driving circuit, the n-th gate line GLn connected thereto is laser cut and disconnected. The I / O lines of the previous and next shift registers are also laser cut and disconnected. Next, the shorting point provided at the intersection of the gate line and the repair line is subjected to a lattice short to connect the gate line and the repair line. Then, the first signal line for outputting the gate driving signal to the previous shift register and the shorting point formed by overlapping one end of the repair line are laser shorted to connect the first signal line and the repair line. The second signal line outputting the gate driving signal to the next shift register and the shorting point overlapped with the other end of the repair line are laser shorted to connect the second signal line and the repair line.

On the other hand, the repair method of the liquid crystal display according to the present invention is a first gate line connected to the first gate driving circuit of one side, the second gate electrically insulated from the first gate line and the other side is connected to the second gate driving circuit Electrically connecting the first gate line and the second gate line by connecting a gate line and a second bridge electrode formed to overlap one end of the first and second gate lines with the first and second gate lines, respectively. Include.

Specifically, when a failure occurs in the n-th shift register of the first gate driving circuit, the n-th shift register is disconnected from the first gate line. Laser shorting of the shorting points of the second bridge electrode formed by overlapping ends of the first and second gate lines, respectively. Accordingly, the first gate line and the second gate line are electrically connected to each other via the second bridge electrode.

The liquid crystal display and the repair method thereof according to the present invention further include a redundancy transistor that can be connected in parallel with the first transistor at the output of each shift register, so that if a defect occurs in the n-th shift register included in the first gate driver, The gate line may be driven by the nth shift register by connecting the first transistor and the redundancy transistor of the nth shift register included in the second gate driver. In this case, as the first transistor and the redundancy transistor are connected in parallel, a sufficient charge rate can be maintained to drive the thin film transistor provided in the pixel region normally.

In addition, in the liquid crystal display device in which the first and second gate driving circuits are incorporated in the liquid crystal panel, a repair line for bypassing the respective shift registers included in the first and second gate driving circuits is defective, thereby causing a failure in the shift registers on either side. Even if this occurs, the gate line is driven using the shift register on the other side, so that the display quality of the liquid crystal display device is not deteriorated.

In addition, a first gate line connected to the first gate driving circuit and a second gate line insulated from the first gate line and provided with the second gate driving circuit may be provided to easily detect a failure of the shift register of one side, and to provide a first gate line. And a second bridge electrode formed to overlap one end of the second gate line, respectively, to drive both the first and second gate lines through a gate driving circuit of one side.

The present invention described above will be capable of various substitutions, modifications and changes by those skilled in the art to which the present invention pertains. Therefore, the present invention should not be limited to the above-described embodiments and the accompanying drawings, and the rights thereof should be determined by the claims.

Claims (11)

A first gate driving circuit connected to one side of the plurality of gate lines and including a plurality of shift registers to drive each of the plurality of gate lines; A second gate driving circuit including a plurality of shift registers connected to other sides of the plurality of gate lines to drive each of the plurality of gate lines, Each of the plurality of shift registers comprises: a first transistor driving each gate line; And a redundancy transistor electrically insulated from the output line of the first transistor. The method of claim 1, And a first bridge electrode formed to overlap the output line of the first transistor and the second output line. The method of claim 1, And a plurality of repair lines that cross each of the gate lines and overlap each of the input lines of the previous and next shift registers connected to the gate lines. The method according to any one of claims 1 to 3, A first gate line connected to the first gate driving circuit at one side; And a second bridge electrode which is electrically insulated from the second gate line connected to the second gate driving circuit on the other side, and overlaps the first and second gate lines. A first gate driving circuit connected to one side of the plurality of gate lines and including a plurality of shift registers to drive each of the plurality of gate lines; A second gate driving circuit including a plurality of shift registers connected to other sides of the plurality of gate lines to drive each of the plurality of gate lines, When the nth shift register included in the first gate driving circuit is defective, the nth shift register is separated from the gate line connected thereto, and the gate line of the nth shift register included in the second gate driving circuit is included. And a redundancy transistor electrically connected to an output line of the first transistor for driving the first transistor. The method of claim 5, And a first bridge electrode formed to overlap the output line of the first transistor and the second output line with the output line of the first transistor and the output line of the redundancy transistor. The method of claim 1, The n-th gate line connected to the bad shift register is disconnected, and the repair line crossing the n-th gate line is connected to the input line of the n-th gate line, the previous shift register, and the next shift register. Liquid crystal display device. The method according to any one of claims 5 to 7, A first gate line connected to the first gate driving circuit at one side; And connecting the first gate line and the second gate line by connecting a second bridge electrode formed to overlap the second gate line connected to the second gate driving circuit on the other side with the first and second gate lines. A liquid crystal display device. Disconnecting the defective shift register and the gate line connected thereto when a defect occurs in the n-th shift register included in the first gate driving circuit; And electrically connecting the output line of the first transistor and the output line of the redundancy transistor to drive the gate line of the n-th shift register included in the second gate driving circuit. . The method of claim 9, Connecting a repair line formed to intersect the gate line with the gate line; And And connecting the signal lines of the previous and next shift registers of the defective shift register overlapped with the repair line, respectively. The method according to any one of claims 9 and 10, A second bridge electrode formed to overlap one end of a first gate line connected to the first gate driving circuit and one end of a second gate line electrically insulated from the first gate line and connected to the second gate driving circuit; Connecting the first gate line to the second gate line to electrically connect the first gate line to the second gate line.

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