KR20070066096A - The display device for having the function of dpm mode and method for controlling the same - Google Patents

Abstract

An image device with a DPM(Display Power Management) mode function and a method for controlling the image device are provided to perfectly implement a process for executing and releasing a DPM mode by enabling a detection part to determine whether to release the DPM mode. An input part(209) receives a signal related to control of a PC(Personal Computer). A detection part(210) detects whether the signal related to the control of the PC is received. A control part recognizes a current mode as a DPM mode and prevents power from being applied to a scaler(206) if the signal related to the control of the PC is not detected. The signal related to the control of the PC is a horizontal synchronizing signal(Hsync) or a vertical synchronizing signal(Vsync). The detection part is a circuit including a coupling capacitor and a zener diode.

Description

Image apparatus having a power saving mode and controlling method thereof {The display device for having the function of DPM mode and method for controlling the same}

1 is a diagram illustrating a configuration of an imaging apparatus having a power saving mode function according to the related art (block diagram).

2 is a diagram illustrating a configuration of an imaging apparatus having a power saving mode function according to the present invention (block diagram).

3 illustrates a sync detect pulse signal, in accordance with the present invention.

4 is a diagram illustrating an example of a circuit diagram of a detector of an imaging apparatus having a power saving mode function according to the present invention;

5 is a flowchart (flow chart) illustrating a control method of an imaging apparatus having a power saving mode function according to the present invention;

* Explanation of symbols for main parts of drawings *

101,201: video device 102,202: RF input unit

103,203: A / V input section 104,204: A / V decoder (Decoder)

105,205: Micom 106,206: Scaler

107,207: flash ROM 108,208: display unit

109,209: PC input 210: detector

211: first transistor 212: second transistor

213: first coupling capacitor 214: second coupling capacitor

215: first zener diode 216: second zener diode

217: third transistor 218: fourth transistor

The present invention relates to an image device, and more particularly, to an image device having a display power management mode function and a control method thereof.

In recent years, video apparatuses have developed to the extent that they can receive and output PC signals. That is, the video device can now receive a broadcast signal and provide it to the viewer, and can receive and output A / V data from an external input device (DVD player, etc.), or even the main body of the PC. Connected or built-in PC, the video device can be used for PC.

As in general PCs, interest and research on an image device having a power saving mode are increasing.

The power saving mode is also referred to as DPM (Display Power Management) mode in practice. The power saving mode is, for example, in an image device capable of receiving and outputting a PC signal, when the user does not input any input signal to the image device for more than a predetermined time, the image device (monitor ) Is a mode that temporarily turns off the power.

In addition, the state in which the user does not input any input signal to the video apparatus means, for example, a state in which no button such as a remote control, a local key, or a mouse of the video apparatus is pressed. Can mean.

1 is a diagram illustrating a configuration of a video device having a power saving mode function according to the prior art (block diagram). Hereinafter, referring to FIG. 1, a signal flow for implementing a power saving mode function in a video apparatus according to the prior art will be described.

The video device 101 includes an RF input unit 102, an A / V input unit 103, a PC input unit 109, an A / V decoder 104, a microcomputer 105, a scaler 106, a flash ROM 107, And a display unit 108.

The RF input unit 102 receives a broadcast signal transmitted wirelessly and transmits the received signal to the A / V decoder 104.

The A / V input unit 103 receives audio and video data from an external device such as a DVD player and transmits the same to the A / V decoder 104.

The PC input unit 109 receives a signal related to PC operation from an external PC main body or an embedded PC main body, and transmits the signal to the scaler 106.

The A / V decoder 104 serves to decode the encoded data received from the RF input unit 102 or the A / V input unit 104.

The microcomputer 105 controls the signal flow between the A / V decoder 104 and the scaler 106 and controls overall operations related to operations of other video devices.

The scaler 106 scales in a state where data received from the A / V decoder 104 or the PC input unit 109 can be output through the display unit 108.

The display unit 108 outputs data received from the scaler 106. However, for example, when the imaging apparatus 101 is an LCD (Liquid Crystal Display) TV, a monitor, or the like, the display unit 108 may be an LCD panel.

Conventionally, the scaler 106 of the video device 101 checks the Hsync signal (horizontal synchronization signal) and the Vsync signal (vertical synchronization signal) applied from the PC input unit 109.

As a result of the check of the scaler 106, when the Hsync signal and the Vsync signal are not applied for a predetermined time, it is determined as a power saving mode (DPM mode).

On the other hand, even after switching to the power saving mode, the scaler 106 continues to be activated to determine whether an Hsync signal or a Vsync signal is input from the PC input unit 109.

If the Hsync signal or the Vsync signal is input from the PC input unit 109 as a result of the determination of the scaler 106 in the power saving mode state, the power saving mode is canceled and normal operation is performed.

However, the above-described conventional video device has the following problems.

In order to check the Hsync signal and the Vsync signal applied from the PC input unit 109, there is a problem that power must be supplied to the scaler 106 even in the power saving mode.

More specifically, since the scaler 106 is an IC that consumes a large amount of power in general, the scaler 106 has a problem in that unnecessary power consumption is wasted even in a power saving mode.

For example, as described above, if power is supplied to the scaler 106 in the power saving mode, there is a problem that power consumption of 1W or less, which is an international standard, cannot be satisfied.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object of the present invention is to reduce power consumption of a scaler in an image device in a power saving mode, so that a minimum power consumption is used. A video device having a power management mode function and a control method thereof are provided.

In order to achieve the above object, the present invention provides an input unit for receiving a signal related to PC control, a detection unit for detecting whether a signal related to PC control is input through the input unit, and a detection result of the detection unit, If a signal related to PC control is not detected, the control unit determines that the display is in the power saving mode and controls the power not to be supplied to the scaler. Provide the appliance.

The signal related to the PC control is preferably in the form of an Hsync signal or Vsync signal.

It is preferable that the controller determines that the case where neither the Hsync signal nor the Vsync signal related to PC control is detected is in the power saving mode.

The detection unit is preferably configured with a circuit diagram including a coupling capacitor and a Zener diode.

In order to achieve the above object, the present invention provides a method of controlling an image device including a scaler, the method comprising: detecting whether a signal related to PC control is input, and when a signal related to PC control is not detected, And determining the display power management mode state, and controlling the power supply to the scaler when the power saving mode state is performed. Provide control method.

The signal related to the PC control is preferably in the form of an Hsync signal or Vsync signal.

When the signal related to the PC control is not detected, determining the display power management mode state may include determining that the Hsync signal and the Vsync signal related to the PC control are not detected as the power saving mode state. It is desirable to.

The detecting of whether a signal related to the PC control is input may be performed by using a circuit diagram including a coupling capacitor and a zener diode.

Therefore, according to the present invention, in the power saving mode, the power of the scaler is completely turned off, so that only minimal power can be consumed.

Incidentally, it also satisfies the international standards and has a convenient effect for the user due to the reduced power consumption.

Hereinafter, with reference to the accompanying drawings, preferred embodiments of the present invention that can specifically realize the above object will be described.

2 is a diagram illustrating a configuration of a video device having a power saving mode function according to the present invention (block diagram). Referring to Figure 2, the configuration of a video device having a power saving mode function according to the present invention will be described in detail.

The video device 201 according to the present invention includes an RF input unit 202, an A / V input unit 203, a PC input unit 209, an A / V decoder 204, a microcomputer 205, a scaler 206, and a flash ROM. 207, a display unit 208, a detector 210, and the like.

The RF input unit 202 receives a broadcast signal transmitted wirelessly and transmits the same to the A / V decoder 204.

The A / V input unit 203 receives audio and video data from an external device such as a DVD player and transmits the same to the A / V decoder 204.

The PC input unit 209 receives a signal related to PC operation from an external PC main body or an embedded PC main body, and transmits the signal to the scaler 206.

The A / V decoder 204 decodes the encoded data received from the RF input unit 202 or the A / V input unit 203.

The microcomputer 205 controls the signal flow between the A / V decoder 204 and the scaler 206 and controls the overall operation of the other video device 201.

However, as shown in FIG. 2, the microcomputer 205 may be embedded in the A / V decoder 204 or may be separately added to the outside of the A / V decoder 204.

The scaler 206 scales to a state in which data received from the A / V decoder 204 or the PC input unit 209 can be output through the display unit 208.

The display unit 208 outputs data received from the scaler 206. However, for example, when the imaging device 201 is a liquid crystal display (LCD) TV, a monitor, or the like, the display unit 208 may be an LCD panel.

The detector 210 checks whether there are an Hsync signal (horizontal sync signal) and a Vsync signal (vertical sync signal) applied from the PC input unit 209 to the scaler 206.

In relation to the present invention, a method of determining a power saving mode by each component of the imaging apparatus 201 will be described in detail as follows.

The detection unit 210 determines whether there is an Hsync signal or a Vsync signal applied from the PC input unit 209 to the scaler 206, and informs the microcomputer 205 of the determination result.

As a result of the determination of the detector 210, when both the Hsync signal and the Vsync signal exist, the microcomputer 205 controls the power to be supplied to the scaler 206.

On the other hand, as a result of the determination of the detection unit 210, when neither the Hsync signal nor the Vsync signal exists or only one signal exists for a predetermined time, the microcomputer 205 is a power saving mode (DPM mode). Is controlled so that power is not supplied to the scaler 206.

Therefore, unlike the related art, according to the present invention, in the power saving mode, the power of the scaler 206 can be completely turned off, and thus the power saving effect is very large. In operation 210, the process of executing and releasing the power saving mode can be perfectly reproduced.

3 is a diagram illustrating a sync detect pulse signal according to the present invention. Referring to FIG. 3, a case in which the detection unit detects a sink detect pulse signal according to an Hsync signal and a Vsync signal will be described below.

In the case of 'a section', since both the Hsync signal and the Vsync signal exist, a sync detect pulse signal is generated so that the image device 201 is in a normal state instead of a power saving mode. 205).

On the other hand, in the 'b section', since neither the Hsync signal nor the Vsync signal is present or only one signal exists, the image device 201 does not generate a sync detect pulse signal. The microcomputer 205 notifies the microcomputer 205 that it is in the power saving mode.

4 is a diagram illustrating an example of a circuit diagram of a detector of an imaging apparatus having a power saving mode function according to the present invention. Referring to FIG. 4, an example of a circuit diagram for implementing the detection unit of an imaging apparatus according to the present invention will be described.

However, the circuit diagram illustrated in FIG. 4 belongs to the scope of the present invention, and the equivalent circuit also belongs to the scope of the present invention. In the power saving mode, the power of the scaler is completely turned off. If a separate circuit diagram for determining whether to release is added, all belong to the scope of the invention.

The first transistor 211, the second transistor 212, the third transistor 217, the fourth transistor 218, the first coupling capacitor 213, and the second coupling capacitor constituting the detector 210. 214, the first zener diode 215, and the second zener diode 216. Other components, when the signal is directly applied, serves as a buffer to prevent the signal is cut, etc., since the part can be easily understood by those skilled in the art, detailed description thereof will be omitted.

First, when neither the Vsync signal (vertical sync signal) nor the Hsync signal (horizontal sync signal) is applied, DC (direct current) is applied to the collector terminals of the first transistor 211 and the second transistor 212. ) Voltage is generated. For example, the DC voltage may be 0V (Low DC voltage) or a specific value of Vcc (High DC voltage).

The DC bias voltage applied to the collector terminals of the first transistor 211 and the second transistor 212 is coupled by the first coupling capacitor 213 and the second coupling capacitor 214. do.

While being coupled by the first coupling capacitor 213 and the second coupling capacitor 214, the base terminal of the third transistor 217 and the fourth transistor 218 is always connected. Maintain a low state (eg 0V).

Therefore, since the third transistor 217 and the fourth transistor 218 are not turned on, the collector terminal of the third transistor 217 is always in a high level voltage state (eg, For example, Vcc) is maintained.

When the collector terminal of the third transistor 217 always maintains a high level voltage state (for example, Vcc), the sync detect pulse output terminal may also have a high level. Maintain state.

At this time, the microcomputer 205 receiving the pulse maintained in the high level state determines that the video device 201 is in a power saving mode (DPM mode). The microcomputer 205 completely turns off the power of the scaler 206.

Second, when only one of the Vsync signal (vertical sync signal) and the Hsync signal (horizontal sync signal) is applied, only one of the third transistor 217 and the fourth transistor 218 is turned on, The collector terminal of the third transistor 217 always maintains a high level voltage state (eg, Vcc).

When the collector terminal of the third transistor 217 always maintains a high level voltage state (for example, Vcc), the sync detect pulse output terminal may also have a high level. Maintain state.

At this time, the microcomputer 205 receiving the pulse maintained in the high level state determines that the imaging device 201 is in a power saving mode (DPM mode). The microcomputer 205 completely turns off the power of the scaler 206.

Third, when both the Vsync signal (vertical sync signal) and the Hsync signal (horizontal sync signal) are applied, the collector terminals of the first transistor 211 and the second transistor 212, for example, A pulse signal with a range of 0V to Vcc is generated.

However, the pulse signal is coupled by the first coupling capacitor 213 and the second coupling capacitor 214 to have a range of 0 to -Vcc.

On the other hand, a base bias voltage is applied to the third transistor 217 and the fourth transistor 218 by using the Zener voltages of the first Zener diode 215 and the second Zener diode 216. Supply.

When the first coupling capacitor 213 and the second coupling capacitor 214 are coupled, the third transistor 217 and the fourth transistor 218 have high pulses. In the high state section, each of the switching (switching) or turned on (turn on).

Therefore, when both the third transistor 217 and the fourth transistor 218 are turned on, the collector terminal of the third transistor 217 has a sync detect pulse. Generate a signal.

As a result, the sync detect pulse signal is transferred to the microcomputer 205 through a sync detect pulse output terminal.

At this time, the microcomputer 205 receiving the sink detect pulse signal determines that the imaging device 201 is in a normal state, not a power saving mode (DPM mode). The microcomputer 205 controls the supply of power so that the scaler 206 can operate.

5 is a flowchart (flow chart) illustrating a control method of an image device having a power saving mode function according to the present invention. Referring to FIG. 5, a control method of a video device having a power saving mode function according to the present invention will be described in the order of time flow.

However, the control method of FIG. 5 is a control method of the above-described video device, and can be more easily understood through the description of FIGS. 1, 2, 3, and 4 described above. Therefore, detailed description will be omitted.

The detector 210 determines whether a PC related control signal is input to the imaging device 201 (S501). For example, the PC-related control signal means an Hsync signal, a Vsync signal, or the like applied through the PC input unit 209.

As a result of the determination of the detection unit 210 (S501), when the Hsync signal and the Vsync signal are not input for a predetermined time, the detection unit 210 outputs a voltage maintaining a high state (S505).

The microcomputer 205 receiving the high voltage receives the image device 201 in a power saving mode (DPM mode) (S506).

The microcomputer 205 maintains the video device 201 in a power saving mode (S507). For example, no power is supplied to the scaler 206. In the case of the present invention, even if power is not supplied to the scaler 206, it is possible to determine whether to cancel the power saving mode state.

On the other hand, when the determination result (S501), the Hsync signal, and the Vsync signal are all input to the detection unit 210, the detection unit 210 generates a sync detect pulse signal (S502).

The microcomputer 205 receiving the sink detect pulse signal recognizes that the power saving mode state of the image device 201 is released (S503).

In addition, the microcomputer 205 maintains the video device 201 in a normal mode (S504). For example, power is supplied to each IC including the scaler 206.

The present invention is not limited to the above-described embodiments, and as can be seen in the appended claims, modifications can be made by those skilled in the art to which the invention pertains, and such modifications are within the scope of the present invention.

And, the above-mentioned numerical value is a preferred embodiment or merely an example, the scope of the present invention is not limited to the numerical values, and as can be seen in the appended claims, Modifications are possible by those skilled in the art and such modifications are within the scope of the present invention.

Referring to the effects of a video device having a display power management mode function and a control method according to the present invention described above are as follows.

According to the present invention, the power of the scaler in the video device is kept in the off state in the power saving mode, so that a minimum power consumption is used.

In addition, according to the present invention, it is also easy to implement the power consumption of less than 1W required by the international standard in the power saving mode state.

Claims (8)

An input unit receiving a signal related to PC control; A detector for detecting whether a signal related to PC control is input through the input unit; And When the detection result of the detection unit, when the signal related to the PC control is not detected, it is determined that the state of the power saving mode (Display Power Management mode), characterized in that it comprises a control unit for controlling the power is not supplied to the scaler Imaging device with power saving mode. The method of claim 1, The signal related to the PC control, Imaging device having a power saving mode function, characterized in that the Hsync signal or Vsync signal form. The method of claim 2, The control unit, An image device having a power saving mode function, characterized in that the power saving mode state is determined when neither the Hsync signal nor the Vsync signal related to PC control is detected. The method of claim 1, The detection unit, Imaging device having a power saving mode function, characterized in that consisting of a circuit diagram including a coupling capacitor (coupling capacitor), a Zener diode (zener diode). In the control method of a video device including a scaler, Detecting whether a signal related to PC control is input; Determining a display power management mode when a signal related to the PC control is not detected; And When the power saving mode state, the control method of the video device having a power saving mode function characterized in that it comprises the step of controlling so that power is not supplied to the scaler. The method of claim 5, The signal related to the PC control, Control method of a video device having a power saving mode function, characterized in that the Hsync signal or Vsync signal form. The method of claim 6, When the signal related to the PC control is not detected, determining the display power management mode state, A method of controlling an image device having a power saving mode function, characterized in that it is determined that the Hsync signal and the Vsync signal related to PC control are not detected. The method of claim 5, Detecting whether a signal related to the PC control is input, A control method of an imaging apparatus having a power saving mode function, characterized by detecting by using a circuit diagram including a coupling capacitor and a zener diode.

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