KR20070064769A - Liquid crystal display - Google Patents

Abstract

An LCD(Liquid Crystal Display) is provided to realize various conversion driving operations such as row conversion, column conversion, and point conversion, thereby improving the display quality, by applying a DC(Direct Curren) voltage having a uniform level as a common voltage to vary the level of data voltage during a conversion driving operation. A first display substrate(100) is disposed to face a second display substrate(200), and distanced from the second display substrate. A liquid crystal layer(3) is disposed between the first display substrate and the second display substrate. A plurality of sensing data lines(SL) are formed above the second substrate. A plurality of variable capacitors(Cv) are respectively connected to the sensing data lines and a first voltage source, wherein each of the variable capacitors has a capacitance varied by a pressure. A plurality of reference capacitors(Cp) are respectively connected to the sensing lines and the second voltage source. A plurality of sensing signal outputting parts are respectively connected to the sensing data lines. The sensing signal outputting parts generate sensing signals based on sensing data signals flowing through the sensing data lines. The first voltage source outputs a first voltage having a uniform level. The second voltage source outputs a second voltage having a first level and a second level different from the first level, and generates the sensing signals while the second level is maintained.

Description

Liquid crystal display {LIQUID CRYSTAL DISPLAY}

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention, which is a block diagram of the liquid crystal display shown in terms of a pixel.

2 is an equivalent circuit diagram of one pixel of a liquid crystal display according to an exemplary embodiment of the present invention.

3 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention, and is a block diagram of the liquid crystal display shown in terms of a sensing unit.

4 is an equivalent circuit diagram of a sensing unit of a liquid crystal display according to an exemplary embodiment of the present invention.

5 is a schematic diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

6A is an equivalent circuit diagram of a plurality of sensing units connected to one sensing data line in a liquid crystal display according to an exemplary embodiment of the present invention.

FIG. 6B is an equivalent circuit diagram schematically illustrating FIG. 6A.

7 is a timing diagram for a sensing operation of a liquid crystal display according to an exemplary embodiment of the present invention.

8 is a waveform diagram of various reference voltages and corresponding sensing signals for reading a sensing signal of a touch sensing unit according to an exemplary embodiment of the present invention.

9 is a waveform diagram of various reference voltages and corresponding sensing signals for reading sensing signals of a touch sensing unit according to another exemplary embodiment of the present invention.

The present invention relates to a liquid crystal display device.

Typical liquid crystal displays (LCDs) among display devices include two display panels provided with pixel electrodes and a common electrode, and a liquid crystal layer having dielectric anisotropy interposed therebetween. The pixel electrodes are arranged in a matrix and connected to switching elements such as thin film transistors (TFTs) to receive data voltages one by one in sequence. The common electrode is formed over the entire surface of the display panel and receives a common voltage. The pixel electrode, the common electrode, and the liquid crystal layer therebetween form a liquid crystal capacitor, and the liquid crystal capacitor becomes a basic unit that forms a pixel together with a switching element connected thereto.

In such a liquid crystal display, a voltage is applied to two electrodes to generate an electric field in the liquid crystal layer, and the intensity of the electric field is adjusted to adjust the transmittance of light passing through the liquid crystal layer to obtain a desired image. In this case, in order to prevent degradation caused by an electric field applied to the liquid crystal layer for a long time, the polarity of the data voltage with respect to the common voltage is inverted frame by frame, row by pixel, or pixel by pixel.

A touch screen panel is a device that touches a finger or a touch pen (touch pen, stylus) on the screen to write and draw characters or pictures, or execute icons to perform a desired command on a machine such as a computer. . A liquid crystal display with a touch screen panel may find out whether a user's finger or a touch pen touches the screen and contact position information. However, such a liquid crystal display device has problems such as a cost increase due to a touch screen panel, a decrease in yield due to a process of adhering the touch screen panel to a liquid crystal display panel, a decrease in luminance of the liquid crystal panel, and an increase in product thickness.

Therefore, in order to solve these problems, a technology for embedding a sensing element made of a thin film transistor or a variable capacitor instead of a touch screen panel in a display area displaying an image in a liquid crystal display device has been developed. The sensing element detects a change in light or pressure applied to a screen by a user's finger or the like so that the liquid crystal display may determine whether the user's finger or the like has touched the screen and contact position information.

However, in order to reduce power consumption of a liquid crystal display having a sensing element, a common voltage is swinged at a high level and a low level for at least one consecutive pixel row (hereinafter referred to as a 'pixel row set'), and the pixel row set unit is used. Row inversion for inverting the polarity of the data voltage is mainly performed. As a result, the polarity is opposite between two adjacent sets of pixel rows, which causes poor image quality such as horizontal stripes.

Another object of the present invention is to improve the image quality of a display device.

According to an embodiment of the present invention, a liquid crystal display device includes a first display panel, a second display panel facing the first display panel, and separated from the first display panel, the first display panel, and the second display panel. A liquid crystal layer interposed therebetween, a plurality of sensing data lines formed on the second display panel, a plurality of variable capacitors connected to the sensing data line and the first voltage, the capacitance of which is changed by pressure, and the sensing data lines and A plurality of reference capacitors connected to two voltages, and a plurality of sensing signal outputs connected to each of the sensing data lines and generating a sensing signal based on a sensing data signal flowing through the sensing data line. The magnitude of the first voltage is constant, the second voltage has a first level and a second level different from the first level, and the second voltage This is the detection signal is generated while keeping the second level.

The second level may be higher or lower than the first level.

The first voltage may be a common voltage.

And a plurality of reset signal input parts connected to each of the sensing data lines and supplied with a reset voltage to the sensing data lines.

Each of the reset signal input units may include a first reset switching element connected to a corresponding sensing data line and configured to apply a first reset voltage input to the sensing data line connected by operating in response to a first reset control signal. have.

Each of the reset signal input units is connected to a corresponding sensing data line, and the sensing data connected to a second reset voltage input by operating according to a second reset control signal at a time different from a time when the first reset voltage is applied. The device may further include a second reset switching element applied to the line.

The display device may further include a plurality of output transistors connected to the sensing data lines and transferring output signals generated based on the sensing data signals flowing through the sensing data lines to the sensing signal output units, respectively.

DETAILED DESCRIPTION Embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like parts are designated by like reference numerals throughout the specification. When a part of a layer, film, region, plate, etc. is said to be "on" another part, this includes not only the other part being "right over" but also another part in the middle. On the contrary, when a part is "just above" another part, there is no other part in the middle.

Now, the liquid crystal display according to the present invention will be described in detail with reference to FIGS. 1 to 5.

1 is a block diagram of a liquid crystal display according to an embodiment of the present invention, which is a block diagram of the liquid crystal display shown in terms of a pixel, and FIG. 2 is a pixel of the liquid crystal display according to an embodiment of the present invention. Equivalent circuit diagram for. 3 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention, which is a block diagram of the liquid crystal display according to a sensing unit, and FIG. 4 is a sensing diagram of the liquid crystal display according to the exemplary embodiment of the present invention. Equivalent circuit diagram for negative. 5 is a schematic diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

1 and 3, a liquid crystal display according to an exemplary embodiment of the present invention may include a liquid crystal panel assembly 300, an image scanning unit 400, an image data driver 500, and a liquid crystal panel assembly 300 connected thereto. A sensing signal processor 800, a gray voltage generator 550 connected to the image data driver 500, a contact determiner 700 connected to the sensing signal processor 800, and a signal controller 600 for controlling them. .

1 to 4B, the liquid crystal panel assembly 300 includes a plurality of display signal lines G ₁ -G _n , D ₁ -D _m , and a plurality of pixels PX connected thereto and arranged in a substantially matrix form. ), and a plurality of sensing signal lines _{(SY 1 -SY N, SX 1} -SX M, RL) and is connected thereto, and a plurality are arranged in the form of a substantially matrix sensor (SU), each of the sensing signal (SY ₁ -SY _N , SX ₁ -SX _M ) A plurality of initial signal inputs (INI) connected to one end, a plurality of sensing signal outputs connected to the other end of each sensing signal line (SY ₁ -SY _N , SX ₁ -SX _M ) ( SOUT), and a plurality of output data lines _{(OY 1 -OY N, OX 1} -OX M) connected to each of the sensing signal output (SOUT).

2 and 5, the liquid crystal panel assembly 300 includes a thin film transistor array panel 100 and a common electrode panel 200 facing each other, a liquid crystal layer 3 interposed therebetween, and two display panels. Spacer (not shown) which forms a gap between 100 and 200 and which is deformed to some extent is included.

The display signal lines G ₁ -G _n and D ₁ -D _m are a plurality of image scanning lines G ₁ -G _n for transmitting an image scanning signal and an image data line D ₁ -D _m for transmitting an image data signal. sensing a signal line, comprising a _{(SY 1 -SY N, SX 1} -SX M, RL) includes a plurality of horizontal sensing data lines for transmitting the detected data signal (SY ₁ -SY _N) and a plurality of vertical sensing data line (SX _1- SX _M ), and a plurality of reference voltage lines RL having high and low levels and transferring a reference voltage swinging the high and low levels at regular intervals. The reference voltage line RL may be omitted as necessary.

The image scanning lines G ₁ -G _n and the horizontal sensing data lines SY ₁ -SY _N extend substantially in the row direction and are substantially parallel to each other, and the image data lines D ₁ -D _m and the vertical sensing data lines ( SX ₁ -SX _M ) extend in approximately the column direction and are substantially parallel to each other. The reference voltage line RL extends in the row or column direction.

Each pixel PX includes a switching element Q connected to the display signal lines G ₁ -G _n , D ₁ -D _m , a liquid crystal capacitor Clc, and a storage capacitor Cst connected thereto. ). Holding capacitor Cst can be omitted as needed.

The switching element Q is a three-terminal element such as a thin film transistor, which is provided in the thin film transistor array panel 100, and a control terminal thereof is connected to an image scanning line G ₁ -G _n , and an input terminal is an image data line. (D ₁ -D _m ), and the output terminal is connected to the liquid crystal capacitor (Clc) and the holding capacitor (Cst). In this case, the thin film transistor includes amorphous silicon or poly crystalline silicon.

The liquid crystal capacitor Clc has two terminals, the pixel electrode 191 of the thin film transistor array panel 100 and the common electrode 270 of the common electrode display panel 200, and the liquid crystal layer 3 between the two electrodes 191 and 270. Functions as a dielectric. The pixel electrode 191 is connected to the switching element Q, and the common electrode 270 is formed on the entire surface of the common electrode display panel 200 and receives the common voltage Vcom. Unlike in FIG. 2, the common electrode 270 may be provided in the thin film transistor array panel 100. In this case, at least one of the two electrodes 191 and 270 may be linear or rod-shaped. The common voltage Vcom is a DC voltage, which is a constant voltage of a predetermined level, and may have a voltage near about 0V.

The storage capacitor Cst, which serves as an auxiliary role of the liquid crystal capacitor Clc, is formed by overlapping a separate signal line (not shown) and the pixel electrode 191 provided in the thin film transistor array panel 100 with an insulator interposed therebetween. A predetermined voltage such as the common voltage Vcom is applied to this separate signal line. However, the storage capacitor Cst may be formed such that the pixel electrode 191 overlaps the front end image scanning line directly above the insulator.

On the other hand, in order to implement color display, each pixel PX uniquely displays one of the primary colors (spatial division) or each pixel PX alternately displays the primary colors over time (time division). The desired color is recognized by the spatial and temporal sum of these primary colors. Examples of the primary colors include three primary colors such as red, green, and blue. FIG. 2 illustrates that each pixel PX includes a color filter 230 representing one of the primary colors in an area of the common electrode display panel 200 corresponding to the pixel electrode 191 as an example of spatial division. . Unlike FIG. 2, the color filter 230 may be formed above or below the pixel electrode 191 of the thin film transistor array panel 100.

At least one polarizer (not shown) for polarizing light is attached to an outer surface of the liquid crystal panel assembly 300.

As illustrated in FIG. 4, the sensing unit SU is connected to a variable capacitor Cv and a sensing data line SL connected to a horizontal or vertical sensing data line (hereinafter, referred to as a sensing data line) indicated by a reference numeral SL. And a reference capacitor Cp connected between the voltage lines RL.

The reference capacitor Cp is formed by overlapping the reference voltage line RL and the sensing data line SL of the thin film transistor array panel 100 with an insulator (not shown) interposed therebetween.

The variable capacitor Cv has the sensing data line SL of the thin film transistor array panel 100 and the common electrode 270 of the common electrode display panel 200 as two terminals, and the liquid crystal layer 3 between the two terminals functions as a dielectric. do. The capacitance of the variable capacitor Cv is changed by an external stimulus such as a user's touch applied to the liquid crystal panel assembly 300. For example, pressure may be used as the external stimulus. When pressure is applied to the common electrode display panel 200, the spacer is compressed and deformed so that the distance between the two terminals is changed to change the capacitance of the variable capacitor Cv. When the capacitance changes, the magnitude of the contact voltage Vn between the reference capacitor Cp and the variable capacitor Cv changes, which depends on the magnitude of the capacitance. The contact voltage Vn flows through the sensing data line SL as a sensing data signal, and based on the contact voltage Vn, the contact voltage Vn may be determined. At this time, the distance between both terminals of the reference capacitor Cp is constant, and has a substantially constant capacitance.

Therefore, the sensing data signal may always have a voltage range within a certain range, thereby easily determining whether or not the contact is made.

The sensing unit SU is disposed between two adjacent pixels PX. The density of the horizontal and vertical sensing data line _{(SY 1 -SY N, SX 1} -SX M) of a pair of sensing unit (SU) which is connected, respectively, disposed adjacent to the region in which they cross in, for example, It may be about one quarter of the dot density. Here, one dot includes, for example, three pixels PX arranged side by side and displaying three primary colors such as red, green, and blue, displaying one color, and a basic unit representing the resolution of the liquid crystal display device. do. However, one dot may consist of four or more pixels PX, and in this case, each pixel PX may display one of three primary colors and white.

An example in which the density of the pair of sensing units SU is 1/4 of the dot density is one in which the horizontal and vertical resolutions of the pair of sensing units SU are 1/2 of the horizontal and vertical resolutions of the liquid crystal display device, respectively. Can be. In this case, there may be a pixel row and a pixel column without the sensing unit SU.

By matching the detection unit SU density and the dot density to such an extent, the liquid crystal display device may be applied to high precision applications such as character recognition. Of course, the resolution of the sensing unit SU may be higher or lower as necessary.

As described above, according to the sensing unit SU according to the exemplary embodiment of the present invention, since the space occupied by the sensing unit SU and the sensing data line SL is relatively small, the reduction of the aperture ratio of the pixel PX can be minimized.

The plurality of reset signal input units INI have the same structure, and the plurality of detection signal output units SOUT also have the same structure. The structure and operation of these (INI, SOUT) will be described in more detail later.

The output data lines OY ₁ -OY _N and OX ₁ -OX _M are connected to the horizontal and vertical sensing data lines SY ₁ -SY _N and SX ₁ -SX _M , respectively, through corresponding sensing signal outputs SOUT. a plurality of horizontal and vertical output data lines, which comprises _{(OY 1 -OY N, OX 1} -OX M). The output data lines OY ₁ -OY _N and OX ₁ -OX _M are connected to the sensing signal processing unit 800 and transmit an output signal from the sensing signal output unit SOUT to the sensing signal processing unit 800. The horizontal and vertical output data lines (OY ₁ -OY _N , OX ₁ -OX _M ) extend approximately in the column direction and are nearly parallel to each other.

Referring back to FIGS. 1 and 3, the gray voltage generator 550 generates two sets of gray voltage sets (or reference gray voltage sets) related to the transmittance of the pixel. One of the two sets has a positive value for the common voltage (Vcom) and the other set has a negative value.

The image scanning unit 400 is connected to the image scanning lines G ₁ -G _n of the liquid crystal panel assembly 300 to gate-on voltage Von for turning on the switching element Q, and gate-off voltage Voff for turning off. ) Is applied to the image scanning lines G ₁ -G _n .

The image data driver 500 is connected to the image data lines D ₁ -D _m of the liquid crystal panel assembly 300, and selects a gray voltage from the gray voltage generator 550 and uses the image data as the image data signal. Applies to lines D ₁ -D _m . However, when the gray voltage generator 550 provides only a predetermined number of reference gray voltages instead of providing all voltages for all grays, the image data driver 500 divides the reference gray voltages so that the grays for all grays are divided. Generates a voltage and selects an image data signal among them.

The sensing signal processor 800 may include a plurality of amplifiers 810 connected to the output data lines OY _1- OY _N and OX _1- OX _M of the liquid crystal panel assembly 300. After receiving the output signal transmitted through 810 and performing signal processing such as amplification to generate an analog detection signal (Vo), and converts into a digital signal using an analog-to-digital converter (not shown), such as a digital detection signal ( DSN).

The touch determining unit 700 receives the digital sensing signal DSN from the sensing signal processing unit 800, performs a predetermined calculation process, determines whether the contact is made, and the contact position, and then sends the contact information INF to the external device. The touch determination unit 700 may monitor an operation state of the sensing unit SU based on the digital sensing signal DSN and control signals applied to the sensing unit SU.

The signal controller 600 controls operations of the image scanning unit 400, the image data driver 500, the gray voltage generator 550, and the detection signal processor 800.

Each of the driving devices 400, 500, 550, 600, 700, and 800 may be mounted directly on the liquid crystal panel assembly 300 in the form of at least one integrated circuit chip, or may be a flexible printed circuit film ( It may be mounted on the liquid crystal panel assembly 300 in the form of a tape carrier package (TCP) or mounted on a separate printed circuit board (not shown). Alternatively, these drive units 400, 500, 550, 600, 700, 800 are connected to signal lines G ₁ -G _n , D ₁ -D _m , SY ₁ -SY _N , SX ₁ -SX _M , OY ₁ -OY _N , OX ₁ -OX _M , RL) and the thin film transistor Q may be integrated in the liquid crystal panel assembly 300.

Referring to FIG. 5, the liquid crystal panel assembly 300 is divided into a display area P1, an edge area P2, and an exposure area P3. In the display area P1, the pixel PX, the sensing unit SU, and the signal lines G ₁ -G _n , D ₁ -D _m , SY ₁ -SY _N , SX ₁ -SX _M , OY ₁ -OY _N , OX Most of _1- OX _M , RL) are located. The common electrode panel 200 includes a light blocking member (not shown) such as a black matrix, and the light blocking member covers most of the edge region P2 to block light from the outside. The common electrode panel 200 is smaller than the thin film transistor array panel 100 so that a portion of the thin film transistor array panel 100 is exposed to form an exposed area P3, and a single chip 610 is mounted in the exposed area P3. A flexible printed circuit board 620 is attached.

The single chip 610 is a driving device for driving a liquid crystal display, that is, an image driver 400, an image data driver 500, a gray voltage generator 550, a signal controller 600, and a contact determiner ( 700, and a sensing signal processor 800. By integrating the driving devices 400, 500, 550, 600, 700, and 800 in a single chip 610, the mounting area may be reduced, and power consumption may be reduced. Of course, if desired, at least one of them or at least one circuit element constituting them may be outside the single chip 610.

The image signal lines G ₁ -G _n , D ₁ -D _m and the sensing data lines SY ₁ -SY _N , SX ₁ -SX _M extend to the exposure area P3 so that the corresponding driving devices 400, 500, 800 ).

The FPC board 620 receives a signal from an external device and transmits the signal to the single chip 610 or the liquid crystal panel assembly 300, and an end is usually formed of a connector (not shown) to facilitate connection with the external device. .

Next, the display operation and the detection operation of the liquid crystal display will be described in more detail.

The signal controller 600 receives input image signals R, G, and B and an input control signal for controlling the display thereof from an external device (not shown). The input video signals R, G, and B contain luminance information of each pixel PX, and the luminance is a predetermined number, for example, 1024 (= 2 ¹⁰ ), 256 (= 2 ⁸ ), or 64 (= 2 ⁶ ) It has gray. Examples of the input control signal include a vertical sync signal Vsync, a horizontal sync signal Hsync, a main clock MCLK, and a data enable signal DE.

The signal controller 600 receives the input image signals R, G, and B based on the input image signals R, G, and B and the input control signal, and generates operating conditions of the liquid crystal panel assembly 300 and the image data driver 500. Process the image scan control signal CONT1, the image data control signal CONT2, the sensing data control signal CONT3, and the like, and then output the image scan control signal CONT1 to the image scan unit 400. The image data control signal CONT2 and the processed image signal DAT are sent to the image data driver 500, and the sensing data control signal CONT3 is sent to the detection signal processor 800.

The image scan control signal CONT1 includes a scan start signal STV indicating the start of scanning and at least one clock signal controlling the output of the gate-on voltage Von. The image scan control signal CONT1 may further include an output enable signal OE that defines a duration of the gate-on voltage Von.

The image data control signal CONT2 is a load signal for applying the image data signal to the horizontal synchronization start signal STH indicating the start of transmission of the image data DAT in one pixel row and the image data lines D ₁ -D _m . LOAD) and data clock signal HCLK. The image data control signal CONT2 is also an inverted signal that inverts the voltage polarity of the image data signal with respect to the common voltage Vcom (hereinafter referred to as the polarity of the image data signal by reducing the voltage polarity of the image data signal with respect to the common voltage). RVS) may be further included.

In response to the image data control signal CONT2 from the signal controller 600, the image data driver 500 receives the digital image signal DAT for the pixel PX of one pixel row, and each digital image signal DAT. By converting the digital image signal DAT into an analog image data signal by selecting a gray scale voltage corresponding to), it is applied to the corresponding image data lines D ₁ -D _m .

The image scanning unit 400 applies the gate-on voltage Von to the image scanning line G ₁ -G _n in response to the image scanning control signal CONT1 from the signal controller 600, thereby applying the image scanning line G ₁ -G. _n ) turns on the switching element Q connected. Then, the image data signal applied to the image data lines D ₁ -D _m is applied to the pixel PX through the turned-on switching element Q.

The difference between the voltage of the image data signal applied to the pixel PX and the common voltage Vcom is shown as the charging voltage of the liquid crystal capacitor Clc, that is, the pixel voltage. The arrangement of the liquid crystal molecules varies according to the magnitude of the pixel voltage, thereby changing the polarization of light passing through the liquid crystal layer 3. The change in polarization is represented as a change in the transmittance of light by the polarizer attached to the liquid crystal panel assembly 300, and thus a desired image may be displayed.

This process is repeated in units of one horizontal period (also referred to as 1H "and equal to one period of the horizontal sync signal (Hsync) and data enable signal (DE)), thereby repeating all image scanning lines (G ₁ -G _n). ), The gate-on voltage Von is sequentially applied to the image data signal to all the pixels PX, thereby displaying an image of one frame.

When one frame ends, the next frame starts and the state of the inversion signal RVS applied to the image data driver 500 is controlled so that the polarity of the image data signal applied to each pixel PX is opposite to that of the previous frame. ("Frame inversion"). In this case, the polarity of the image data signal flowing through one image data line is changed (eg, inversion of a row, inversion of a point) according to the characteristics of the inversion signal RVS within one frame, or the polarity of the image data signal applied to one pixel row. May differ from one another (eg, nirvana, point inversion).

The sensing signal processing unit 800 is applied through the output data lines OY _1- OY _N and OX _1- OX _M in the porch section between the frames once every frame according to the sensing data control signal CONT3. The sensed data signal to be read. In the porch section, since the sensing data signal is less affected by the driving signals from the image scanning unit 400, the image data driver 500, and the like, the reliability of the sensing data signal is increased. However, such a read operation is not necessarily performed every frame, but may be performed once every plurality of frames as necessary. In addition, the read operation may be performed more than once in the porch section, and the read operation may be performed at least once even in the frame of the porch section.

The sensing signal processor 800 converts the read analog sensing data signal into a digital sensing signal DSN by performing signal processing such as amplification using each amplifying unit 810, etc. send. The operation of the amplifier 810 of the sense signal processor 800 will be described in more detail below.

The touch determination unit 700 receives a digital sensing signal DSN, performs appropriate arithmetic processing to find out whether a contact is made and a contact position, and transmits the same to an external device, and the external device transmits the image signals R, G, and B based thereon. Transfer to the liquid crystal display device.

Next, the structure and operation of the reset signal input unit INI, the sense signal output unit SOUT, and the amplifier 810 according to an embodiment of the present invention will be described with reference to FIGS. 6A to 9.

FIG. 6A is an equivalent circuit diagram of a plurality of sensing units connected to one sensing data line in a liquid crystal display according to an exemplary embodiment of the present invention, FIG. 6B is an equivalent circuit diagram briefly showing FIG. 6A, and FIG. A timing diagram for a sensing operation of a liquid crystal display according to an exemplary embodiment. 8 is a waveform diagram of various reference voltages and corresponding sensing signals for reading sensing signals of the touch sensing unit according to an exemplary embodiment of the present invention, and FIG. 9 illustrates sensing signals of the touch sensing unit according to another embodiment of the present invention. This is a waveform diagram of various reference voltages to read and their sense signals.

As shown in FIGS. 6A and 6B, the liquid crystal panel assembly 300 of the present embodiment has a plurality of sensing data lines SL (SY ₁ -SY _N , SX in FIG. 3), as described above with reference to FIG. 3. _1- SX _M ) and a plurality of sensing units SU connected to each sensing data line SL, a reset signal input unit INI connected to one side of each sensing data line SL, and each sensing data line SL. And a plurality of sensing signal outputs SOUT connected between the other side of the circuit and each output data line OL (OY _1- OY _N , OX _1- OX _{M in} FIG. 3). In addition, as described above with reference to FIG. 3, the sensing signal processor 800 includes a plurality of amplifiers 810 connected to each output data line OL.

That is, a plurality of sensing units SU including a variable capacitor Cv and a reference capacitor Cp are connected to one sensing data line SL, and reset signals input units are respectively provided at different ends of the sensing data line SL. (INI) and sense signal output (SOUT) are connected. The variable capacitor Cv is connected to the common voltage Vcom and the reference capacitor Cp is connected to the reference voltage Vp.

As shown in FIG. 7, the common voltage Vcom maintains a constant level of a predetermined magnitude, and may have a voltage magnitude near 0V, for example. The reference voltage Vp has a high level and a low level, and swings the high level and the low level at regular intervals, and may swing between about -7V and + 7V. As the swing width between the high level and the low level increases, the sensitivity of the sensing unit SU increases. The reference voltage Vp changes level in synchronization with the read period of the sense signal.

As described above, since the plurality of variable capacitors Cv are formed using the sensing data line SL and the common electrode 270 as two terminals, the plurality of variable capacitors Cv include one variable capacitor Cv shown in FIG. 6B. In practice, the capacitance of the variable capacitor Cv 'is substantially uniformly distributed along one sensing data line SL. In addition, as illustrated in FIG. 6B, the plurality of reference capacitors Cp may also be represented by one reference capacitor Cp ′ corresponding to the variable capacitor Cv ′.

Each reset signal input unit INI includes first and second reset transistors Qr1 and Qr2. The first and second reset transistors Qr1 and Qr2 are three-terminal elements such as thin film transistors, and control terminals thereof are connected to the first and second reset control signals RST1 and RST2, respectively, and the input terminals thereof are the first terminal. And second reset voltages Vr1 and Vr2, respectively, and an output terminal is connected to the sensing data line SL.

The first and second reset transistors Qr1 and Qr2 are positioned in the edge region P2 of the liquid crystal panel assembly 300 in which no pixels are disposed, and according to the first and second reset control signals RST1 and RST2. The first and second reset voltages Vr1 and Vr2 are supplied to the sensing data line SL.

Each sensing signal output unit SOUT includes an output transistor Qs. The output transistor Qs is also a three-terminal element such as a thin film transistor, the control terminal of which is connected to the sensing data line SL, the input terminal of which is connected to the input voltage Vs, and the output terminal of the output data line ( OL). The output transistor Qs is also positioned in the edge region P2 of the liquid crystal panel assembly 300 and generates an output signal based on the sensing data signal flowing through the sensing data line SL. An output current is mentioned as an output signal. Alternatively, the output transistor Qs may generate a voltage as an output signal.

Each amplifier 810 includes an amplifier AP, a capacitor Cf, and a switch SW.

The amplifier AP has an inverting terminal (-), a non-inverting terminal (+) and an output terminal, the inverting terminal (-) is connected to the output data line OL, and between the inverting terminal (-) and the output terminal The capacitor Cf and the switch SW are connected, and the non-inverting terminal + is connected to the reference voltage Va. The amplifier AP and the capacitor Cf generate a sense signal Vo by integrating the output current from the output transistor Qs for a predetermined time as a current integrator.

Referring to FIG. 7, the liquid crystal display according to the present exemplary embodiment performs a sensing operation in a porch section between frames as described above, and particularly, in a front porch section ahead of the vertical sync signal Vsync. It is desirable to perform the operation.

As shown in FIG. 7, the first and second reset control signals RST1 and RST2 have a turn-on voltage Ton for turning on the first and second reset transistors Qr1 and Qr2, and a turn-off voltage for turning off the first and second reset transistors Qr1 and Qr2, respectively. Toff, the turn-on voltage Ton may use the gate-on voltage Von, and the turn-off voltage Toff may use the gate-off voltage Voff.

First, the initialization operation of the sensing data line SL is described before reading the sensing signal Vo output from the amplifier 810.

When the turn-on voltage Ton is applied to the first reset transistor Qr1, the first reset transistor Qr1 is turned on to apply the first reset voltage Vr1, which is applied to the input terminal, to the sensing data line SL. 1 The sensing data line SL is initialized with the reset voltage Vr1.

On the other hand, when the operation is started and the reference voltage Va is applied to the amplifier 810, the capacitor Cf of the amplifier 810 is charged to the reference voltage Va, so that the output voltage of the amplifier AP ( The magnitude of Vo is equal to the reference voltage Va.

As such, when the initialization operation of the sensing data line SL is completed, an operation for reading the sensing signal Vo is performed.

Therefore, when the first reset control signal RST1 becomes the turn-off voltage Toff after the initialization operation, the sensing data line SL is in a floating state. As shown in FIG. 7, the level of the reference voltage Vp is at a low level. To a higher level. The voltage Vg applied to the control terminal of the output transistor Qs is obtained as shown in Equation 1 below.

(VpH is the high level reference voltage value, VpL is the low level reference voltage value, Cp 'is the capacitance of the reference capacitor, and Cv' is the capacitance of the variable capacitor.)

As shown in [Equation 1], the voltage Vg applied to the control terminal of the output transistor Qs is based on the change amount of the reference voltage Vp to the capacitance change of the capacitors Cp 'and Cv'. Therefore, when the sensing unit SU is contacted by the user, the distance between the two display panels 100 and 200 is close, so that the capacitance of the variable capacitor Cv 'is changed and the level of the reference voltage Vp is changed. Positive current flows through the output transistor Qs to the output data line OL.

Then, in order to read the sensing signal Vo output from the amplifier 810, a high level switching signal Vsw is applied to the switch SW, which is charged in the capacitor Cf before the read operation is performed. Discharge voltage. Then, when a predetermined time elapses, the sensing signal processor 800 reads the sensing signal Vo. As described above, the read operation of the sensing signal Vo is performed while the reference voltage Vp is maintained at the high level.

Since the sensing data signal is changed based on the first reset voltage Vr1, the sensing data signal may always have a voltage range within a predetermined range, thereby easily determining whether or not the contact is made.

After the sensing signal processor 800 reads the sensing signal Vo, the second reset control signal RST2 becomes the turn-on voltage Ton, thereby turning on the second reset transistor Qr2. Then, the second reset voltage Vr2 is applied to the sensing data line SL. At this time, since the second reset voltage Vr2 is the ground voltage, the sensing data line SL is reset to the ground voltage. The second reset voltage Vr2 is maintained until the next first reset voltage Vr2 is applied to the sensing data line SL. As a result, the output transistor Qs is turned off until the next first reset voltage Vr2 is applied, thereby reducing power consumption due to unnecessary operation.

When the reference voltage Vp is read from the sensing signal Vo after the initialization operation of the sensing unit SU, the reference voltage Vp is changed from a high level to a low level to maintain the low level during the read operation.

At this time, the read operation of the sensing signal Vo is performed for a predetermined number of horizontal periods in the porch section.

For example, as shown in Figs. 8A to 8C, when the reference voltage Vp maintains a high level for 1H, 2H, or 3H, the amplification unit maintains the high level. An integration operation of 810 is performed to output a voltage for the integration result as a sensing signal Vo. As such, as the read time of the sensing signal Vo increases, the integration time increases, and thus the time to reach the target size when the touch sensing unit SU is operated increases, thereby reducing the adverse effect of the sensing signal Vo with noise. .

In addition, as shown in FIG. 9, the reference voltage Vp is kept at a low level for 1H, 2H, or 3H, so that the detection signal Vo can be read. In this case, when the sensing operation of the sensing signal Vo is not performed, the reference voltage Vp maintains a low level and the common voltage Vcom maintains a voltage near about 0V. In this case, as shown in FIG. 8, as the time for maintaining the low level of the reference voltage Vp increases, the integration time of the amplifier 810 increases, thereby reducing the adverse effect of the sensing signal Vo due to noise.

Furthermore, since the common voltage Vcom maintains a predetermined level, the inversion may be implemented by swinging the level of the data voltage to a high level higher than the common voltage Vcom and a low level lower than the common voltage Vcom. Since the level of the data voltage can be changed for each pixel column or pixel unit as well as the pixel row, not only row inversion but also column inversion or point inversion can be realized.

In addition, since the common voltage Vcom is kept constant, adverse effects due to frequent changes in the level of the common voltage Vcom are reduced.

According to the present invention, inversion driving is performed by applying a common voltage to a constant DC voltage having a predetermined level, changing the level of the data voltage. As a result, not only row inversion but also column inversion or point inversion can be realized. As a result, various inversions can be made, so that image quality defects are reduced.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

Claims (8)

First display panel, A second display panel facing the first display panel and spaced apart from the first display panel, A liquid crystal layer interposed between the first display panel and the second display panel, A plurality of sensing data lines formed on the second display panel; A plurality of variable capacitors, each of which changes capacitance due to pressure and is connected to the sensing data line and a first voltage; A plurality of reference capacitors connected to the sense data line and a second voltage, and A plurality of sensing signal output units connected to each of the sensing data lines and generating sensing signals based on sensing data signals flowing through the sensing data lines. Including, The magnitude of the first voltage is constant, The second voltage has a first level and a second level different from the first level, and the sensing signal is generated while maintaining the second level. Liquid crystal display. In claim 1, And the second level is higher than the first level. In claim 1, And the second level is lower than the first level. In claim 1, The first voltage is a common voltage. In claim 1, And a plurality of reset signal input parts connected to each of the sensing data lines and supplied with a reset voltage to the sensing data lines. In claim 5, Each of the reset signal input units is connected to a corresponding sensing data line, and includes a first reset switching element configured to apply a first reset voltage to the sensing data line, the first reset voltage being operated according to a first reset control signal. Device. In claim 6, Each of the reset signal input units is connected to a corresponding sensing data line, and the sensing data connected to a second reset voltage input by operating according to a second reset control signal at a time different from a time when the first reset voltage is applied. And a second reset switching element applied to the line. In claim 1, And a plurality of output transistors connected to the sensing data lines and transferring output signals generated based on the sensing data signals flowing through the sensing data lines to the sensing signal output units, respectively.

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