KR20070063318A - Nanotip for electron radiation, method for manufacturing the same and nanotip lithography with the same - Google Patents

Abstract

A nano-tip electron emission source, a method for manufacturing the same, and a nano-tip lithography apparatus having the same are provided to perform easily a control process by controlling one electron to be used in a lithography process. A nano-tip lithography apparatus includes an electron emission source and a wafer(201). The electron emission source includes a nano-tip array which is formed with a plurality of nano-tips. The electron emission source emits electrons from the nano-tip by a predetermined voltage. The wafer is arranged opposite to the nano-tip array of the electron emission source. Photoresist(202) exposed by emitted electrons is coated on the wafer.

Description

Nano tip electron emission source, manufacturing method thereof, and nano tip lithography apparatus having the same {NANOTIP FOR ELECTRON RADIATION, METHOD FOR MANUFACTURING THE SAME AND NANOTIP LITHOGRAPHY WITH THE SAME}

1 is a cross-sectional view of an electron beam lithographic apparatus according to the prior art,

2A to 2D illustrate a method of manufacturing a nanotip electron emission source according to an embodiment of the present invention;

3A and 3B are a cross-sectional view and a plan view of a state in which a tantalum oxide film nanotip array is formed;

4A is an AFM image of a tantalum oxide nanotip array with oxidation time at an applied voltage of 10 V and a relative humidity of 65%;

4b is a view showing the height and width of tantalum oxide nano-tips that change with time,

5A is an AFM image of a tantalum oxide nanotip array at different applied voltages, 75% relative humidity, and 1 second oxidation time.

5B is a view showing that the height and width of the tantalum oxide nano-tips change depending on the applied voltage;

6 is a block diagram of a nano-tip lithography apparatus using a nano-tip electron emission source according to an embodiment of the present invention,

FIG. 7 is a matching diagram of a tantalum oxide film nanotip array and a die map of a wafer; FIG.

* Explanation of symbols for the main parts of the drawings

101 substrate 102 tantalum film

103 chamber 104 probe

105: tantalum oxide film nanotip 201: wafer

202 photoresist TNA tantalum oxide nano tip array

TECHNICAL FIELD The present invention relates to an exposure apparatus, and more particularly, to a nanotip lithography apparatus.

Lithography (lithography) in the semiconductor manufacturing process is a technique for forming a fine pattern by patterning the surface of the wafer using a light source of a specific wavelength.

However, in recent years, the need for smaller and smaller fine patterns has encountered a limiting situation that cannot be patterned by the light source of the existing wavelength. This occurs as optical interference and diffraction occur, making it difficult to accurately focus light of a particular wavelength onto the wafer surface.

That is, due to the optical interference phenomenon and diffraction phenomenon, the minimum focusing size that can be accurately patterned no longer becomes small, and thus it is difficult to form a fine pattern on the wafer using a light source having a specific wavelength.

In order to overcome this difficulty, an ArF emulsion lithography apparatus has been developed, but this also shows a limitation in forming a semiconductor pattern of 50 nm or less. Finer patterns of fines are considered impossible with current technology, and X-ray lithography and E-beam lithography are considered alternatives to enable this.

However, in the case of an X-ray lithography apparatus, it is difficult to manufacture a mask and has many problems in patterning due to the light source characteristics.

1 is a cross-sectional view of an electron beam lithographic apparatus according to the prior art.

In FIG. 1, an electron beam lithography apparatus includes an electron gun 12 generating an electron beam 10, a molding deflector 14 and a molding lens for applying molding to the generated electron beam 10 in a predetermined shape. (16), objective lens (18) and deflector (20) for condensing the shaped electron beam (10), and circular aperture shape having the function of intermittently accelerating and accelerating the electron beam (10). It has a holder 22, a stage 28 on which the target 26 is mounted and perpendicular to the electron beam 10, and a chamber 24 for receiving the stage. Stage 28 moves target 26 two-dimensionally on a plane perpendicular to electron beam 10.

The projected electron beam 10 is incident on the target 26 (here wafer) mounted on the stage 28.

However, the electron beam lithography apparatus as shown in FIG. 1 has a disadvantage in the concept of throughput, which takes a long time to expose a single wafer despite excellent patterning characteristics. In addition, since the exposure is performed by the beam bundle, a pattern of 30 nm or less cannot be formed due to the force between the electrons.

Due to the above problems, the development of a lithography apparatus for patterning it is difficult and delayed in the recent semiconductor device to apply a fine pattern below 50nm, which is the biggest difficulty in developing the 50nm process.

The present invention has been proposed to solve the above problems of the prior art, a nano-tip electron emission source that can increase the throughput while being able to pattern even fine patterns of 30nm or less, its manufacturing method and nanotip lithography having the same The purpose is to provide a device.

Nanotip lithography apparatus of the present invention for achieving the above object has a nanotip array consisting of a plurality of nanotips and an electron emission source for emitting electrons from the nanotip by a predetermined applied voltage, and the nanotip of the electron emission source And a wafer coated with a photoresist disposed opposite the array and exposed by the emitted electrons, wherein the electron emission source comprises a substrate, a conductive film on the substrate, and a nanotip array on the conductive film. The nanotip array is characterized in that the oxide film nanotips oxidizing the surface of the conductive film is an array formed at a predetermined distance, the conductive film is a tantalum film, the oxide film nanotip is a tantalum oxide film nanotip It is characterized by that.

Hereinafter, the preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. .

An embodiment to be described later uses a nanotip electron emission source as an optical device portion (ie, an exposure source) of a lithographic apparatus, and the nanotip electron emission source is a tantalum oxide film nanotip array obtained by oxidizing a tantalum film using a probe. By applying a strong electric field to the tantalum oxide film nanotip array, electrons are emitted from the tantalum oxide film nanotip, and the emitted electrons are irradiated to the photoresist to thereby expose the lithography process.

First, a method of manufacturing a nanotip electron emission source will be described.

2A to 2D are views illustrating a method of manufacturing a nanotip electron emission source according to an embodiment of the present invention.

As shown in FIG. 2A, a tantalum film 102 is deposited on the substrate 101.

Herein, the substrate 101 is any one selected from the group consisting of polysilicon, single crystal silicon, TiN, Ti, and W, and the tantalum film 102 is formed by sputtering, chemical vapor deposition (CVD), and the like. Alternatively, the film is deposited to have a thickness of 100 mW to 300 mW using atomic layer deposition (ALD).

As shown in FIG. 2B, the substrate 101 having the tantalum film 102 deposited thereon is loaded into the chamber 103, and then the inside of the chamber 103 is placed in an oxidation atmosphere to form a probe (Tip, 104). The tantalum oxide film 102 is oxidized to form a tantalum oxide film nanotip (Ta ₂ O ₅ nanotip, 105).

At this time, in order to form the tantalum oxide film nano tip 105, the oxidation atmosphere uses H ₂ O or oxygen plasma, and the applied voltage to the probe 104 is 5V to 30V, and an oxidation time ) For 10 seconds to 3 minutes. Relative humidity is in the range of 40% to 80%.

In addition, an AFM probe (Atomic Force Microscopy tip) or an SPM probe (Scanning probe Microscopy tip) is used as the probe 104 used for oxidation. In particular, when an AFM probe is used, a tantalum film in an H ₂ O atmosphere is used. (102) is oxidized. At this time, the partial pressure of H ₂ O is 1% to 100%, and the voltage applied to the AFM probe is 5V to 30V.

In the above-described oxidation process, the substrate 101 is grounded. The tantalum oxide film nanotip 105 formed by the probe has a single crystal structure instead of a polycrystal. For reference, the tantalum oxide film formed through the general deposition methods has a polycrystalline structure. As described above, in the present invention, since the single crystal tantalum oxide nano-tip 105 using the probe 104 grows quantitatively under certain conditions, it is easier to control (particularly, to control the thickness) than the polycrystal.

The principle that the tantalum oxide film nanotip is formed, that is, the oxidation mechanism of the tantalum film surface is as follows.

When the AFM probe is set near the surface of the tantalum film 102, a Faraday current flows between the probe 104 and the surface of the tantalum film 102 through the H ₂ O atmosphere. At this time, the surface of the tantalum film 102 is oxidized to form a tantalum oxide film Ta ₂ O ₅ , and Ta ₂ O ₅ is formed by scanning the probe 104.

The chemical reaction between the probe and the H ₂ O atmosphere and the chemical reaction between the tantalum film and the H ₂ O atmosphere are as follows.

Chemical reaction between probe and H ₂ O atmosphere: 10H ⁺ + 10e-> 5H ₂

Chemical reaction between tantalum film and H ₂ O atmosphere: 2Ta + 10h ⁺ + 5H ₂ O-> Ta ₂ O ₅ + 10H ⁺

Here, "h +" means a hole.

As shown in FIG. 2C, the probe 104 is continuously moved and scanned to perform an oxidation process of the tantalum film 102, and the tantalum oxide film nanotip 105 is disposed at a predetermined distance on the entire surface of the tantalum film 102. Form several. Hereinafter, a plurality of tantalum oxide film nanotips 105 are referred to as a tantalum oxide film nanotip array (Ta ₂ O ₅ nanotip array, TNA).

At this time, in the tantalum oxide nano tip array (TNA), the tantalum oxide nano tip 105 is formed by matching a device die on the die map of the wafer 1: 1 to 4: 1 (Fig. 6). That is, the number of tantalum oxide film nanotips 105 is made larger than the number of device dies so that at least one tantalum oxide film nanotip 105 corresponds to one device die.

FIG. 3A is a cross-sectional view of a tantalum oxide film nanotip array, and FIG. 3B is a plan view showing that several tantalum oxide film nanotips are formed on a tantalum film at a predetermined distance.

4A is an AFM image of a tantalum oxide nanotip array with oxidation time at an applied voltage of 10V and a relative humidity of 65%. 4B is a view showing the height and width of the tantalum oxide nano-tips that change with time.

4A and 4B, as the oxidation time increases, the height and width of the tantalum oxide nano-tip also increase. However, as time increases, the formation rate of width and height gradually decreases.

FIG. 5A is an AFM image of a tantalum oxide nanotip array at different applied voltages, 75% relative humidity, and one second oxidation time. 5B is a view showing that the height and width of the tantalum oxide film nanotips change depending on the applied voltage.

5A and 5B, it can be seen that the height and width of the tantalum oxide nano-tip increase linearly while the applied voltage is increased.

Therefore, the longer the oxidation time and the greater the applied voltage, the higher the tantalum oxide nanotip has a higher height and a larger width.

For example, the tantalum oxide film nanotip 105 has a height of 2 nm to 10 nm and a width of 50 nm to 500 nm.

As shown in FIG. 2D, after the tantalum oxide film nanotips 105 are formed by matching the device dies 1: 1 to 4: 1 with each other, a strong electric field (voltage higher than the Fermi level of the tantalum oxide film) is formed. Hanging to 105, electrons (Electron, E) is released into the vacuum (that is, electrons are accelerated and released by a strong electric field). At this time, electrons E are emitted from the tantalum film 102 below the tantalum oxide film nanotip 105, and electrons are not emitted from the tantalum film 12 around the tantalum oxide film nanotip 105. This improves the convergence of the electrons E.

On the other hand, the work function of the tantalum film 102 is 4.12 eV. Here, the work function refers to the height of the barrier corresponding to the energy level required for electrons to escape the metal surface. In general, the work function is the difference between the escape level (Wo) and the Fermi level (Wf). (Wo-Wf) [eV]. In the end, the work function is expressed as the amount of work required to release one electron from a metal body into space. On the other hand, the escape level (escape level) is the level of the upper part of the barrier that corresponds to the energy level for electrons to escape the metal plane, and the Fermi level has the outermost electron (valent electron) at the absolute temperature zero (0 [K]). Branches are energy high.

Therefore, in order to emit electrons in the tantalum film 102, an energy higher than the Fermi level, that is, a voltage higher than the work function (4.12 eV) may be applied. Preferably, the voltage applied to emit electrons is 4.13V to 10V.

The exposure process is performed using the electrons emitted by the above principle.

6 is a configuration diagram of a nanotip lithography apparatus using a nanotip electron emission source according to an embodiment of the present invention, and FIG. 7 is a matching diagram of a tantalum oxide film nanotip array and a die map of a wafer.

As shown in FIG. 6, after the photoresist 202 is applied on the wafer 201, a lithography process is performed using the electrons emitted in FIG. 2D. That is, a lithography process is performed by mounting a substrate 101 on which a completed tantalum oxide film nanotip array (TNA), as shown in FIG. In other words, the substrate 101 on which the tantalum oxide film nanotip array (TNA) is formed replaces the conventional optical device portion such as electron beam and light.

Meanwhile, referring to FIG. 7, in the tantalum oxide film nanotip array (TNA), the tantalum oxide film nanotip 105 is formed by matching the device die 201a on the die map of the wafer at 4: 1. Able to know. That is, four tantalum oxide film nanotips 105 correspond to one device die 201a.

As described above, using the substrate 101 on which the tantalum oxide film nanotip array (TNA) is formed as an electron emission source eliminates the need for an optical lens portion, which is considered to be important in a conventional lithography apparatus, and also generates a light source. It also eliminates the need for smaller and simpler equipment.

In addition, since one electron is controlled and used in a lithography process, it is easier to control than a conventional light source.

In addition, the throughput problem, which is a disadvantage of the conventional electron beam lithography apparatus, is solved by lithography of multiple dies at the same time because the nanotips are formed in accordance with the device die dimension. As a result, even fine patterns of 30 nm or less can be patterned.

In addition, the method of producing a single crystal tantalum oxide film nanotip using a probe is easy to control because it grows quantitatively under certain conditions.

In addition, in terms of maintenance, the nanotip substrate and the nanotip generation cost and time is short, has an advantageous advantage.

Although the technical idea of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

The present invention described above has the effect that the size of the lithographic apparatus can be made small and simple since there is no need for a device for producing the optical lens portion and the light source.

In addition, the present invention is easier to control than a conventional light source because it controls one electron and is used in a lithography process, and it is easy to control nanotips by using a method of generating a single crystal tantalum oxide nanotip using a probe. In addition, since the nanotip substrate and the nanotip generation cost and time is short, there is an easy maintenance.

In addition, the present invention can lithography multiple dies simultaneously by matching the nanotips with the device die dimensions on the device map of the wafer, thereby improving throughput.

Claims (16)

An electron emission source having a nanotip array consisting of a plurality of nanotips and emitting electrons from the nanotips by a predetermined applied voltage; And A photoresist-coated wafer disposed opposite the nanotip array of the electron emission source and exposed by the emitted electrons Nanotip lithography apparatus comprising a. The method of claim 1, The electron emission source is, Board; A conductive film on the substrate; And Nano tip array on the conductive film Nanotip lithography apparatus comprising a. The method of claim 2, The nano tip array, And an oxide film nanotip oxidizing the surface of the conductive film is an array formed at predetermined distances. The method of claim 3, And the conductive film is a tantalum film and the oxide film nanotip is a tantalum oxide film nanotip. The method of claim 4, wherein And a high potential voltage is applied to the electron emission source, and the wafer is grounded. The method of claim 5, And the high potential voltage is higher than the Fermi level of the tantalum oxide nanotip. The method of claim 1, Wherein each nanotip of the nanotip array is matched 1: 1 to 4: 1 with the diemap of the wafer. Forming a conductive film on the substrate; Moving the probe to oxidize the surface of the conductive film to form a nanotip array comprising oxide nano-tips of the conductive film; And Emitting electrons by applying a predetermined voltage to the nanotip array; Method for producing nanotip electron emission source for lithography. The method of claim 8, Forming the nanotip array, A method of manufacturing a nanotip electron emission source for lithography, characterized in that a predetermined voltage is applied to the probe in an oxidizing atmosphere. The method of claim 9, The probe, A method for producing a nanotip electron emission source for lithography, comprising using an AFM probe or an SPM probe. The method of claim 9, The oxidation atmosphere is, A method for producing a nanotip electron emission source for lithography, wherein H ₂ O (partial pressure of H ₂ O is 1% to 100%) or O ₂ plasma is used. The method of claim 9, The voltage applied to said probe is 5V-30V, The manufacturing method of the nano tip electron emission source for lithography. The method of claim 8, The conductive film is formed of a tantalum film, the method for producing a nano-tip electron emission source for lithography. The method of claim 13, The tantalum film is a method for producing a nano-tip electron emission source for lithography, characterized in that the deposition by any one of the sputtering method, chemical vapor deposition method or atomic layer deposition method to 100 ~ 300Å thickness. The method of claim 8, The substrate, Method for producing a nano-tip electron emission source for lithography, characterized in that formed by any one selected from the group consisting of polysilicon, single crystal silicon, TiN, Ti and W. The method of claim 8, Applying a voltage to the nanotip array to emit electrons, A method of manufacturing a nanotip electron emission source for lithography, wherein a voltage higher than the Fermi level of the oxide film nanotip of the conductive film is applied.

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