KR20070054022A - Capacitor having conductive compound layer and fabrication process thereof - Google Patents

Abstract

Disclosed are a capacitor having a conductive compound layer and a method of manufacturing the same. According to the present invention, there is provided a conductive compound layer between the lower electrode and the dielectric layer, the conductive compound layer comprising the same metal material as the material of the lower electrode and the same oxide as the material of the dielectric layer, thereby improving the interfacial properties between the lower electrode and the dielectric layer. Provide a capacitor. In addition, the present invention provides a method of manufacturing the capacitor to facilitate the composition and thickness control of the conductive compound layer using the ALD method.

Capacitors, Semiconductors, RAM, Conductive Compounds, ALD

Description

Capacitor with conductive compound layer and manufacturing method thereof

1 is a cross-sectional view showing one embodiment of a capacitor having a conductive compound layer according to the present invention.

2 is a cross-sectional view illustrating an embodiment of a semiconductor memory device according to the present invention.

3 is a cross-sectional view showing a conventional comparative example for a capacitor according to the present invention.

4 is a graph obtained by analyzing the crystal phase of the comparative example of FIG. 3 using X-Ray Diffraction (X-ray diffraction).

5 is a graph measuring leakage current characteristics of a capacitor according to the comparative example of FIG. 3.

6 shows an embodiment of a capacitor according to the invention.

FIG. 7 is a scanning electron microscope (SEM) image showing a conductive compound layer provided on a lower electrode according to the present invention.

FIG. 8 is a graph obtained by analyzing the crystal phase of the example of FIG. 6 using X-Ray Diffraction (X-ray diffraction).

9 is a graph measuring leakage current characteristics of a capacitor according to the embodiment of FIG. 6.

10 shows one cycle of an ALD process to form a conductive compound layer.

<Description of Symbols for Main Parts of Drawings>

10: lower electrode 30: dielectric layer

40: upper electrode 100, 100 ': capacitor

110, 110 ': lower electrode 120, 120': conductive compound layer

130, 130 ': dielectric layers 140, 140': upper electrode

200: transistor structure 211: source region

212: drain region 213: semiconductor channel

230: gate 240: conductive plug

The present invention relates to a capacitor including a lower electrode, a dielectric layer, and an upper electrode, and a method of manufacturing the same, and more particularly, a capacitor having a conductive compound layer between the electrode and the transition metal oxide dielectric to reduce leakage current, and a method of manufacturing the same. It is about.

As technology advances, lighter and smaller electronic devices are gaining attention, while improving performance. In order to miniaturize electronic devices such as mobile phones, computers, MP3s, digital cameras, and PDAs, it is necessary to miniaturize and integrate internal memory. A random access memory (RAM) using a capacitor including upper and lower electrodes and a dielectric layer as a storage node is a dynamic random access memory (DRAM) used in a computer, a PDA, and the like.

To increase the accuracy of the information stored in the memory, it is advantageous to have a large capacitance of the capacitor. The capacitance of the capacitor is determined by various factors, and has a relationship with the various factors as in Equation 1 below.

Where ε is the dielectric constant, A is the effective area, and t is the thickness of the dielectric layer.

That is, the capacitance can be increased by reducing the thickness of the dielectric layer and increasing the effective area. However, there is a limit to increasing the effective area. This is because the semiconductor memory device is opposed to the direction of increasing the integration rate. There is also a limit to reducing the thickness of the dielectric layer. This is because when the thickness of the dielectric layer is reduced, the charge loss of the dielectric layer increases rapidly due to a sudden increase in leakage current due to tunneling.

Therefore, by using a high-k dielectric material, a so-called high-k dielectric, which has a higher dielectric constant than a conventional dielectric, a capacitor and a method of manufacturing the same have a small leakage current while reducing the area while ensuring a proper capacitance and reducing the thickness of the dielectric layer. A lot of research is done to do this.

The present invention has been proposed to meet the above requirements, and includes a noble metal electrode such as ruthenium (Ru) and iridium (Ir), and a transition metal oxide dielectric having a high dielectric constant such as TiO ₂ , ZrO ₂ , and HfO ₂ . It is an object of the present invention to provide a capacitor having excellent electrical characteristics, and to provide a method of manufacturing the same efficiently.

In particular, in the process of forming a dielectric layer on the electrode, the interface between the electrode and the dielectric layer is deteriorated, thereby providing a structure of the capacitor and a method of manufacturing the capacitor that can solve the problem of deterioration of the electrical characteristics of the capacitor increases the leakage current and decreases the capacitance. Its purpose is to.

In order to achieve the above object of the invention, the present invention provides a capacitor having a conductive compound layer. In the capacitor according to the present invention, a capacitor comprising a lower electrode and an upper electrode and a dielectric layer provided between the two electrodes,

It is disposed between the lower electrode and the dielectric layer, comprising a metal material and the same oxide as the material of the dielectric layer, characterized in that it comprises a conductive compound layer.

In addition, the capacitor according to an aspect of the present invention,

A lower electrode made of a ruthenium-based metal;

An upper electrode made of a ruthenium-based metal and disposed to face the lower electrode;

A dielectric layer made of a transition metal oxide and disposed between the lower electrode and the upper electrode; And

And a conductive compound layer disposed between the lower electrode and the dielectric layer, the conductive compound layer comprising a ruthenium-based metal material identical to the lower electrode material and a transition metal oxide identical to the dielectric layer material.

In addition, the present invention provides a method of manufacturing a capacitor having a conductive compound layer. In the method of manufacturing a capacitor according to the present invention, a method of manufacturing a capacitor including a lower electrode, an upper electrode, and a dielectric layer provided between the two electrodes,

(A) forming a lower electrode on a substrate with a ruthenium-based metal;

(B) forming a conductive compound layer on the upper surface of the lower electrode, the conductive compound layer including a ruthenium based metal as the lower electrode material and a transition metal oxide as the dielectric layer material; And

(C) forming a transition metal oxide dielectric layer on the conductive compound layer.

Hereinafter, with reference to the accompanying drawings will be described in detail the features and advantages of the present invention through examples and comparative examples of the present invention.

1 is a cross-sectional view showing one embodiment of a capacitor having a conductive compound layer according to the present invention. The capacitor 100 according to the present invention includes a lower electrode 110, an upper electrode 140, and a dielectric layer 130 disposed between the two electrodes, and between the lower electrode 110 and the dielectric layer 130. A conductive compound layer 120 disposed thereon.

Here, the lower electrode 110 and the upper electrode 140 is a group consisting of noble metals such as ruthenium (Ru), iridium (Ir), platinum (Pt), palladium (Pd), and alloys thereof. It is preferably made of a metal selected from among.

The dielectric layer 130 is made of a transition metal oxide dielectric. Preferably, the transition metal oxide may be made of a so-called high-k dielectric having a high dielectric constant, such as TiO _x , ZrO _x , HfO _x , TaO _x , STO, or an alloy thereof. More specifically, it may be made of TiO ₂ , ZrO ₂ , HfO ₂ , Ta ₂ O ₃ , SrTiO _3, or an alloy thereof.

The conductive compound layer 120 is made of a solid compound including the same metal as the material of the lower electrode 110 and the same transition metal oxide as the material of the dielectric layer 130, and the solid compound is electrically conductive. Has a composition. The conductive compound layer 120 serves as a diffusion barrier to prevent inter-diffusion between the lower electrode 110 and the dielectric layer 130 during the high temperature process of forming the dielectric layer 130. As well as performing a part of the substantially conductive electrode, the dielectric layer 130 and the substantially improved interface property of the electrode.

Since the conductive compound layer 120 has electrical conductivity as described above, the conductive compound layer 120 does not affect the substantial dielectric thickness in the capacitor structure and provides excellent interfacial properties with the dielectric layer 130. Accordingly, the capacitor 100 according to the present invention has excellent electrical properties such as low leakage current and large capacitance compared to the conventional capacitor (see FIG. 3) without the conductive compound layer 120. Can have characteristics.

The composition of the compound that allows the conductive compound layer 130 to have electrical conductivity may vary depending on the constituent material, and may be experimentally determined. For example, when the material of the lower electrode 110 is ruthenium (Ru) and the material of the dielectric layer 130 is TiO ₂ , ruthenium (Ru) is sufficient to function as a substantial electrode at a composition ratio of 32 at% or more. Electrical conductivity can be obtained.

2 is a cross-sectional view illustrating an embodiment of a semiconductor memory device according to the present invention. The semiconductor memory device 300 according to the present exemplary embodiment includes a transistor structure 200 and a capacitor 100 connected to the drain region 212 of the transistor structure 200. In the transistor structure 200, the source region 211 and the drain region 212 doped with conductive impurities are formed in the semiconductor substrate 210. The semiconductor channel 213 is formed between the source region 211 and the drain region 212, and a gate 230 is provided thereon. The gate 230 includes a gate electrode and a gate insulating layer that insulates the gate electrode from the semiconductor channel 213. In addition, the drain region 212 is connected to the capacitor 100 through a conductive plug 240 passing through the insulating layer 220 thereon.

The capacitor 100 is a characteristic configuration of the semiconductor memory device according to the present invention and has a structure as described with reference to FIG. 1. More specifically, the lower electrode 110 of the capacitor 100 is connected to the conductive plug 240.

When a voltage equal to or greater than a threshold voltage is applied through the gate electrode, a current (Id: drain current) flows through the semiconductor channel 213. As a result, the transistor structure 200 serves as a switch for the capacitor 100 according to the present invention.

Hereinafter, look at the features and advantages of the present invention through a comparative example according to the prior art and a specific embodiment according to the present invention.

(Comparative Example)

3 is a cross-sectional view showing a conventional comparative example for a capacitor according to the present invention. According to a comparative example, formed of TiO ₂ on the upper surface of the lower electrode 10 formed of Ru Dielectric layer 30 is provided, and upper electrode 40 is provided thereon. The thickness of the lower electrode 10 is about 300 kPa, and the thickness of the dielectric layer 30 is about 150 kPa. The upper electrode 40 used a Pt (platinum) electrode having a thickness of 1000 Å.

However, in order to form the dielectric layer 30, a high temperature process of 600 ° C. or higher is required. In the process, deterioration occurs at the hatched A region, that is, at the interface between the lower electrode 10 and the dielectric layer 30. In particular, when the lower electrode 10 is formed by sputtering or chemical vapor deposition (CVD) according to a conventional process, and the dielectric layer 30 is also formed thereon by chemical vapor deposition, this interface deterioration is avoided. it's difficult.

4 is a graph obtained by analyzing the crystal phase of the comparative example of FIG. 3 using X-Ray Diffraction (X-ray diffraction). From the graph, it can be seen that TiO ₂ constituting the dielectric layer 30 exists not only in the rutile phase but also in the anatase phase. The presence of this anatase phase has the effect of increasing the leakage current through the dielectric layer 30.

5 is a graph measuring leakage current characteristics of a capacitor according to the comparative example of FIG. 3. The leakage current changes according to the voltage applied to the capacitor according to the comparison. For example, when the voltage applied to the capacitor in the semiconductor memory device is about -1 V, it can be seen that the leakage current value of about 10 ^-1 A / ㎠. The large leakage current in the capacitor in the semiconductor memory device means that the accumulated amount of charge, that is, the loss of information is fast, and thus an improvement is required.

(Example)

6 shows an embodiment of a capacitor according to the invention. The basic structure of the capacitor 100 ′ according to the present embodiment is the same as the capacitor 100 of FIG. 1. The lower electrode 110 'is a Ru electrode having a thickness of 300 GPa, and the conductive compound layer 120' is a solid compound of Ru and TiO _{2 having} a thickness of 226 GPa. The composition ratio of the conductive compound layer 120 ′ is 32 at% ruthenium (Ru). The dielectric layer 130 ′ is formed of TiO ₂ having a thickness of 150 μs, and an upper electrode 140 ′ is formed thereon with Pt having a thickness of 1000 μs.

FIG. 7 is a scanning electron microscope (SEM) image showing a conductive compound layer provided on a lower electrode according to the present invention. Solid compound of Ru and TiO ₂ on the Ru thin film, that is, Ru _x Ti _y O _z The layer is formed to a thickness of 226 kPa. It is preferable to use atomic layer deposition (ALD) as a method of forming such a conductive compound layer. By using the ALD method, the composition ratio of the conductive compound layer can be controlled as described above, and the surface roughness of the conductive compound layer can be increased to improve the interface property between the surface and the dielectric layer to be formed thereon.

FIG. 8 is a graph obtained by analyzing the crystal phase of the example of FIG. 6 using X-Ray Diffraction (X-ray diffraction). Looking at the graph, it can be seen that most of the TiO ₂ constituting the dielectric layer is present in the rutile phase. This can predict the improvement of leakage current characteristics.

9 is a graph measuring leakage current characteristics of a capacitor according to the embodiment of FIG. 6. The capacitor according to the present embodiment has a leakage current value of approximately 10 ^-5 A / cm 2 when the applied voltage is -1V. It can be seen that the leakage current characteristics are significantly improved compared to the comparative example having a leakage current value of about 10 ⁻¹ A / cm 2 under the same conditions.

Hereinafter, a method of manufacturing a capacitor having a conductive compound layer according to the present invention will be described.

First, a lower electrode is formed of a ruthenium-based metal on a substrate. The substrate does not mean only a specific single plate, but broadly refers to a plate-shaped structure for supporting a capacitor according to the present invention. For example, when manufacturing a semiconductor memory device employing a capacitor according to the present invention, a semiconductor substrate on which a transistor array is formed corresponds to the substrate. In addition, the manufacturing method of the capacitor according to the present invention may be formed on all kinds of substrates that can be predicted by those skilled in the art.

Ruthenium is a metal material belonging to a noble metal, and chemically, ionization energy is much larger than that of hydrogen, and is not oxidized by acid and oxidizing agent. Moreover, electrical conductivity is very high and it is suitable as an electrode material of a semiconductor element. Precious metal materials with similar properties include gold, platinum, rhodium, osmium and iridium. The ruthenium-based metal includes not only pure ruthenium but also an alloy composition mainly composed of ruthenium, and may be replaced with the other precious metal materials described above if necessary.

The method of forming the lower electrode from the ruthenium-based metal may be sputtering, chemical vapor deposition (CVD), or atomic layer deposition (ALD), and the like. Formation and electrode patterning of the electrode layer may be performed. Also known in the art can be applied.

Next, a conductive compound layer including a ruthenium-based metal identical to the lower electrode material and a transition metal oxide to be used as a dielectric layer is formed on the lower electrode. The conductive compound layer is a solid solution in which a transition metal oxide is employed in a ruthenium matrix, and has a composition ratio that is electrically conductive to substantially serve as an electrode.

As the transition metal oxide, so-called high-k dielectric materials having a high dielectric constant, such as TiO _x , ZrO _x , HfO _x , TaO _x , STO or alloys thereof, are suitable. More specific examples include TiO ₂ , ZrO ₂ , HfO ₂ , Ta ₂ O ₃ , SrTiO _3, or alloys thereof. The composition ratio having an appropriate electrical conductivity may vary depending on the type of transition metal oxide that is dissolved in the same lower electrode material. For example, when TiO ₂ is applied as the transition metal compound when the lower electrode material is ruthenium, ruthenium is contained in a ratio of 32 at% or more and less than 100 at%, and TiO ₂ is contained in a ratio of more than 0 at% and 68 at% or less. It is preferable.

The conductive compound layer is preferably formed using atomic layer deposition (ALD). This is because the thickness and composition of the thin film can be controlled at the atomic level using the ALD method, and the surface roughness of the formed thin film is also excellent. The process of forming the conductive compound layer using the ALD method is as follows.

10 shows one cycle of an ALD process to form a conductive compound layer. First, source gas A is injected into the reactor and adsorbed onto the substrate surface. Then only chemisorbed species remain on the surface through purge or pumping. The source gas B is again injected into the reactor to react with the chemisorbed species, and then purged or pumped so that only a unit layer of AB formed by the reaction remains. This is one cycle of atomic layer formation.

By repeating this cycle, a layer of desired thickness can be formed. In addition, the unit layer (CD) of other components may be formed by using the source gas C instead of the source gas A and the source gas D instead of the source gas B during the cycle. This can be used to form a compound layer of a desired composition. In this case, it is preferable to perform a cycle of forming a unit layer of the material at a frequency according to the composition ratio of the material constituting the layer. In addition, for even distribution of the constituent materials, it is preferable to alternate cycles corresponding to each constituent material. In this way, the uniformity of the composition may be further improved through heat treatment after forming the conductive compound layer having a desired thickness.

According to an embodiment of the present invention, it is preferable to mainly perform the cycle of forming the Ru unit layer, and to alternately perform the cycle of forming the TiO ₂ unit layer at a frequency corresponding to the aforementioned composition ratio. In this case, the types of source gas A and source gas B (reactive gas) required for forming a Ru unit layer and source gas C and source gas D (reactive gas) required for forming a TiO ₂ unit layer are very diverse. Can be used.

After forming the conductive compound layer, a dielectric layer is formed thereon, and an upper electrode is formed on the dielectric layer. The method of forming the dielectric layer and the upper electrode may follow any method known in the art. Since the upper surface of the conductive compound layer formed by the ALD method is excellent in surface roughness, it provides excellent interfacial properties in relation to the dielectric layer formed thereon.

While many details are set forth in the foregoing description, they should be construed as illustrative of preferred embodiments, rather than to limit the scope of the invention. Therefore, the scope of the present invention should not be defined by the described embodiments, but should be determined by the technical spirit described in the claims.

According to the above-described configuration, the capacitor having the conductive compound layer according to the present invention arranges the conductive compound layer between the lower electrode and the dielectric layer, thereby improving capacitance and leakage current characteristics by improving the interface characteristics between the electrode and the dielectric layer. Etc., there is an effect of improving the electrical characteristics of the capacitor.

In addition, when the capacitor according to the present invention is employed in a semiconductor memory device, the degree of integration can be improved and power consumption can be reduced by reducing leakage current.

In addition, the method of manufacturing the capacitor according to the present invention has an effect of facilitating the control of the composition and thickness of the conductive compound layer using the ALD method, and improving the surface roughness to improve the interface characteristics with the dielectric layer formed thereon. have.

Claims (18)

In the capacitor comprising a lower electrode and the upper electrode and a dielectric layer provided between the two electrodes, And a conductive material layer disposed between the lower electrode and the dielectric layer, the conductive material layer comprising a metal material identical to the material of the lower electrode and the same oxide as the material of the dielectric layer. The method of claim 1, The lower electrode is a capacitor, characterized in that made of a metal material of the noble metal (noble metal) system. The method of claim 2, The lower electrode is a capacitor, characterized in that selected from the group consisting of ruthenium (Ru), iridium (Ir), platinum (Pt), palladium (Pd) and alloys thereof. The method according to any one of claims 1 to 3, And the dielectric layer is made of a transition metal oxide. The method of claim 4, wherein The transition metal oxide is a capacitor, characterized in that any one selected from the group consisting of TiO _x , ZrO _x , HfO _x , TaO _x , STO and alloys thereof. A lower electrode made of a ruthenium-based metal; An upper electrode made of a ruthenium-based metal and disposed to face the lower electrode; A dielectric layer made of a transition metal oxide and disposed between the lower electrode and the upper electrode; And And a conductive compound layer disposed between the lower electrode and the dielectric layer, the conductive compound layer comprising a ruthenium-based metal material identical to the lower electrode material and a transition metal oxide identical to the dielectric layer material. The method of claim 6, The transition metal oxide is a capacitor, characterized in that any one selected from the group consisting of TiO _x , ZrO _x , HfO _x , TaO _x , STO and alloys thereof. The method of claim 6, The transition metal oxide is TiO ₂ , The conductive compound layer is a capacitor, characterized in that containing at least 32 at% ruthenium-based metal material. A semiconductor memory device comprising a transistor structure and a capacitor connected to a drain region of the transistor structure. The capacitor, A lower electrode made of a ruthenium-based metal and connected to a drain region of the transistor structure; An upper electrode made of a ruthenium-based metal and disposed to face the lower electrode; A dielectric layer made of a transition metal oxide and disposed between the lower electrode and the upper electrode; And And a conductive compound layer disposed between the lower electrode and the dielectric layer, the conductive compound layer comprising a ruthenium-based metal material identical to the lower electrode material and a transition metal oxide identical to the dielectric layer material. The method of claim 9, The transition metal oxide is any one selected from the group consisting of TiO _x , ZrO _x , HfO _x , TaO _x , STO and alloys thereof. The method of claim 9, The transition metal oxide is TiO ₂ , The conductive compound layer is a semiconductor memory device, characterized in that the conductive compound layer contains at least 32 at% ruthenium-based metal material. In the manufacturing method of a capacitor comprising a lower electrode and an upper electrode and a dielectric layer provided between the two electrodes, (A) forming a lower electrode on a substrate with a ruthenium-based metal; (B) forming a conductive compound layer on the upper surface of the lower electrode, the conductive compound layer including a ruthenium based metal as the lower electrode material and a transition metal oxide as the dielectric layer material; And (C) forming a transition metal oxide dielectric layer on the conductive compound layer. The method of claim 12, The step (b) is a method of manufacturing a capacitor, characterized in that using the atomic layer deposition (ALD) method. The method of claim 13, Step (b) uses atomic layer deposition (ALD), and alternates the cycle of forming a ruthenium-based metal film with the cycle of forming the transition metal oxide film at a frequency corresponding to the composition ratio of each component. Method for producing a capacitor, characterized in that performed. The method of claim 12, The transition metal oxide is any one selected from the group consisting of TiO _x , ZrO _x , HfO _x , TaO _x , STO and alloys thereof. The method of claim 12, In the step (b), the transition metal oxide is TiO ₂ and the conductive compound layer is a method for producing a capacitor, characterized in that it is composed to be electrically conductive containing at least 32 at% of the ruthenium-based metal material. The method of claim 12, In the step (b), the atomic layer deposition (ALD) method is used, and a cycle of forming a ruthenium-based metal film and a cycle of forming the transition metal oxide film are alternated at a frequency corresponding to the composition ratio of each component. And the transition metal oxide is TiO ₂ . The method of claim 12, And a heat treatment step between the step (b) and the step (c).

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