KR20070044871A - Electro luminescence display panel - Google Patents

Abstract

An electroluminescent display panel having improved electrical characteristics is disclosed. The electroluminescent display panel includes data lines, power lines, and gate lines formed on the base substrate to define unit pixels, and includes a switching thin film transistor, a driving thin film transistor, and an electroluminescent element. The switching thin film transistor is formed in a unit pixel. The driving thin film transistor is a P-channel metal oxide semiconductor (PMOS) formed in the unit pixel and electrically connected to the switching thin film transistor. The electroluminescent device is electrically connected to the driving thin film transistor to generate light. As described above, since the thin film transistor employed in the electroluminescent display panel is composed of PMOS whose major carrier is the major, it is possible to prevent the thin film transistor from deteriorating due to the current daisy, thereby preventing further degradation of the electrical characteristics of the thin film transistor. .

Semiconductor layer, impurity layer, group 3 element

Description

EL display panel {ELECTRO LUMINESCENCE DISPLAY PANEL}

1 is a plan view illustrating unit pixels of an electroluminescent display panel according to an exemplary embodiment of the present invention.

FIG. 2 is a circuit diagram conceptually illustrating a unit pixel of FIG. 1.

3 is a cross-sectional view taken along the line II ′ of FIG. 1.

<Explanation of symbols for the main parts of the drawings>

100 electroluminescent display panel 110 base substrate

120: gate insulating layer 122: first contact hole

130: passivation layer 132: second contact hole

140: bank layer 142: light emitting hole

GL: Gate wiring DL: Data wiring

TFT1: switching thin film transistor GE1: switching gate electrode

SE1: switching source electrode DE1: switching drain electrode

AT1: switching active layer AT1-a: switching semiconductor layer

AT1-b: switching impurity layer TFT2: driving thin film transistor

ELD: EL device EL: EL layer

PE: anode electrode NE: cathode electrode

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electroluminescent display panel, and more particularly to an electroluminescent display panel having improved electrical characteristics.

In general, a flat panel display includes a liquid crystal display, a plasma display panel, a field emission display, an electroluminescence display, and the like. Among the flat panel display devices, the electroluminescent display includes an electroluminescent display panel in which a plurality of electroluminescent elements are formed to correspond to a plurality of unit pixels.

Each electroluminescent device has two electrodes and an electroluminescent layer interposed between the electrodes to emit itself by an electric field between the electrodes. In the electroluminescent device, at least one of the two electrodes is formed as a transparent electrode to emit light generated in the electroluminescent layer to the outside to display an image. The electroluminescent device is driven by a current driving method to emit light.

The electroluminescent display panel is electrically connected to the electroluminescent device, and further includes at least two thin film transistors to drive the electroluminescent device. Each thin film transistor includes a gate electrode, a source electrode, a drain electrode, and an active layer. Here, the active layer is composed of a semiconductor layer and an impurity layer.

The gate electrode is formed on a base substrate, and the source electrode and the drain electrode are formed to be spaced apart from each other on the gate electrode. The semiconductor layer is formed between the gate electrode and the source electrode and the drain electrode, and the impurity layer is formed between the semiconductor layer and the source electrode and between the semiconductor deposition and drain electrodes, respectively.

In general, the semiconductor layer is made of amorphous silicon (a-Si), and the impurity layer is a highly ion doping amorphus silicon (n + a-Si) containing a Group 5 element as an impurity. Is done. That is, the thin film transistors employed in the electroluminescent display panel are N-channel metal oxide semiconductors (NMOS) in which electrons are used as major carriers.

However, when the thin film transistor is an NMOS, the thin film transistor is easily deteriorated when the electroluminescent device is driven by a current driving method. That is, when electrons, which are main carriers, continuously move to transmit current, the thin film transistors may be deteriorated by excessive movement of electrons. Such deterioration of the thin film transistor lowers the electrical characteristics of the thin film transistor.

Accordingly, an object of the present invention is to solve such a conventional problem, and an object of the present invention is to provide an electroluminescent display panel which prevents deterioration of a thin film transistor and improves electrical characteristics.

In the electroluminescent display panel according to an exemplary embodiment of the present invention, a data line, a power line, and a gate line are formed to define a unit pixel on a base substrate, and a switching thin film transistor and a drive It includes a thin film transistor and an electroluminescent element.

The switching thin film transistor is formed in a unit pixel. The driving thin film transistor is a P-channel metal oxide semiconductor (PMOS) formed in the unit pixel and electrically connected to the switching thin film transistor. The electroluminescent device is electrically connected to the driving thin film transistor to generate light.

Optionally, the driving thin film transistor may include a driving gate electrode formed on the base substrate, a driving active layer formed on the driving gate electrode to cover the driving gate electrode, and implanted with impurity of Group 3 elements; And a driving source electrode and a driving drain electrode formed on the driving active layer and spaced apart at predetermined intervals.

In addition, the switching thin film transistor is also preferably a PMOS, and optionally formed on top of the switching gate electrode to cover the switching gate electrode and the switching gate electrode formed on the base substrate, the impurity of the Group 3 element is implanted And a switching source electrode and a switching drain electrode formed on the switching active layer and spaced apart from each other at predetermined intervals.

According to the present invention, since the thin film transistor employed in the electroluminescent display panel is composed of PMOS whose major carrier is the major, the thin film transistor is prevented from deteriorating due to the current daisy, thereby preventing further degradation of the electrical characteristics of the thin film transistor. can do.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a plan view illustrating unit pixels of an electroluminescent display panel according to an exemplary embodiment of the present invention, and FIG. 2 is a circuit diagram conceptually illustrating the unit pixels of FIG. 1.

Referring to FIGS. 1 and 2, the electroluminescent display panel 100 according to the present exemplary embodiment may have a data line DL, a gate line GL, a power line line VL, and an electroluminescent element ELD when viewed in plan view. ), A switching thin film transistor TFT1, a driving thin film transistor TFT2, and a storage capacitor SC.

The data lines DL are formed to extend in the first direction, and a plurality of data lines DL are formed in parallel along the second direction. The data line DL is electrically connected to the switching thin film transistor TFT1 to apply a data signal.

The gate lines GL are formed long in the second direction to intersect the data lines DL, and a plurality of gate lines GL are formed in parallel in the first direction. The first direction is, for example, perpendicular to the second direction. In this case, as the data lines DL and the gate lines GL cross each other, a plurality of unit pixels are defined. In each of the unit pixels, an EL device, a switching thin film transistor TFT1, a driving thin film transistor TFT2, and a storage capacitor SC are formed.

The power line VL is formed parallel to the data line DL, and is formed, for example, spaced apart from the data line DL in a direction opposite to the second direction. The power line VL is electrically connected to the driving thin film transistor TFT2 to apply a driving current.

The ELD generates light by an electric field. The ELD may generate different light for each of the unit pixels. For example, the ELD may generate red light, green light, and blue light. The electroluminescent device ELD includes an anode electrode PE, an electroluminescent layer EL, and a cathode electrode (not shown). In this case, an electroluminescent layer EL is formed between the anode electrode PE and the cathode electrode.

The anode electrode PE is formed in the unit pixel and is electrically connected to the driving thin film transistor TFT2. The positive electrode PE receives a driving current from the driving thin film transistor TFT2 to generate an electric field between the positive electrode PE and the negative electrode. The anode electrode PE is made of a conductive material and includes, for example, gold (Au) or silver (Ag).

The electroluminescent layer EL is formed on the anode electrode PE, and generates light by an electric field formed between the two electrodes. The electroluminescent layer EL may be formed of, for example, an organic electroluminescent material, and may include a hole injection layer, a hole transport layer, a light emitting layer, an electron injection layer, and an electron transport layer.

The organic electroluminescent material is, for example, a polymer light emitter such as a polyphenylvinylene derivative or a polyfluorene derivative. The organic electroluminescent material may include a red electroluminescent material generating red light, a green electroluminescent material generating green light, and a blue electroluminescent material generating blue light.

The cathode electrode is formed on the front surface of the substrate while being formed on the electroluminescent layer EL. The cathode electrode receives a common voltage from the outside to generate an electric field between the anode electrode PE and the cathode electrode.

The cathode electrode is made of a transparent and conductive material. For example, an indium tin oxide thin film (ITO), an indium zinc oxide thin film (IZO), an amorphous indium oxide thin film (a-ITO), etc. are patterned by a photo-etch process. Is formed. In this embodiment, only the cathode electrode is described as being transparent and made of a conductive material. Alternatively, both the anode electrode PE and the cathode electrode are made of a transparent conductive material, or only the anode electrode is transparent. It may be made of a material.

Briefly describing the principle that light is generated in the ELD, the anode electrode PE receives a driving current from the driving thin film transistor TFT2 and the cathode electrode receives a common voltage from the outside. Specifically, for example, the anode electrode PE receives holes by the driving current, and the cathode electrode receives electrons by the common voltage.

Holes supplied to the anode electrode PE and electrons supplied to the cathode electrode are coupled to each other in the electroluminescent layer EL by an electric field generated between the two electrodes. When the holes and the electrons are combined with each other in the electroluminescent layer EL, excitons, which are molecules in an excited state, are generated, and the exciton is converted to molecules in a ground state to generate light. do.

The switching thin film transistor TFT1 is formed in the unit pixel and includes a switching gate electrode GE1, a switching source electrode SE1, a switching drain electrode DE1, and a switching active layer AT1.

The switching gate electrode GE1 extends in the first direction from the gate line GL. The switching source electrode SE1 extends from the data line DL in the second direction and overlaps a part of the switching gate electrode GE1. The switching drain electrode DE1 is formed to be spaced apart from the switching source electrode SE1 by a predetermined distance so as to face the switching source electrode SE1, and overlaps a part of the switching gate electrode GE1. The switching drain electrode DE1 extends in the second direction and is electrically connected to the driving gate electrode GE2 of the driving thin film transistor TFT2 through the first contact hole 122.

The driving thin film transistor TFT2 is formed in the unit pixel and includes a driving gate electrode GE2, a driving source electrode SE2, a driving drain electrode DE2, and a driving active layer AT2.

The driving gate electrode GE2 is electrically connected to the switching drain electrode DE1 through the first contact hole 122 and extends in the first direction. The driving source electrode SE2 extends from the power supply line VL in the opposite direction to the second direction and overlaps a part of the driving gate electrode GE2. The driving drain electrode DE2 is formed to be spaced apart from the driving source electrode SE2 by a predetermined distance so as to face the driving source electrode SE2, and overlaps a part of the driving gate electrode GE2. The driving drain electrode DE2 is formed to extend in the opposite direction to the second direction, and is electrically connected to the anode electrode PE of the EL device ELD through the second contact hole 132.

The storage capacitor SC is formed in the unit pixel to maintain a driving voltage applied to the driving gate electrode GE2. The storage capacitor SC includes a first electrode and a second electrode. In this case, the first electrode is a driving gate electrode GE2 extending in a second direction, and the second electrode is a power line VL.

The switching thin film transistor TFT1 and the driving thin film transistor TFT2 according to the present exemplary embodiment are P-channel metal oxide semiconductors (PMOSs). That is, the switching thin film transistor TFT1 and the driving thin film transistor TFT2 use an electric hole as a major carrier. Therefore, when a negative voltage is applied to the switching gate electrode GE1 and the driving gate electrode GE2, a channel layer through which holes can move is formed in the switching active layer AT1 and the driving active layer AT2.

The operation method of the switching thin film transistor TFT1 and the driving thin film transistor TFT2 will be briefly described. When a negative voltage is applied to the switching gate electrode GE1, the switching source electrode SE1 is connected through the data line DL. The driving voltage applied to is applied to the switching drain electrode DE1 via the channel layer formed in the switching active layer AT1. The driving voltage is applied to the driving gate electrode GE2 electrically connected to the switching drain electrode DE1.

In this case, when the driving voltage is a negative voltage, the driving voltage is maintained in the storage capacitor SC to form a channel layer in the driving active layer AT2. The channel layer electrically connects the driving source electrode SE2 and the driving drain electrode DE2 to each other, thereby applying the driving current of the power line VL to the driving drain electrode DE2. That is, holes in the power supply line VL are applied to the driving drain electrode DE2 through the channel layer formed in the driving active layer AT2.

3 is a cross-sectional view taken along the line II ′ of FIG. 1.

2 and 3, the electroluminescent display panel 100 according to the present embodiment has a cross-sectional view of the base substrate 110, the gate wiring GL, the gate insulating layer 120, and the data wiring DL. ), A power line VL, a switching thin film transistor TFT1, a driving thin film transistor TFT2, a passivation layer 130, a bank layer 140, and an electroluminescent device ELD.

In this case, the switching thin film transistor TFT1 includes a switching gate electrode GE1, a switching source electrode SE1, a switching drain electrode DE1, and a switching active layer AT1, and the driving thin film transistor TFT2 includes a driving gate electrode. GE2, driving source electrode SE2, driving drain electrode DE2, and driving active layer AT2.

The base substrate 110 has a plate shape and is made of a transparent material. The base substrate 110 is made of glass, quartz, and transparent synthetic resin. The transparent synthetic resin is, for example, triacetylcellulose (TAC), polycarbonate (PC), polyethersulfone (PES), polyethylene terephthalate (PET), polyethylene naphthalate (Polyethylenenaphthalate; PEN) , Polyvinyl alcohol (PVA), polymethylmethacrylate (PMMA), cyclo-Olefin Polymer (COP) or a combination thereof.

The gate line GL is formed on the base substrate 110 in the second direction, and the switching gate electrode GE1 extends in the first direction from the gate line GL. The driving gate electrode GE2 extends to a predetermined length in the first direction.

The gate insulating layer 120 is formed on the base substrate 110 to cover the gate line GL, the switching gate electrode GE1, and the driving gate electrode GE2. The gate insulating layer 120 is made of, for example, a transparent insulating material such as silicon oxide or silicon nitride. The first contact hole 122 is formed in the gate insulating layer 120 to electrically connect the driving gate electrode GE2 and the switching drain electrode DE1.

The data line DL extends in the first direction and is formed on the gate insulating layer 120, and the switching source electrode SE1 extends in the second direction from the data line DL.

The power line VL is formed on the gate insulating layer 120 in parallel with the data line DL, and the driving source electrode SE2 extends from the power line VL in the second direction in the opposite direction.

The switching active layer AT1 is formed on the gate insulating layer 120 to cross the switching gate electrode GE1, and the driving active layer AT2 is formed to cross the driving gate electrode GE2. ) Is formed on. In this case, the switching active layer AT1 includes the first semiconductor layer AT1-a and the first impurity layer AT1-b, and the driving active layer AT2 includes the second semiconductor layer AT2-a and the first semiconductor layer AT1-a. 2 impurity layer (AT2-b).

The first semiconductor layer AT1-a is formed on the gate insulating layer 120 to cross the switching gate electrode GE1, and is, for example, amorphous silicon (a-Si).

The first impurity layer AT1-b is formed on the first semiconductor layer AT1-a, and the intermediate portion is removed to be separated into two parts. The first impurity layer AT1-b is highly ion doping amorphous silicon (p + a-Si), and is formed by injecting a Group 3 element into the impurity. That is, the first impurity layer AT1-b is a silicon compound containing a high concentration of pores therein. In this case, the Group 3 elements include boron (B), gallium (Ga) and indium (In).

For example, the process of forming the first impurity layer AT1-b will be briefly described. When a gas of a Group 3 element flows into the reaction chamber, it is ionized by plasma to generate ions of the Group 3 element. Ions are deposited on the first semiconductor layer AT1-a to form the first impurity layer AT1-b.

In addition, the second semiconductor layer AT2-a is formed on the gate insulating layer 120 to cross the driving gate electrode GE2. For example, the second semiconductor layer AT2-a is amorphous silicon (a-Si).

The second impurity layer AT2-b is formed on the second semiconductor layer AT2-a, and the intermediate part is removed to be separated into two parts. The second impurity layer AT2-b is a highly ion doping amorphus silicon (p + a-Si) in which a group 3 element is implanted as an impurity.

The switching source electrode SE1 extends from the data line DL and is formed on an upper surface of a portion of the first impurity layer AT1-b. The switching drain electrode DE1 is formed on an upper surface of another portion of the first impurity layer AT1-b spaced apart from the switching source electrode SE1 by a predetermined distance. The switching drain electrode DE1 is elongated and formed on the gate insulating layer 120. The switching drain electrode DE1 is electrically connected to the driving gate electrode GE2 through the first contact hole 122.

In addition, the driving source electrode SE2 extends from the power supply line VL and is formed on an upper surface of a part of the second impurity layer AT2-b. The driving drain electrode DE2 is formed on an upper surface of a portion of the second impurity layer AT2-b spaced apart from the driving source electrode SE2 by a predetermined distance. The driving drain electrode DE2 is elongated and formed on the gate insulating layer 120. The driving drain electrode DE2 is electrically connected to the anode electrode PE through the second contact hole 132 of the passivation layer 130.

The switching source electrode SE1, the switching drain electrode DE1, the driving source electrode SE2, and the driving drain electrode DE2 are, for example, molybdenum, copper, silver, aluminum, chromium, titanium, and titanium, which are conductive materials. And the like, and preferably made of a double layer of aluminum (Al) and molybdenum (Mo).

The passivation layer 130 is formed on the gate insulating layer 120 to cover the switching thin film transistor TFT1 and the driving thin film transistor TFT2, so that the switching thin film transistor TFT1 and the driving thin film transistor TFT2 are externally opened. Protect from moisture. A second contact hole 532 is formed in the passivation layer 130 to electrically connect the driving drain electrode DE2 and the anode electrode PE. The passivation layer 130 is made of, for example, transparent silicon oxide (SiO ₂ ).

The anode electrode PE is formed on the gate insulating layer 120 in the unit pixel, and is electrically connected to the driving drain electrode DE2 through the second contact hole 132.

The bank layer 140 is, for example, made of a transparent organic film and formed on the passivation layer 130. The light emitting hole 142 is formed in the bank layer 140 on the anode electrode PE. The electroluminescent layer EL is formed in the light emitting hole 142 formed in the bank layer 140.

The cathode electrode NE is formed on the entire surface of the substrate to contact the top surface of the electroluminescent layer EL and the top surface of the bank layer 540.

According to the present exemplary embodiment, the switching thin film transistor TFT1 and the driving thin film transistor TFT2 are formed of PMOS using a major field as a main carrier, thereby preventing deterioration occurring when electrons are used as a main carrier.

In general, the mobility of electrons is greater than that of the major. That is, when the same voltage is caught between the thin film transistors TFT1 and TFT2, the electrons move at a higher speed than the hole. As a result, when the same voltage is applied between the thin film transistors TFT1 and TFT2 for the same time, electrons can be moved in an excessive amount, and the movement of such excessive electrons acts as current damage to the thin film. The transistors TFT1 and TFT2 are degraded.

In order to prevent such deterioration, the switching thin film transistor TFT1 and the driving thin film transistor TFT2 according to the present embodiment are composed of PMOS whose major is the main carrier, not NMOS where the electron is the main carrier. That is, since the electron holes have less mobility than the electrons, when the thin film transistors TFT1 and TFT2 are formed of PMOS, deterioration of the thin film transistors TFT1 and TFT2 due to current damage can be further suppressed. have.

According to the present invention, the thin film transistor employed in the electroluminescent display panel is constituted of PMOS whose major carrier is a major carrier, whereby current damage caused by excessive flow of driving current can be further suppressed. Therefore, deterioration of the thin film transistor by the current daisy can be suppressed, and the fall of the electrical characteristics of the thin film transistor can be prevented more.

In the detailed description of the present invention described above with reference to a preferred embodiment of the present invention, those skilled in the art or those skilled in the art having ordinary knowledge in the scope of the invention described in the claims to be described later It will be understood that various modifications and variations can be made in the present invention without departing from the scope of the present invention.

Claims (9)

An electroluminescent display panel in which data lines, power lines, and gate lines are formed to define unit pixels on a base substrate. A switching thin film transistor formed in the unit pixel; A driving thin film transistor (PMOS) type driving thin film transistor formed in the unit pixel and electrically connected to the switching thin film transistor; And And an electroluminescent element electrically connected to the driving thin film transistor to generate light. The thin film transistor of claim 1, wherein the driving thin film transistor is A driving gate electrode formed on the base substrate; A driving active layer formed on the driving gate electrode to cover the driving gate electrode, and implanted with impurities of a group 3 element; And And a driving source electrode and a driving drain electrode formed on the driving active layer at predetermined intervals. The electroluminescent display panel of claim 2, wherein the driving active layer comprises a driving semiconductor layer and a driving impurity layer, and impurities of the Group 3 element are injected into the driving impurity layer. The method of claim 3, wherein the driving semiconductor layer is amorphous silicon (a-Si), And wherein the driving impurity layer is amorphous silicon (p + a-Si) doped with a high concentration of impurities of the Group 3 element. The electroluminescent display panel of claim 2, wherein the driving source electrode extends from the power line into the unit pixel. The method of claim 2, wherein the switching thin film transistor A switching gate electrode formed on the base substrate; A switching active layer formed on the switching gate electrode to cover the switching gate electrode, and implanted with impurities of a group 3 element; And And a switching source electrode and a switching drain electrode formed on the switching active layer at predetermined intervals. The electroluminescent display panel of claim 6, wherein the switching drain electrode is electrically connected to the driving gate electrode. The method of claim 6, wherein the switching gate electrode extends from the gate wiring into the unit pixel, And the switching source electrode extends from the data line into the unit pixel. The electroluminescent display panel of claim 6, wherein the switching active layer comprises a switching semiconductor layer and a switching impurity layer, and impurities of the Group 3 element are injected into the switching impurity layer.

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