KR20070034895A - LCD Display - Google Patents

Abstract

A liquid crystal display device capable of reducing power consumption when driving a lamp is provided. The liquid crystal display device includes a timing controller for detecting a maximum luminance value from image data in units of frames and converting the image data according to the maximum luminance value, a memory unit for storing a lamp control signal value corresponding to the maximum luminance value, The brightness of the lamp is received by receiving the converted image data from a timing controller and receiving the lamp control signal value through the data driver and the timing controller to apply a data voltage corresponding to the converted image data to a data line of a liquid crystal panel. It includes an inverter to control.

LCD, luminance, power consumption, inverter

Description

Liquid crystal display

1 is an exploded perspective view schematically illustrating a general liquid crystal display device.

2 is a block diagram illustrating a configuration of a liquid crystal display according to an exemplary embodiment of the present invention.

3 is a table illustrating converted gamma voltages according to luminance order according to an embodiment of the present invention.

4 is a table illustrating lamp control signal values according to luminance values according to an embodiment of the present invention.

5 is a block diagram illustrating a configuration of an inverter according to an embodiment of the present invention.

6 is a waveform diagram illustrating a signal used in an inverter according to an embodiment of the present invention.

<Description of the symbols for the main parts of the drawings>

10: liquid crystal panel 20: timing control unit

30: gate driver 40: data driver

50: inverter 60: lamp

70: memory

The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device that can reduce power consumption when driving a lamp.

A display device used for a monitor or a TV of a computer is a liquid crystal display that requires a light source without emitting light by itself such as a cathode ray tube, a field emission device, etc. display).

The panel of the LCD includes a substrate in which a pixel pattern is formed in a matrix form and a substrate opposite to the substrate. A liquid crystal material having an anisotropic dielectric constant is injected between the two substrates to form an electric field. By controlling the intensity of the electric field, the amount of light passing through the substrate is controlled to display a desired image.

Since the liquid crystal display device is not a self-luminous display device, it is configured to operate as a light source by providing a backlight on the rear surface of the liquid crystal panel. In general, portable or desktop computers are driven by direct current voltage, while backlights are driven by alternating voltage. Therefore, an inverter for converting a direct current voltage into an alternating voltage is essentially required. In addition to the function of converting a DC voltage into an AC voltage, the inverter has a dimming circuit therein to adjust the brightness of the lamp. The dimming circuit included in the inverter adjusts the brightness of the backlight by limiting the current of the lamp when the user inputs a brightness control command through a computer operation.

However, although the data characteristics of each screen or frame unit displayed on the panel of the liquid crystal display device are different, the adjusted luminance is maintained as it is. Therefore, the power consumption of the inverter is constant in the black screen having the darkest brightness or the white screen having the brightest brightness, consuming a lot of power.

An object of the present invention is to provide a liquid crystal display device which can reduce power consumption when driving a lamp.

The technical problems of the present invention are not limited to the above-mentioned technical problems, and other technical problems not mentioned will be clearly understood by those skilled in the art from the following description.

According to an aspect of the present invention, there is provided a liquid crystal display device including: a timing controller configured to detect a maximum luminance value from frame-by-frame image data and to convert the image data according to the maximum luminance value; and a lamp according to the maximum luminance value. A memory unit for storing a control signal value, a data driver for receiving the converted image data from the timing controller, and applying a data voltage corresponding to the converted image data to a data line of the liquid crystal panel; It includes an inverter for receiving a control signal value to control the brightness of the lamp.

Specific details of other embodiments are included in the detailed description and drawings.

Advantages and features of the present invention and methods for achieving them will be apparent with reference to the embodiments described below in detail with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but may be embodied in various forms, and the present embodiments are merely provided to make the disclosure of the present invention complete and the general knowledge in the art to which the present invention belongs. It is provided to fully inform the person having the scope of the invention, the invention is defined only by the scope of the claims. Like reference numerals refer to like elements throughout.

Before describing the present invention, a liquid crystal display device to which an inverter for a liquid crystal display device of the present invention is applied will be described. FIG. 1 is an exploded perspective view schematically illustrating a general liquid crystal display device, and illustrates a liquid crystal display device employing an edge method.

As shown in FIG. 1, the liquid crystal display device 100 to which the present invention is applied has a front case for accommodating the liquid crystal display module 200 and the liquid crystal display module 200 for displaying a screen by applying an image signal. 310 and back case 320. The liquid crystal display module 200 includes a display unit 210 including a liquid crystal display panel for displaying a screen.

The display unit 210 includes a liquid crystal display panel 212, a data side printed circuit board 214, a gate side printed circuit board 219, a data side tape carrier package (hereinafter referred to as TCP) 216 and a gate side TCP 218. ).

The liquid crystal display panel 212 displays an image including the thin film transistor substrate 212a, the color filter substrate 212b, and the liquid crystal (not shown).

More specifically, the thin film transistor substrate 212a is a transparent glass substrate on which a matrix thin film transistor is formed. Data lines are connected to source terminals of the thin film transistors, and gate lines are connected to gate terminals thereof. In addition, a pixel electrode made of indium tin oxide (ITO), which is a transparent conductive material, is formed in the drain terminal.

When electrical signals are input to the data lines and the gate lines, electrical signals are input to the source and gate terminals of the respective thin film transistors, and the thin film transistors are turned on or turned off according to the input of the electrical signals, thereby draining the drain terminals. As a result, an electrical signal necessary for pixel formation is output.

The color filter substrate 212b is provided to face the thin film transistor substrate 212a. The color filter substrate 212b is a substrate in which RGB pixels, which are color pixels in which a predetermined color is expressed while light passes, are formed by a thin film process. A common electrode made of ITO is formed on the front surface of the color filter substrate 212b.

When power is applied to the gate terminal and the source terminal of the transistor of the thin film transistor substrate 212a and the thin film transistor is turned on, an electric field is formed between the pixel electrode and the common electrode of the color filter substrate. By such an electric field, the arrangement angle of the liquid crystal injected between the thin film transistor substrate 212a and the color filter substrate 212b is changed, and the light transmittance is changed according to the changed arrangement angle to obtain a desired image.

The driving signal and the timing signal are applied to the gate line and the data line of the thin film transistor to control the alignment angle of the liquid crystals and the timing of the liquid crystals of the liquid crystal display panel 212. As shown in the figure, the data TCP 216, which is a type of flexible circuit board that determines the timing of applying the data driving signal, is attached to the source side of the liquid crystal display panel 212, and the timing of applying the driving signal of the gate is determined on the gate side. The gate side TCP 218, which is a kind of flexible circuit board, is attached.

The data-side printed circuit board 214 and the gate-side printed circuit board 219 for receiving an image signal from the outside of the liquid crystal display panel 212 and applying driving signals to the gate line and the data line, respectively, are the liquid crystal display panel 212. Are connected to data TCP 216 on the data line side and gate TCP 218 on the gate line side, respectively.

The data side printed circuit board 214 is provided with a source portion for providing a data driving signal to the liquid crystal display panel 212 by receiving an image signal generated from an external information processing device (not shown) such as a computer, and printing the gate side. The circuit board 219 is provided with a gate portion for providing a gate driving signal to the gate line of the liquid crystal display panel 212.

That is, the data side printed circuit board 214 and the gate side printed circuit board 219 may include a gate driving signal, a signal for driving a liquid crystal display, a data signal, and a plurality of timing signals for applying these signals at an appropriate time. The gate driving signal is applied to the gate line of the liquid crystal display panel 212 through the gate side TCP 218, and the data signal is applied to the data line of the liquid crystal display panel 212 through the data TCP 216. .

Below the display unit 210, a backlight unit 220 is provided to provide uniform light to the display unit 210. The backlight unit 220 includes first and second lamp units 223 and 225 provided at both ends of the liquid crystal display module 200 to generate light. The first and second lamp units 223 and 225 are composed of first and second lamps 223a and 223b and third and fourth lamps 225a and 225b, respectively, and the first and second lamp covers 222a. 222b).

The light guide plate 224 has a size corresponding to the liquid crystal panel 212 of the display unit 210 and is positioned below the liquid crystal panel 212 to display light generated by the first and second lamp units 223 and 225. The light path is changed while guiding toward the unit 210. Here, the light guide plate 224 is an edge type of uniform thickness, and the first and second lamp units 223 and 225 are provided at both ends of the light guide plate 224 to increase light efficiency. The number of lamps of the first and second lamp units 223 and 225 may be appropriately arranged in consideration of the overall balance of the liquid crystal display device 100.

A plurality of optical sheets 226 are provided on the light guide plate 224 to uniform the luminance of light emitted from the light guide plate 224 and directed toward the liquid crystal display panel 212. In addition, a light reflector 228 is provided under the light guide plate 224 to reflect light leaking from the light guide plate 224 to the light guide plate 224 to increase the light efficiency.

The display unit 210 and the backlight unit 220 are fixedly supported by the mold frame 230 which is a storage container. The mold frame 230 has a box shape of a rectangular parallelepiped and an upper surface thereof is opened.

The display unit 210 is fixed to the bottom surface of the mold frame 230 while bending the data side printed circuit board 214 and the gate side printed circuit board 219 of the display unit 210 to the outside of the mold frame 230. A chassis 240 is provided to prevent 210 from being dislodged. The chassis 240 is opened to expose the liquid crystal display panel 210, and the sidewall portion is bent in an inner vertical direction to cover the upper periphery of the liquid crystal display panel 210.

Hereinafter, with reference to the accompanying drawings will be described an embodiment of the present invention;

2 is a block diagram illustrating a configuration of a liquid crystal display according to an exemplary embodiment of the present invention. 3 is a table illustrating the converted gamma voltage according to the luminance order according to an embodiment of the present invention, and FIG. 4 is a table illustrating a lamp control signal value according to the luminance value according to an embodiment of the present invention. Here, for convenience of explanation, description will be made in ²³ gray scales.

As shown in FIG. 2, the liquid crystal display according to the exemplary embodiment of the present invention includes a liquid crystal panel 10, a timing controller 20, a gate driver 30, a data driver 40, an inverter 50, and a lamp. 60 and the memory unit 70 are included. Here, although not shown in the figure, it further includes a voltage generator.

The liquid crystal panel 10 includes a substrate on which a pixel pattern is formed, and a plurality of gate lines and a plurality of data lines perpendicular to the gate lines are formed on the substrate, and pixels are formed at the intersections of the gate lines and the data lines. Is formed. The pixels are arranged in a matrix structure. Each pixel includes a thin film transistor having a gate electrode and a source electrode connected to a gate line and a data line, and a pixel capacitor and a storage capacitor connected to a drain electrode of the thin film transistor. In such a pixel structure, when a gate voltage for sequentially selecting each gate line is applied by the gate driver 30, a thin film transistor of a pixel connected to the corresponding gate line is turned on, and then each data driver 40 is turned on. An image data voltage including pixel information is applied to the data line. This voltage is applied to the pixel capacitor and the storage capacitor through the thin film transistor of the pixel, and these capacitors are driven to perform a predetermined display operation.

The timing controller 20 receives RGB image data (RGB data), vertical and horizontal sync signals (Vsync / Hsync), and a clock signal (CLK) input from an external graphic source (not shown). Basically, the timing controller 20 converts the format of the input RGB image data (RGB data) according to the data format required by the data driver 40, and drives the gate driver (to drive the liquid crystal panel 10). 30 and generates and outputs a control signal to be used in the data driver 40. In addition, the timing controller 20 outputs a vertical synchronization signal Vsync to the inverter 50.

Here, the timing controller 20 may further include a memory in the timing controller 20. In the memory, RGB image data in units of frames input from a graphic source is stored. At this time, image data having the maximum luminance among RGB image data in units of one frame is detected, and the image data is aligned according to the luminance value. Then, the setting image data having a maximum brightness of the gamma voltages (V _g1) having a maximum luminance of, and order in the dark image data than the gamma voltages (V _g1) having the maximum brightness, as shown in Figure 3 Convert as For example, if the gamma voltage having the maximum luminance among the image data of one frame is V _g5 , V _{g5 →} V _g1 , V _{g6 →} V _g2 , V _{g7 →} V _g3 , V _{g8 →} V _g4 are converted to the luminance value. Make a table with the converted gamma voltages. In this case, it is preferable to use a random access memory (RAM) as the memory.

The gate driver 30 includes a plurality of gate driver ICs each responsible for a predetermined number of gate lines on the liquid crystal panel 10. The gate driver 30 includes a control signal and a voltage generator (not shown) provided by the timing controller 20. Each gate line on the liquid crystal panel 10 is sequentially scanned in units of one horizontal scanning period by using the provided gate voltage Vgate. For example, the gate driver 30 applies a gate-on voltage to the gate line to be scanned and a gate-off voltage to the remaining gate lines, and the application time of the gate-on voltage is one horizontal scanning period. This scanning process is performed sequentially for all gate lines.

The data driver 40 includes a plurality of data driver ICs each responsible for a predetermined number of data lines on the liquid crystal panel 10. The data driver 40 sequentially latches the RGB image data (RGB Data) supplied from the timing controller 20 to change the data sequence of the point sequential method to the line sequential method, and to match the gamma voltage ( V _g ), and the selected voltages are applied to each data line on the liquid crystal panel 10 in one horizontal scanning period as an image data voltage. One screen, i.e., a frame, is divided by a pulse of the vertical synchronization signal Vsync, and the above-described operation in the data driver 40 is continuously performed for one frame in one horizontal scanning period. Repeat for all these frames. In addition, as illustrated in FIG. 3, the data driver 40 receives the converted image data from the timing controller 20 and applies a data voltage corresponding to the converted image data to the data line of the liquid crystal panel 10.

The inverter 50 generates a lamp driving signal by using the dimming signal Dim and the vertical synchronization signal Vsync output from the timing controller 20, and the lamp driving signal is a lamp (rear) installed on the rear surface of the liquid crystal panel 10. Control the light emission of 60). At this time, the lamp 60 may use a fluorescent lamp such as a cold cathode flourescent lamp (cold cathode flourscent lamp), an external electrode flourescent lamp (external electrode flourscent lamp). In addition, a light emitting diode (LED) may be used as the lamp. Here, the dimming signal Dim may be provided by the timing controller 20 or may be provided by an external display-related peripheral board. The ramp drive signal has a turn on and turn off period. By adjusting the on / off period duty ratio of the lamp driving signal, the light amount of the lamp 60, that is, the luminance, may be controlled. The on / off duty ratio of the ramp drive signal is determined by the dimming signal Dim.

As shown in FIG. 3, the memory unit 70 stores a table having a gamma voltage converted according to a luminance value. 4, the lamp control signal value corresponding to the maximum luminance value is stored. In this case, it is preferable that the memory unit 70 use an electrically erasable programmable read only memory (EEPROM).

The voltage generator (not shown) generates and outputs a gamma voltage V _g and a gate voltage Vgate, which are voltages actually applied to the data line and the gate line of the liquid crystal panel 10, respectively. Here, the gamma voltage V _g has a plurality of voltage levels and is transmitted to the data driver 40. The gate voltage Vgate includes a gate on voltage and a gate off voltage, and is transmitted to the gate driver 30.

5 is a block diagram illustrating a configuration of an inverter according to an embodiment of the present invention.

As shown in FIG. 5, an inverter 50 according to an embodiment of the present invention includes an inverter controller 51, a power driver 52, and a booster 53.

The inverter controller 51 receives a vertical synchronization signal Vsync from the timing controller 20, receives a dimming signal Dim from an external peripheral circuit, and generates a lamp driving signal having a predetermined on / off duty ratio. do.

More specifically, the inverter controller 51 generates a pulse width modulated reference waveform in the form of a triangle wave or a sawtooth wave. In addition, the reference waveform is compared with the reference voltage by the dimming signal Dim, and a ramp driving signal having a turn-on period and a turn-off period is generated by pulse width modulation.

In addition, the inverter according to an embodiment of the present invention may selectively drive the lamp according to the luminance value of the image data. That is, the larger the luminance value of the image data in one frame unit, the brighter the lamp can be driven. The lower the luminance value of the image data, the darker the lamp can be driven. To this end, as shown in FIG. 4, a ramp control signal value corresponding to a gamma voltage converted according to a maximum luminance value stored in the memory unit 70 is input to the inverter controller 51 as illustrated in FIG. 4. .

For example, as shown in FIG. 3, a gamma voltage V _g1 , that is, V _g5 having a maximum luminance value among image data, is transmitted to the data driver 40, and as shown in FIG. 4, the timing controller 20 is moved. Equivalent to V _g5 The lamp control signal value "011" is transmitted to the inverter controller 51. Then, the inverter controller 51 applies 1.7V to the lamp so that the brightness of the lamp is four.

The power driver 52 operates according to a lamp driving signal, and generates a signal having an on / off level by switching on / off an output of the DC power supply Vdd during a turn-on period of the lamp driving signal.

The booster 53 generates a sine wave according to the on / off signal output from the power driver 52, and although not shown in the drawing, the voltage of the sine wave signal generated by a transformer included therein The signal is converted into a high voltage, and the sinusoidal signal converted into the high voltage is applied to the lamp. Here, the sinusoidal signal appears during the turn on period of the lamp drive signal, and the ground potential is maintained during the turn off period of the lamp drive signal.

6 is a waveform diagram illustrating a signal used in an inverter according to an embodiment of the present invention.

As shown in FIG. 6, a gamma voltage V _g1 , i.e., V _g5 , having a maximum luminance value among image data is transmitted to the data driver 40, and as shown in FIG. 4, through the timing controller 20. _The lamp control signal value "011" corresponding to _g5 is transmitted to the inverter controller 51. Then, the inverter controller 51 varies the dimming signal such that the brightness of the lamp becomes 4 as shown in FIG. 6. In this case, the dimming signal is changed into a waveform of a triangular wave or sawtooth wave shape, and thus the lamp driving signal is also changed. In this case, the driving current of the sine wave is generated during the turn-on period A of the lamp driving signal, and the ground potential is maintained during the turn-off period B of the lamp driving signal. At this time, the sinusoidal signal applied to the lamp is represented by a lamp application current, as shown in Figure 6, the oscillation timing is synchronized to the pulse signal, that is, the input voltage of the booster. In addition, the reference waveform is reset every time the pulse of the vertical synchronization signal Vsync is generated, and the pulse width modulation reference waveform is started when the pulse of the vertical synchronization signal is generated to start the turn-on period of the ramp driving signal, which is a vertical synchronization signal. It means that the lamp starts to light when the pulse occurs.

Although embodiments of the present invention have been described above with reference to the accompanying drawings, those skilled in the art to which the present invention pertains may implement the present invention in other specific forms without changing the technical spirit or essential features thereof. I can understand that. Therefore, the embodiments described above are to be understood in all respects as illustrative and not restrictive.

As described above, the liquid crystal display according to the exemplary embodiment may drive the lamp brighter as the luminance value of the image data is larger by one frame, and may drive the lamp darker as the luminance value of the image data is lower. have. Therefore, since the lamp can be selectively driven according to the luminance value of the image data, power consumption can be reduced when driving the lamp.

Claims (7)

A timing controller which detects a maximum luminance value from image data in frame units and converts the image data according to the maximum luminance value; A memory unit configured to store a lamp control signal value according to the maximum luminance value; A data driver which receives the converted image data from the timing controller and applies a data voltage corresponding to the converted image data to a data line of a liquid crystal panel; And And an inverter configured to control the brightness of a lamp by receiving the lamp control signal value through the timing controller. The method of claim 1, And the memory is a RAM. The method of claim 1, And the memory unit is an ypyrom. The method of claim 1, And the lamp control signal value is binary. The method of claim 1, The inverter receives the lamp control signal value through the timing controller to vary a dimming signal to generate a lamp driving signal having a turn-on period and a turn-off period, and to turn on the lamp driving signal according to a vertical synchronization signal. Inverter control unit for controlling the; A power driver to control the output of the DC power on / off in response to the signal from the inverter controller; And And a voltage booster configured to convert the voltage of the lamp driving signal into a high voltage by a transformer and apply the converted high voltage lamp driving signal to the lamp. The method according to claim 1 or 5, The dimming signal is a triangular wave or sawtooth wave type liquid crystal display device. The method of claim 5, The vertical synchronization signal is provided by the timing controller, and the dimming signal is provided by a controller of an LCD or an external peripheral board.

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