KR20070029483A - Plasma display panel - Google Patents

Abstract

A plasma display panel is provided to simplify a manufacturing process and reduce a manufacturing cost by forming a common alignment mark by one manufacturing process. A plasma display panel includes an effective display part(301) and a non-effective display part(302) which are formed by attaching a front glass substrate and a rear glass substrate(220) to each other. A plurality of dummy cells(402) are formed on the non-display part. A center part of the dummy cells corresponds to an alignment mark(401) for a predetermined pattern which is formed on the front glass substrate and the rear glass substrate. The alignment mark is formed with a shape of circle, a shape of rectangle, or a shape of cross.

Description

Plasma Display Panel

1 is a view showing a manufacturing process of a front substrate of a conventional plasma display panel.

2 is a perspective view schematically showing the structure of a plasma display panel of the present invention;

3 is a diagram illustrating an effective surface portion and an invalid surface portion of the plasma display panel according to the present invention;

4A is a view showing the position and type of the integrated alignment mark in the plasma display panel according to the present invention;

Figure 4b is an integrated alignment in the plasma display panel in the present invention

5 is a view showing a process of forming a common alignment mark mark in a plasma display panel according to the present invention;

<Description of Symbols for Main Parts of Drawings>

101, 210, 210: front substrate 220: rear substrate

102, 201a, 202a: transparent electrode 105, 201b, 202b: bus electrode

104, 501: black layer 103: alignment mark

11 scan electrode 12 sustain electrode

203a and 203b Dielectric Layer 240 Address Electrode

204: protective layer 301: effective surface portion

302: non-effective surface portion 403, 401, 401a, 401b, 401c: common alignment mark

The present invention relates to a plasma display panel including a common alignment mark that can be commonly used in two or more process steps in the manufacturing process of the plasma display panel.

In general, a plasma display panel includes a discharge cell formed by a partition wall formed between a front substrate and a rear substrate, and each cell includes neon (Ne), helium (He), or a mixture of neon and helium (Ne + He) and An inert gas containing the same main discharge gas and a small amount of xenon is injected.

The inert gas generates vacuum ultraviolet rays and emits phosphors formed between the partition walls to realize an image. Such a plasma display panel has a spotlight as a next generation display device because of its thin and light configuration.

1 is a view illustrating a manufacturing process of a front substrate of a conventional plasma display panel.

As shown in FIG. 1A, an alignment mark 103 is formed at both edges of a front glass substrate 101 of a plasma display panel, and an alignment mark 103 is formed on the alignment mark. Accordingly, the front glass substrate 101 is fixed and a transparent electrode 102 is formed on the front substrate.

As shown in Fig. 1A, three alignment marks 103 are formed at both edges of the front substrate 101 of the plasma display panel.

The front substrate 101 is fixed to the first alignment mark 103 and a transparent electrode 102 is formed.

As shown in FIG. 1B, alignment marks 103 are formed at both edges of the front substrate 101 of the plasma display panel, and the front substrate 101 is fixed to the alignment marks. .

A transparent electrode 102 is formed on the front substrate 101, and a black matrix 104 is formed thereon.

As shown in FIG. 1B, when the black layer 104 is formed, it can be seen that the transparent electrode 102 is moved to the right by D1.

As shown in Fig. 1 (b) ', the cause can be known. The front substrate 101 of the plasma display panel is fixed to the second alignment mark 20 among three alignment marks 103 formed at both edges thereof, and is directly fixed to the transparent electrode 102. Layer 104 is formed. Looking at the third alignment mark, it can be seen that the black layer 104 is moved to the right by D1 in the transparent electrode 102 due to the error E1 of the measuring instrument.

As shown in FIG. 1C, alignment marks 103 are formed at both edges of the front substrate 101 of the plasma display panel, and the front substrate 101 is fixed in accordance with the alignment marks.

The transparent electrode 102 is formed on the front substrate 101, the black layer 104 is formed on the top surface, and the bus electrode 105 is formed on the top surface.

As shown in (c) of FIG. 1, it can be seen that the black layer 104 is moved to the right by D2.

This can be seen from the reason shown in Fig. 1 (c) '. Three alignment marks 103 are formed at both edges of the front substrate 101 of the plasma display panel, and the alignment marks 103 are fixed to the third alignment mark 30, and the transparent electrodes 102 are disposed on the top surface of the plasma display panel. Layer 104 is formed and a bus layer 105 is formed on top thereof. Looking at the third alignment mark, it can be seen that the bus electrode 105 is moved to the right by D2 from the black electrode 104 due to the error E2 of the measuring instrument.

Thus, in the manufacturing process of the front substrate of the conventional plasma display panel, the number of alignment marks 103 is added to each of two or more process steps, and the transparent substrate is transparent to the front substrate 101 due to the error E1 and E2 of the measuring instrument. Problems arise in forming the electrode 102, the black layer 104 and the bus electrode 105.

In order to solve this problem, an object of the present invention is to provide a plasma display panel including an alignment mark that can be commonly used in the manufacturing process steps of two or more plasma display panels.

In order to achieve the above object, the integrated alignment mark according to the present invention is formed at the edges (edges) of the ineffective surface portion in the plasma display panel forming the effective surface portion of the front substrate and the rear substrate and the ineffective surface portion of the front substrate and the rear substrate. An address alignment mark is formed in the center of the dummy cell 302, and a black layer alignment mark in a direction crossing the dummy cell and the dummy cell in the ineffective surface part. Characterized in that is formed.

In addition, the shape of the alignment mark is characterized in that formed in any one of a circle, a square or a cross.

The predetermined pattern may be any one of a bus, a transparent electrode ITO, and a black matrix pattern.

Hereinafter, a plasma display panel of the present invention will be described in detail with reference to the accompanying drawings.

2 is a perspective view schematically showing the structure of the plasma display panel of the present invention. As shown, the plasma display panel is coupled in parallel with the front substrate 210, which is the display surface on which the image is displayed, and the rear substrate 220 forming the rear surface, having a predetermined distance therebetween.

The front substrate 210 is made of a metal material and sustain electrodes 11 and 12 for maintaining light emission of cells by mutual discharge in one pixel below, that is, transparent electrodes 201a and 202a formed of a transparent ITO material. The sustain electrodes 11 and 12 provided with the bus electrodes 201b and 202b are formed in pairs. The sustain electrode pair includes a scan electrode 11 and a sustain electrode 12. The scan electrode 11 is mainly supplied with a scan signal for scanning a panel and a sustain signal for sustaining discharge, and the sustain electrode 12 ) Is mainly supplied with a holding signal. The sustain electrodes 11 and 12 are covered by a dielectric layer 203a that limits discharge current and insulates electrode pairs, and deposits magnesium oxide (MgO) on the top surface of the dielectric layer 203a to facilitate discharge conditions. One protective layer 204 is formed.

The rear substrate 220 has an address at a portion where a plurality of discharge spaces, that is, barrier ribs 230 of stripe type (or well type) for forming a cell, are arranged in parallel and intersect with the sustain electrodes 11 and 12. A plurality of address electrodes 240, which generate a vacuum ultraviolet ray by performing discharge, are disposed in parallel with the partition wall 230. In addition, a dielectric layer 203b is formed on the upper surface of the address electrode 240, and the upper surface of the dielectric layer 240 is red (R), green (G), and blue (R) that emits visible light for image display during address discharge. Blue: B) The fluorescent layer 250 is applied.

Here, FIG. 2 shows only one example of the structure of the plasma display panel which is one of the driving elements of the plasma display device of the present invention, and the present invention is not limited to the structure of FIG. 2. For example, in FIG. 2, only the scan electrode 11 and the sustain electrode 12 are formed on the front panel 210 and the address electrode 240 is formed on the rear panel 220. Alternatively, the scan electrode 11, the sustain electrode 12, and the address electrode 240 may be formed on the front panel 210.

Alternatively, the scan electrode 11 and the sustain electrode 12 described above only include transparent electrodes 201a and 202a and bus electrodes 201b and 202b, respectively, but the scan electrode 11 and the sustain are different from each other. At least one of the electrodes 12 may be composed of only the bus electrodes 201b and 202b.

3 is a diagram illustrating the effective surface portion 301 and the ineffective surface portion 302 of the plasma display panel according to the present invention.

As shown in FIG. 3, the effective surface portion 301 includes a pair of sustain electrodes 11 and 12 provided on the front substrate 210 as transparent electrodes 201a and 202a and bus electrodes 201b and 202b. do. It can be seen that the sustain electrode pair is a surface portion that can be displayed on the screen by reacting with the scan electrode 11, the sustain electrode 12, and the address electrode 240 for selecting a cell to emit light on the rear substrate 220.

As shown in FIG. 3, it can be seen that the ineffective surface portion 302 is a surface portion including a dummy cell except for the effective surface portion 301.

4 is a view showing the position and type of the integrated alignment mark in the plasma display panel according to the present invention.

As shown in FIG. 4A, the non-effective surface portion 302 of the plasma display panel rear substrate 220 refers to a portion including the dummy cell 402 in the remaining portions except for the effective surface portion 301. The center portion of the dummy cell 402 is a position of an address alignment mark 401 to be formed on the plasma display panel front substrate 210 illustrated in FIG. 4B. Able to know.

As shown in FIG. 4A, the dummy cell 402 and the dummy cell 402 at both edges of the ineffective surface portion 302 of the rear substrate 220 are shown in FIG. 4B. It can be seen that the position of the black layer alignment mark (Black Align Mark) 403 to be formed to cross the sustain electrode (11, 12) pair direction to be formed on the front substrate 210.

As shown in FIG. 4A, in the present invention, the dummy cells 402 of the plasma display panel are formed of alignment marks of various shapes such as a rectangle 401a, a circle 401b, or a cross 401c.

The black layer alignment mark 403 is as shown in Fig. 4B. It is formed on the lower surface of the bus electrodes 201b and 202b among the sustain electrode pairs 11 and 12 and is not visible.

In addition, the material of the address alignment mark 401 and the black layer alignment mark 403 should be a non-conductive material.

The address alignment mark 401 and the black layer alignment mark 403 made of the non-conductive material can prevent the cell from being erroneously discharged and can perform safer cell discharge.

Unlike when using a plurality of alignment marks in the conventional plasma display panel bonding, as shown in Fig. 4 (a) to the end of both edges of the ineffective surface portion 302 of the rear substrate 220 The address alignment mark 401 and the black layer alignment mark 403 to be positioned are designated as common alignment marks, and as shown in FIG. 4B, the sustain electrodes 11, which are to be formed on the front substrate 210, are formed. 12) The address alignment mark 401 is formed as a common alignment mark in the vertical direction of two lower surfaces of the black layer alignment mark 403 and the black layer alignment mark 403 across the pair direction.

5 is a diagram illustrating a process of forming a common alignment mark in a plasma display panel according to the present invention.

A cross-sectional view of the front substrate 210 of the plasma display panel shown in FIG. 5 is vertical (90 °).

As shown in FIG. 5, a process sequence of forming an address alignment mark 401 and a black layer alignment mark 403 on a front substrate 210 in a plasma display panel is shown.

As shown in FIG. 5A, an address alignment mark 401 is formed on an upper surface of the front substrate 210 on the plasma display panel. As shown in FIG. 4A, the address alignment mark 401 is positioned at the center of the dummy cell at both edges of the rear substrate 220.

As shown in FIG. 5B, the front substrate 210 of the plasma display panel is fixed by an address alignment mark 401 formed on an upper surface, and has an upper surface except the front substrate address alignment mark 401. The transparent electrodes 201a and 202a shown in FIG. 2 are formed on the substrate.

As shown in FIG. 5C, the front substrate 210 of the plasma display panel is fixed by an address alignment mark 401 formed on an upper surface, and has an upper surface except for the front substrate address alignment mark 401. The black layer 501 is formed on the upper surface on which the transparent electrodes 201a and 202a shown in FIG. 2 are formed.

As shown in FIG. 5D, the front substrate 210 of the plasma display panel is fixed by an address alignment mark 401 formed on an upper surface, and the upper surface except for the front substrate address alignment mark 401 is fixed. The black layer 501 is formed on the upper surface on which the transparent electrodes 201a and 202a shown in FIG. 2 are formed, and the bus electrodes 201b and 202b shown in FIG. 2 are formed on the upper surface thereof.

As shown in FIG. 5E, the front substrate 210 of the plasma display panel is fixed by an address alignment mark 401 formed on an upper surface, and the upper surface except for the front substrate address alignment mark 401 is fixed. The black layer 501 is formed on the upper surface of the transparent electrodes 201a and 202a shown in FIG. 2, and the bus electrodes 201b and 202b shown in FIG. 2 are formed on the upper surface thereof. The black alignment mark 403 is formed in FIG. 4A.

The front substrate 201 and the rear substrate 202 of the plasma display panel are integrally formed in the vicinity of the alignment mark due to the strain measurement.

Conventionally, an alignment mark of a plasma display panel is formed simultaneously with an electrode pattern at a different position for each manufacturing process. Plasma display panel according to the present invention is characterized in that the alignment mark is integrally formed according to the deformation of the front substrate 201 and the rear substrate 202 to form one, so that the manufacturing process is simplified and the cost accordingly is reduced.

As described above, in the plasma display panel according to the present invention, a common alignment mark is formed in one process of manufacturing a TCP / BUS / transparent electrode (ITO) / black layer (BM). ), The manufacturing process is simple, and the cost is reduced.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (3)

A plasma display panel comprising a front glass substrate and a rear glass substrate bonded to each other to form an effective surface portion on which a screen is displayed and an invalid surface portion on which a screen is not displayed. A dummy cell is formed on the ineffective surface portion, And an alignment mark for a predetermined pattern formed on the front substrate or the rear substrate to correspond to the central portion of the dummy cell. The method of claim 1, The shape of the alignment mark is a plasma display panel, characterized in that formed in any one of a circle, square or cross. The method of claim 1, The predetermined pattern may be any one of a bus electrode pattern, a transparent electrode (ITO) electrode pattern, and a black matrix pattern.

Images