KR20070027406A - Driving apparatus for plasma display panel - Google Patents

Abstract

A driving apparatus of a plasma display panel is provided to reduce the number of switching elements by changing the position of a scan drive IC(Integrated Circuit). A driving apparatus of a plasma display panel includes a plasma display panel, a scan drive IC(440), a sustain voltage supply controller(460), and a scan reference voltage supply controller(450). The plasma display panel includes a scan electrode. The scan drive IC includes a top switch and a bottom switch. The scan electrode is connected between the top switch and the bottom switch. The sustain voltage supply controller supplies a sustain voltage through the top switch of the scan drive IC to the scan electrode. The scan reference voltage supply controller supplies a scan reference voltage through the top switch of the scan drive IC to the scan electrode.

Description

Driving device for plasma display panel {Driving Apparatus for Plasma Display Panel}

1 is a diagram illustrating a scan driving device for supplying driving waveforms by a conventional method of driving a plasma display panel.

2 is a view for explaining a plasma display device of the present invention.

3 is a view for explaining an example of the structure of a plasma display panel to which the present invention is applied.

4 is a view for explaining a scan driver in more detail in the present invention.

5 is a view for explaining in more detail the operation of the scan drive integrated circuit in the present invention.

<Explanation of symbols for the main parts of the drawings>

410: energy recovery circuit unit 420: set down supply unit

430: a negative scan voltage supply unit 440: a scan drive integrated circuit

The present invention relates to a plasma display panel, and more particularly, to a plasma display device having an improved structure of a scan drive integrated circuit.

In general, a plasma display panel includes a partition formed between a front panel and a rear panel to form a discharge space. In the discharge space, neon, helium (He), or a mixture of neon and helium (Ne + He) and a small amount The discharge gas containing xenon (Xe) is filled. These discharge spaces constitute a plurality of pixels (Pixel) for displaying an image. For example, red (R) cells, green (G) cells, and blue (B) discharge spaces form one pixel.

When the plasma display panel is discharged by a high frequency voltage, the discharge gas generates vacuum ultraviolet rays and emits phosphors formed between the partition walls to realize an image. Such a plasma display panel has a spotlight as a next generation display device because of its thin and light configuration.

1 is a diagram illustrating a scan driving apparatus for supplying driving waveforms by a conventional method of driving a plasma display panel.

Referring to FIG. 1, a driving apparatus of a conventional plasma display panel includes an energy recovery circuit unit 100, a scan drive integrated circuit 150, a setup supply unit 110, a set down supply unit 130, a negative scan voltage supply unit 120, A seventh switch Q7 connected between the scan reference voltage supply unit 140, the setup supply unit 110, and the scan drive integrated circuit 150, and between the setup supply unit 110 and the energy recovery circuit 100. 6 switch Q6 is provided.

The scan drive integrated circuit 150 is connected in a push / pull form and includes an energy recovery circuit 100, a setup supply unit 110, a set-down supply unit 130, a negative scan voltage supply unit 120, and a scan reference voltage. The twelfth and thirteenth switches Q12 and Q13 receive a voltage signal from the supply unit 140. The output line between the twelfth and thirteenth switches Q12 and Q13 is connected to any one of the scan electrode lines Y1 to Ym of the panel Cp.

The energy recovery circuit 100 recovers energy recovered from the panel Cp and supplies the sustain voltage Vs to the panel Cp.

The negative scan voltage supply unit 120 supplies a scan pulse Sp having a voltage magnitude of -Vy to the scan electrode lines Y1 to Ym in the address period.

The scan reference voltage supply unit 140 supplies the scan reference voltage Vsc to the scan electrode lines Y1 to Ym in the address period.

The setdown supply unit 130 supplies the falling ramp pulse to the scan electrode lines Y1 to Ym in the setdown period of the reset period.

The setup supply unit 110 supplies a ramp-up pulse to the scan electrode lines Y1 to Ym in the setup period of the reset period.

On the other hand, such a conventional driving apparatus uses a field effect transistor (FET) as a switching element. Since the FET is relatively expensive, it is a major factor that increases the manufacturing cost of the driving device of the plasma display panel. Therefore, the above-described driving apparatus of the conventional plasma display panel of FIG. 1 has a problem in that a manufacturing cost increases due to a relatively large number of switching elements, that is, FETs.

In order to solve this problem, an object of the present invention is to provide a plasma display driving apparatus which reduces the manufacturing cost by reducing the number of switching elements used.

The driving apparatus of the plasma display panel according to the present invention for achieving the above object includes a plasma display panel on which a scan electrode is formed, a top switch and a bottom switch, and a scan electrode between the top switch and the bottom switch. A sustain voltage supply control unit for supplying a sustain voltage (Vs) to the scan electrode through the top switch of the scan drive integrated circuit connected to the scan drive IC and a scan reference voltage to the scan electrode through the top switch of the scan drive integrated circuit And a scan reference voltage supply control unit for supplying (Vsc).

The apparatus may further include a negative scan voltage supply controller for supplying a negative scan voltage (−Vy) to the scan electrode through a bottom switch of the scan drive integrated circuit.

The apparatus may further include a set-down voltage supply controller for supplying a set-down voltage whose voltage gradually decreases to the scan electrode through the bottom switch of the scan drive integrated circuit.

Hereinafter, the plasma display device of the present invention will be described in detail with reference to the accompanying drawings.

2 is a view for explaining a plasma display device of the present invention.

Referring to FIG. 2, the plasma display apparatus of the present invention includes a plasma display panel 300 including a scan electrode Y and a scan driver 302 for driving the scan electrode Y formed on the plasma display panel 300. ).

Here, the above-described plasma display panel 300 is bonded to the front panel (not shown) and the rear panel (not shown) at regular intervals, a plurality of electrodes are formed. For example, a plurality of scan electrodes Y and a plurality of sustain electrodes Z parallel to the scan electrodes Y are formed, and the address electrodes X are intersected with the scan electrodes Y and the sustain electrodes Z. Can be formed.

The scan driver 302 supplies the rising ramp waveform, that is, the setup waveform and the falling ramp waveform, that is, the setdown waveform, to the scan electrode Y during the reset period, in particular, during the setup period of the reset period. In the present invention, a setup waveform of a voltage having a different magnitude from that of the other scan electrode groups is supplied to one or more scan electrode groups among the plurality of scan electrode groups including one or more scan electrodes (Y). In addition, the sustain pulse SUS is supplied to the scan electrodes Y during the sustain period.

When the plasma display panel 300 includes the scan electrode Y and the sustain electrode Z and the address electrode X, the data driver 301 and the sustain electrode for driving the address electrode X are formed. A sustain driver 303 for driving Z) may be further included.

The data driver 301 is subjected to inverse gamma correction and error diffusion by an inverse gamma correction circuit, an error diffusion circuit, and the like not shown, and then data mapped to each subfield is supplied by the subfield mapping circuit. The data driver 301 samples and latches data in response to a data timing control signal from a timing controller (not shown), and then supplies the data to the address electrode X. FIG.

The sustain driver 303 supplies a bias voltage of the sustain voltage Vs to the sustain electrodes Z during a period in which a ramp ramp down occurs and an address period under the control of a timing controller (not shown). The sustain pulses SUS are supplied to the sustain electrodes Z by alternately operating with the scan driver 302 during the sustain period.

An example of the structure of the plasma display panel 300 included in the plasma display apparatus of the present invention will be described with reference to FIG. 3.

3 is a view for explaining an example of the structure of a plasma display panel to which the present invention is applied.

Referring to FIG. 3, a plasma display panel includes a front panel including a plurality of sustain electrodes formed by pairing scan electrodes 202 and Y and sustain electrodes 203 and Z on a front substrate 201, which is a display surface on which an image is displayed. A rear panel 210 having a plurality of address electrodes 213 and X arranged so as to intersect the plurality of sustain electrodes described above on the back substrate 211 forming the back surface 200 and the rear surface is coupled in parallel with a predetermined distance therebetween. do.

The front panel 200 has one discharge space, that is, scan electrodes 202 and Y and sustain electrodes 203 and Z for mutually discharging and maintaining light emission of the discharge cells, that is, transparent electrodes formed of a transparent ITO material. The scan electrodes 202 and Y and the sustain electrodes 203 and Z provided by (a) and the bus electrode b made of a metal material are included in pairs. The scan electrodes 202 and Y and the sustain electrodes 203 and Z are covered by one or more upper dielectric layers 204 that limit the discharge current and insulate the electrode pairs, and discharge on top of the upper dielectric layers 204. In order to facilitate the condition, a protective layer 205 on which magnesium oxide (MgO) is deposited is formed.

The rear panel 210 is arranged such that a plurality of discharge spaces, that is, barrier ribs 212 of a stripe type (or well type) for forming discharge cells are arranged in parallel. In addition, a plurality of data electrodes 213 and X for performing address discharge to generate vacuum ultraviolet rays are arranged in parallel with the partition wall 212. The upper surface of the rear panel 210 is coated with R, G, and B phosphors 214 that emit visible light for image display during address discharge. A lower dielectric layer 215 is formed between the address electrodes 213 and X and the phosphor 214 to protect the address electrodes 213 and X.

Here, FIG. 3 illustrates only an example of a plasma display panel to which the present invention can be applied, and the present invention is not limited to the plasma display panel of FIG. 3. For example, in FIG. 3, only the scan electrodes 202 and Y and the sustain electrodes 203 and Z are formed on the front panel 200, and the data electrodes 213 and X are formed on the rear panel 210. 2, scan electrodes 202 and Y, sustain electrodes 203 and Z, and data electrodes 213 and X may be formed on the front panel 200.

Alternatively, the above-described scan electrodes 202 and Y and the sustain electrodes 203 and Z only show transparent electrodes a and bus electrodes b, respectively, but differently from the scan electrodes 202 and Y, respectively. At least one of the sustain electrodes 203 and Z may consist of only the bus electrode b.

2 to 3, the plasma display panel to which the present invention can be applied has a structure including a scan electrode Y, and other conditions may be used.

The detailed structure of the scan driver of reference numeral 302 which is the core of the present invention in the plasma display device of the present invention will be described in detail with reference to FIG. 4.

4 is a view for explaining a scan driver in more detail in the present invention.

Referring to FIG. 4, the scan driver of the plasma display apparatus includes a scan reference voltage supply controller 450, a sustain voltage supply controller 460, and a scan drive integrated circuit 440. The scan driver of the plasma display apparatus may further include an energy recovery circuit unit 410, a set down supply unit 420, and a negative scan voltage supply unit 430.

In the plasma display device of the present invention, the scan drive integrated circuit 440 is connected in a push / pull form and includes a top switch (QH) and a bottom switch (QL). It is connected to the scan electrode Y between QH and the bottom switch QL.

In addition, the scan reference voltage Vsc and the sustain voltage Vs are supplied to the scan electrode Y through the top switch QH of the scan drive integrated circuit 440.

An example to which the scan drive integrated circuit 440 of the present invention is applied is shown in FIG. 4.

In the present invention, a more detailed structure and operation of the scan drive integrated circuit 440 will be described in more detail with reference to the following description.

Here, the voltage difference between the energy recovery circuit unit 410 and the set-down supply unit 420 becomes relatively large. Accordingly, the electrical connection between the energy recovery circuit unit 410 and the setdown supply unit 420 when a scan pulse is supplied to the panel Cp, that is, the scan electrode Y, between the energy recovery circuit unit 410 and the setdown supply unit 420. Blocking switch (Qb) for blocking is preferably further included.

The energy recovery circuit unit 410 recovers the reactive energy of the panel Cp. The energy recovery circuit unit 410 may include, for example, an inductor L1 connected between an energy storage capacitor C1 and a scan drive integrated circuit 440 for charging energy recovered from the scan electrode Y; The first switch Q1, the fourth diode D4, the fifth diode D5 and the second switch Q2 and the ground level GND connected in parallel between the inductor L1 and the external capacitor C1. And a fourth switch Q4 connected between the base voltage source for supplying the voltage and the inductor L1 described above.

The negative scan voltage supply unit 430 includes a sixth switch Q6 connected between the first node n1 and the scan voltage source -Vy. The sixth switch Q6 is selected in response to a control signal supplied from a timing controller (not shown) during the address period, thereby scanning the negative scan voltage (-Vy) falling from the scan reference voltage Vsc. 440).

In the setdown supply unit 420, the blocking switch Qb is turned off and the fifth switch Q5 is turned on in the setdown period after the setup period of the reset period. The fifth switch Q5 has a predetermined slope with a negative scan voltage (-Vy) of the voltage of the first node n1 while the channel width is adjusted by the second variable resistor VR2 installed at the front end thereof. Lower The negative scan voltage (-Vy) supplied to the scan electrode Y is supplied through the bottom switch of the scan drive integrated circuit. At this time, a setdown pulse, that is, a ramp ramp down, is supplied to the scan electrodes Y.

The scan reference voltage supply control unit 450 supplies the sustain voltage Vs from the sustain voltage Vs supplied by the sustain voltage supply control unit 450 in the setup period of the reset period through the top switch QH of the scan drive integrated circuit 440. The setup pulse which gradually rises up to the sum of the scan reference voltage Vsc is supplied to the scan electrode Y, and the scan reference voltage Vsc is supplied to the scan electrode Y in the address period. The controller 450 includes voltage regulating capacitors C2 and 451 and setup / scan common switches Qcom and 452. The scan reference voltage supply controller 450 scans a scan reference voltage from the setup / scan common switch 452 between the scan reference voltage source for supplying the scan reference voltage Vsc and the drain of the setup / scan common switch 452. It is preferable to further include a reverse current prevention unit (D3, 454) for blocking the reverse current flowing to the voltage source.

The operation of the scan drive integrated circuit in the present invention will be described in more detail with reference to FIG. 5.

5 is a view for explaining the operation of the scan drive integrated circuit in more detail in the present invention.

When the scan reference voltage Vsc is supplied to the scan electrode Y, the scan reference voltage is supplied from the scan reference voltage source through the reverse current prevention unit D3.

Then, the scan reference voltage Vsc is supplied to the scan electrode Y through the top switch QH of the scan drive integrated circuit 440 through the setup / scan common switch Qcom.

That is, from the standpoint of the scan drive integrated circuit 440, the scan reference voltage Vsc is supplied through the top switch QH.

In addition, when the sustain voltage Vs is supplied to the scan electrode Y, the sustain voltage Vs is supplied from the sustain voltage source through the third switch Q3.

Then, the sustain voltage Vs is supplied to the scan electrode Y through the top switch QH of the scan drive integrated circuit 440.

That is, from the standpoint of the scan drive integrated circuit 440, the sustain voltage Vs is supplied through the top switch QH.

In sum, conventionally, the scan voltage is supplied through the top switch of the scan drive integrated circuit and the sustain voltage is supplied through the bottom switch of the scan drive integrated circuit. However, in the present invention, the scan reference voltage Vsc and the sustain voltage Vs are supplied through the top switch of the scan drive integrated circuit.

As described above, since the scan reference voltage Vsc and the sustain voltage Vs can be driven using only the top switch in the scan drive integrated circuit, the number of switching elements such as the switch Q9 shown in FIG. 1 is reduced. Can be.

As described in detail above, in another structure of the driving apparatus of the plasma display panel of the present invention, the number of switching elements, that is, the number of FETs (Field Effect Transistors) used in comparison with the conventional driving apparatus, is reduced, thereby reducing the plasma display panel. The manufacturing cost of the drive device is reduced.

As such, the technical configuration of the present invention described above can be understood by those skilled in the art that the present invention can be implemented in other specific forms without changing the technical spirit or essential features of the present invention.

Therefore, the exemplary embodiments described above are to be understood as illustrative and not restrictive in all respects, and the scope of the present invention is indicated by the appended claims rather than the foregoing detailed description, and the meaning and scope of the claims are as follows. And all changes or modifications derived from the equivalent concept should be interpreted as being included in the scope of the present invention.

As described above in detail, the present invention reduces the number of switching elements used in the driving device for supplying the scan reference voltage Vsc and the sustain voltage Vs by changing the position of the scan drive integrated circuit, thereby reducing the number of switching elements. There is an effect of reducing the manufacturing cost of the drive device.

Claims (3)

A plasma display panel on which scan electrodes are formed; A scan drive integrated circuit comprising a top switch and a bottom switch, the scan drive integrated circuit being connected to the scan electrode between the top switch and the bottom switch; A sustain voltage supply controller for supplying a sustain voltage Vs to the scan electrode through the top switch of the scan drive integrated circuit; And A scan reference voltage supply controller for supplying a scan reference voltage Vsc to the scan electrode through the top switch of the scan drive integrated circuit; Plasma display device comprising a. The method of claim 1, And a negative scan voltage supply controller for supplying a negative scan voltage (-Vy) to the scan electrode through the bottom switch of the scan drive integrated circuit. The method of claim 1, And a setdown voltage supply control unit for supplying a setdown voltage of which voltage gradually decreases to the scan electrode through the bottom switch of the scan drive integrated circuit.

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