KR20070017356A - Apparatus, methods and articles of manufacture for output impedance matching using multi-band signal processing - Google Patents

Abstract

An apparatus, method and component for output impedance matching in multi-band power amplification are provided. An output matching configuration comprising one or more output matching, multi-band deplexers and switches is connected to the active device.

Multi-Band, Power Amplifier, Impedance Matching, Diplexer, Dual-Band Deplexer

Description

FIELD, METHODS AND COMPONENTS OF OUTPUT IMPEDANCE MATCHING WITH MULTIBAND SIGNAL PROCESSING

The present invention relates to signal processing and more particularly to output impedance matching for multi-band power amplifiers.

Power amplifiers used in the transmitter can be optimized for use in specific modes and frequency bands to maximize efficiency. This optimization may require the amplifier to be biased in some way. In addition, the impedance usually needs to be matched between components within the amplifier and between components adjacent to the amplifier.

However, in some communication systems, the requirements of the amplifier create problems. For example, in a W-CDMA or CDMA2000 transmitter, signals with non-water envelopes are usually transferred through a power amplifier. However, it is difficult to reach optimum levels of amplifier efficiency and linearity; The design between the two must be compromised. Moreover, it requires a wide range of output power: typically 80dB.

Problems also arise with multiband transmitters. For example, since impedance varies with operating frequency, frequencies with optimal impedance matching in one frequency band are not suitable for operation in another frequency band. The problem of impedance matching at different frequencies can be solved by providing separate amplification chains. However, individual amplification chains can be expensive, increasing the size of the transmitter and increasing the power required by the transmitter.

Amplifier design and impedance matching are becoming more difficult in today's communications systems because it is desirable for the amplifier to operate over multiple frequency bands. For example, the transmitter can be used in the GSM900 (880-915 MHz) and DCS1800 (1710-1785 MHz) bands. As another example, the transmitter may be used in the CDMA2000 (824-849 MHz and 1850-1910 MHz) or PCS1900 (1850-1910 MHz) frequency bands. Typically, a dual band mobile telephone transceiver includes two power amplifiers, each operating within one frequency bandwidth, each requiring impedance matching.

The prior art seeks to provide a solution to the amplifier design and impedance matching problem. For example, FIG. 1 illustrates a conventional impedance matching attempt for a dual band single state power amplifier operating in the 800 MHz or 1900 MHz band. One active device is a switching impedance network 104 and 106 as an input, an amplifier 102, a bias control 103, a power supply 107, a switching impedance network 105 and a switching impedance network 108 and 110 as an output. Including, to provide the desired input and output impedance. However, the need for these switching impedance networks increases the cost of the device and results in reduced efficiency.

Another impedance matching method in a dual band power amplifier is shown in FIG. The amplifier 214 is matched to the first matching circuit 202. The second matching circuit 204, consisting of two different impedance networks 206 and 208, is tuned to each frequency bandwidth. Two switches 210 and 212 are essential to this method. This method increases the cost of the device while reducing the efficiency.

Thus, there is a need for improved output matching for multi-band power amplifiers.

Apparatus, methods, and components are provided for multi-band signal processing. In one exemplary embodiment, an output matching configuration is provided that includes at least one output impedance matcher, a multi-band deplexer, and a switch.

The invention will now be described by way of example with reference to the accompanying drawings.

1 shows a dual band device of the prior art.

2 shows a dual band device of the prior art.

3 illustrates an embodiment of an output matching configuration.

4 illustrates an embodiment of a dual band deplexer.

5 shows an embodiment of a dual band deplexer.

6 shows an embodiment of an output impedance matching circuit.

7 shows an embodiment of an output impedance matching circuit.

8 shows an embodiment of an output impedance matching circuit.

9 shows an embodiment of an output impedance matching circuit.

10 shows an embodiment of an output impedance matching circuit.

11 illustrates an embodiment of an output matching configuration.

12 illustrates an embodiment of an output matching configuration.

The present invention includes apparatus, methods and components for output impedance matching using multi-band signal processing, such as, for example, output impedance matching for multi-band power amplifiers used in cell phones. 3 illustrates an example embodiment that includes an output matching configuration 10. The output matching configuration 10 as shown is connected at its input to an active device comprising a power amplifier 100 and at its output to a load 102 such as, for example, an antenna. In this embodiment, the output matching configuration 10 is, in part, a wideband output matching section 12, a multiband deplexer comprising a dual band deplexer, two single band matching portions 16 and 18 and a switch 20 ).

The wideband output matcher 12 is connected at its input to the output terminal of the power amplifier 100 and at its output to the dual band deplexer 14. In one example embodiment, it will be appreciated that the broadband match 12 provides a broadband match of about 5 Ohms to 10-15 Ohms, although other desired ranges may also be provided.

The dual band diplexer 14 is connected at its output with single band matching 16 and 18, respectively. In this embodiment the power amplifier 100 transmits an input signal in one or more defined frequency bands received by the dual band deplexer 14. For example, in a dual band system such as a system operating in GSM / DCS mode, the input signal transmitted from the power amplifier 100 may be between two different frequency bands depending on whether the system is operating in GSM mode or DCS mode. Can be adjusted from The dual band deplexer 14 processes the input signal according to a specific frequency band of the signal and then forms an output signal in the single band matching portions 16 and 18. In this embodiment, the dual band deplexer 14 preferably forms the first output signal in the single band matching section 16 in the high frequency band, and preferably in the low frequency band, the second output signal in the single band matching. Formed in section 18, which is described in more detail below. The single band matchers 16 and 18 are preferably each tuned to a specific bandwidth in accordance with the specified frequency band of the system. For example, in a dual band system, the single band match 16 is tuned according to a first operating frequency, preferably a high frequency band, and the single band match 18 is a second operating frequency, preferably a low frequency band. Are synchronized according to. In this embodiment, the single band matching portions 16 and 18 operate to individually realize high efficiency operation of both the low and high frequency bands.

A switch 20, such as a PIN diode, is disposed between the dual band deplexer 14 and the single band matcher 16, which operates to suppress unwanted harmonics from the low frequency band. In general, when the power amplifier outputs a signal of a plurality of transmission frequencies, unwanted harmonics may occur when the harmonics of the low transmission frequency lie below or equal to the high transmission frequency. For example, in a dual band structure including the GSM / DCS mode, undesirable harmonics are suppressed in the GSM mode exactly located in the DCS bandwidth, and 825 very close to the 1850-1910 MHz mode in the dual band structure including the CDMA2000 mode. In the -849 MHz mode, undesirable harmonics are suppressed.

In the first operation mode according to the present embodiment, when a signal of the first low frequency band is transmitted from the power amplifier 100 (for example, 824-849Mhz or 880-915Mhz), the PIN diode 20 is turned on As a result, undesirable harmonics can be reduced without affecting the electrical performance of low frequency transmission. In addition, in the second operation mode according to the present embodiment, when a signal of the second high frequency band is transmitted from the power amplifier 100 (for example, 1710-1795Mhz or 1850-1910Mhz), the PIN diode 20 is turned on. Off, resulting in a very high impedance in the high frequency band.

According to this embodiment, the level of output power is about the same for variable frequency, for example, linear output power of 28.5 dBm for CDMA2000 (824-849 Mhz) mode, 29 dBm for CDMA2000 (1850-1910 Mhz) mode frequency band. It is possible to realize one multi-band amplifier with a linear output power of, and a saturation output power of 35dBm for GSM800 and 3.3dBm for DCS1800 frequency band.

Various circuit configurations and techniques can be used for the components of the output matching configuration 10. Some examples are described below.

The PIN diode 20 may be replaced with a switchable band stop filter, for example. Other suitable switches can also be used.

An embodiment of a deplexer suitable for a dual band deplexer 14 consisting of a high pass and a low pass filter is shown in FIG. 4. High pass filter 1100 includes inductor 1102 and capacitors 1104 and 1106. Low pass filter 1111 includes inductors 1108 and 1110 and capacitor 1112. In another embodiment, the inductor can be replaced with a short transmission line with high characteristic impedance and the capacitor can be replaced with an open circuit stub.

Alternatively, in another embodiment, the dual band deplexer 14 may be formed of a quarter wave or half wave transmission line as shown in FIG. In this embodiment, transmission line lengths l ₁ and l ₂ are 1/4 waves at 800 MHz to protect the high frequency path from low frequency signals, while lengths l ₄ and l ₅ are at 1900 MHz to protect the low frequency path from high frequency signals. 1/4 wave. In order to reduce or eliminate the additional necessary matching, the length l ₃ is chosen to realize a parallel equivalent circuit with an open circuit stub, ie the total length l ₂ + l ₃ is not only half-pile at 1900Mhz but also full length l ₅ + l ₆ Should be half wave at 800Mhz. The series transmission line preferably has a 50 Ohm characteristic impedance.

6 shows one embodiment of an example of an output impedance matching circuit that may be used for the broadband output matcher 12 and one or more of the two single band matchers 16 and 18. The bias voltages V _bias1 and V _bias2 provide capacitance values to varactors 350 and 351. Capacitors 355, 356, and 357 are DC blocking capacitors, and resistors 360 and 361 are preferably large to prevent RF leakage.

FIG. 7 shows another embodiment of an output impedance matching circuit that may be used for wideband output matching 12 and one or more of two single band matching 16 and 18. Here, four single switches 380-383 and four capacitors 390-393 match the impedance values. The transmission line 395 is smaller than quarter wave to provide conductive impedance. It should be noted that in this and other embodiments, the number of inputs determines the composition of the component. For example, if this embodiment is used as an embodiment with seven transistors, one may want to use fewer components, for example three capacitors, which would provide the necessary matching for the seven possible outputs. Because. Capacitors 390-393 are matching capacitors.

Referring now to FIG. 8, another embodiment of an output impedance matching circuit that can be used for one or more of the broadband output matcher 12 and two single band matchers 16 and 18 is shown. Impedance matching in this embodiment increases efficiency using a parallel circuit class E load network, such as the type disclosed in US Pat. No. 6,554,610. Parallel circuit load networks are tuned to specific values of impedance, capacitance and resistance, depending on the system's appropriate values. The load network includes a resonant circuit 501 comprising a capacitor 501C, a resistor 501R (resistance R) and a load 501R2 (resistance R _L ), a parallel short circuit transmission line 502, and a quarter wave transmission line ( 503). Parallel short-circuit transmission line 502 and parallel capacitor 501C provide conductive impedance at a center frequency of f ₀ = √f ₁ f ₂ , where f ₁ is a low frequency band and f ₂ is a high frequency band.

The conductive impedance of the load network is of course different for different frequencies. Typically this is:

Z _in1 = R / (1-jtan34.244 °) at fundamental frequency

Is determined.

Where R is the required output resistance, R _L = Z ² ₀₁ / R. At higher harmonics, the impedance should be capacitive.

In an example embodiment, the optimal load network variable is:

tan = 0.732 R / Z ₀

C = 0.685 / ωR

R = 1.365 V ² _cc / P _out

At this time, it is the V _cc power supply, P _out is the output power, and Z ₀ and θ are the characteristic impedance and the electrical length of the parallel short circuit transmission line 502, respectively.

Capacity C is the internal device capacity (external output capacity is also present but must be factored accordingly), which is known for the appropriate frequency. For example, when the output impedance matching circuit is for a bipolar device, the collector capacitance is used. As another example, when the output impedance matching circuit is for a FET device, the drain capacitance is used. The quarter wave transmission line 503 has an impedance Z ₀₁ and an electrical length θ1 = 90 °. The quarter wave transmission line 503 can be thought of as a high frequency series resonant circuit, thus effectively extending the entire frequency range. Of course, in other embodiments, other known methods may also be used or may not be used at all.

Another alternative embodiment of an output impedance matching circuit that can be used for one or more of the broadband output matcher 12 and the two single band matchers 16 and 18 is shown in FIG. 9. At this time, two capacitors 602 and 604 and a shorter transmission line 606 are replaced by the quarter wave transmission line 503 of FIG. The variable of the component

Z ₀₂ = Z ₀₁ / sinθ ₂ , C = cosθ ₂ / ωZ ₀₁

Another alternative embodiment of an output impedance matching circuit that can be used for one or more of the broadband output matcher 12 and the two single band matchers 16 and 18 is shown in FIG. 10. This embodiment is preferably used in the broadband embodiment when the output impedance is as small as about 50 Ohms. Two L section transformers 701 and 702 having a serial transmission line and parallel capacitance are added to the embodiment as shown in FIG.

Of course, other embodiments may use other output impedance matching circuits, such as low pass ladder filters.

In another embodiment, one or more notch filters may be used within an output impedance matching circuit or band deflector embodiment, thus further attenuating unwanted frequencies. For example, suppression of the second harmonic of the 840 MHz (1.68 GHz) signal is desirable in the CDMA2000 embodiment. This harmonic is within the power amplifier frequency bandwidth and must be attenuated. Therefore, a notch filter can be used.

Another embodiment of an output matching configuration according to the present invention is shown in FIG. In this embodiment, the output matching configuration 110 is shown as part of a broadband output matching circuit 112, a deplexer 114, and a PIN diode switch 120. Apart from the embodiment shown in FIG. 3, the wideband output matching circuit 112 provides complete output impedance matching between the active device and the load over the entire frequency range, thus providing no single band matching. In this embodiment, the deplexer 114 and the PIN diode switch 120 are the same as the deplexer 14 and the PIN diode 20 described above. In this embodiment, the wideband output matching circuit 112, deplexer 114, and PIN diode switch 120 may take the form of various suitable components or techniques, such as any of the embodiments described above.

Another embodiment of an output matching configuration in accordance with the present invention is shown in FIG. In this embodiment, the output matching configuration 210 is shown to include a deplexer 214 connected directly to the active device 200. For example, where the active device 200 includes a power amplifier, the deplexer 214 may be connected to the transistor of the power amplifier, for example at a collector. In this embodiment, the output matching configuration 210 is two single-band matching portions 216 and 218, respectively, and a PIN diode switch similar to the single band matching portions 16 and 18 and PIN diode switch 20 shown in FIG. It further comprises (220). Similarly, output matching configuration 210 in this embodiment may take the form of any of a variety of suitable components or techniques, such as any of the embodiments described above.

Embodiments of the present invention may be used in dual and other multi-band technologies, such as in cell phones. Examples of dual band technologies include GSM900 / DCS1800 or CDMA2000. Examples of triple band technologies are GSM900 / DCS1800 / PCS1900 or CDMA2000 / PCS1900.

Various types of system techniques can be used to construct embodiments of the present invention. Thus, those skilled in the art will understand that embodiments of the present invention or various components and / or features thereof may be made entirely of hardware, software, or a combination thereof. While the invention has been described in an illustrative manner, additional advantages and modifications will occur to those skilled in the art. For example, while an active device that includes power amplifiers of various embodiments is described, the active device may include other elements such as, for example, attenuators. Accordingly, the invention in its broader form is not limited to the specific details shown and described herein. Modifications may be made without departing from the spirit and scope of the invention. Accordingly, the present invention should not be limited to the specific embodiments, but should be construed within the spirit and scope of the appended claims and their equivalents.

Claims (19)

In the output impedance matching device for multiband signal processor: A multi-band deplexer suitable for receiving an input signal having a defined frequency band and for forming at least first and second output signals, the first output signal being in a larger frequency band than the frequency band of the second output signal -; And At least one switch through which the first output signal from the multi-band deplexer passes, the switch having "on" and "off" states, wherein the switch is configured to suppress undesired harmonics; "On" when in one frequency band and "Off" when the input signal is in a second frequency band- Device comprising a. 2. The apparatus of claim 1, further comprising at least one impedance match coupled to the multi-band deplexer through which at least one of the first output signal and the second output signal passes. 2. The apparatus of claim 1, further comprising a first impedance matcher coupled with the multi-band deplexer through which the second output signal passes. 4. The apparatus of claim 3, further comprising a second impedance match connected to the switch through which the first output signal passes. 2. The multiband signal processor of claim 1, wherein the multiband signal processor comprises an active device for transmitting the input signal received by the multiband deplexer, wherein the device comprises the active device and the multiband through which the input signal passes. And an impedance matcher coupled between the diplexers. 2. The multiband signal processor of claim 1, wherein the multiband signal processor receives an active device that transmits the input signal received by the multiband deplexer, and the first and second output signals formed by the multiband deplexer. Wherein the load comprises: An impedance matcher coupled between the active device through which the input signal passes and the multi-band deplexer; A first impedance matcher coupled between the multiband deplexer and the load through which the second output signal passes; And A second impedance matcher connected between the switch and the load through which the first output signal passes Device comprising a. The apparatus of claim 1, wherein the switch comprises a PIN diode. 2. The apparatus of claim 1, wherein the input signal comprises the second frequency band that is in a frequency band larger than the first frequency band. 2. The apparatus of claim 1, wherein the multi-band signal processor includes an active device for transmitting the input signal received by the multi-band deplexer, wherein the active device is selected from the group consisting of a power amplifier and an attenuator. In the output matching method in a multi-band signal processor: Receiving an input signal having a limited frequency band and forming at least first and second output signals in a load, wherein the first output signal consists of a frequency band larger than the frequency band of the second output signal; And Adjusting the first output signal according to the limited frequency band of the input signal, where undesirable harmonics are suppressed from the first output signal when the input signal is in the first frequency band How to include. 11. The method of claim 10, wherein the first output signal is adjusted by at least one switch having an "on" and an "off" state, the method further comprising switching the switch when the input signal is in the first frequency band. Operating in an "on" state and operating the switch in an "off" state when the input signal is in a second frequency band. 11. The method of claim 10, further comprising individually matching impedances of the first and second output signals. 13. The method of claim 12 wherein the receiving and forming step comprises a multi-band deplexer and the impedance matching step comprises: Providing a first impedance match between the multiband deplexer and the load through which the second output signal passes; And Providing a second impedance match between the multiband deplexer and the load through which the first output signal passes How to include. The active device of claim 10, wherein the multi-band signal processor comprises an active device for transmitting the input signal, the receiving and forming step comprises a multi-band deplexer, and the method comprises the active device through which the input signal passes. And providing an impedance match between the multiband deplexer and the multiband deplexer. In the component for matching the amplifier output impedance: A multi-band deplexer for receiving an input signal having a defined frequency band from a power amplifier and forming at least first and second output signals to the load, wherein the first output signal is greater than the frequency band of the second output signal Is-; At least one switch coupled between the multiband deplexer and the load to receive the first output signal from the multiband deplexer, the switch having an "on" and an "off" state, the switch being preferably An "on" state when the input signal is in the first frequency band to suppress unharmonized harmonics, and an "off" state when the input signal is in the second frequency band; And Between the multiband deplexer and the load through which at least one of the first output signal and the second output signal passes; Between the power amplifier and the multi-band deplexer through which the input signal passes One or more impedance matching devices connected to at least one of the Component comprising a. 16. The device of claim 15, wherein a first impedance matcher connected between the multiband deplexer and the load through which the second output signal passes, and a second impedance connected between the switch and the load through which the first output signal passes. Component further comprising a matching part. The method of claim 15, An impedance matching unit connected between the power amplifier and the multi-band deplexer through which the input signal passes; A first impedance matcher coupled between the multiband deplexer and the load through which the second output signal passes; And A second impedance matcher connected between the switch and the load through which the first output signal passes Component comprising more. The component of claim 15, wherein the switch comprises a PIN diode. 16. The component of claim 15 wherein said input signal comprises said second frequency band at a frequency greater than said first frequency band.

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