KR20060112948A - Liquid crystal display panel having dual seal pattern - Google Patents

Abstract

An LCD having a dual seal pattern is provided to prevent water penetration from a pad region by using the dual seal pattern, and to prevent a seal-pattern print defect by allowing the air in the dual seal pattern to be easily discharged through an air passage formed at the seal pattern at the time of bonding of an array substrate and a color filter substrate. A thin film transistor array substrate includes a gate line and a data line intersecting each other. An image display part(117) is defined by a region formed as the gate line and the data intersect each other. A first seal pattern(103) and a second seal pattern(105) are separated from each other and formed at an outer edge of the image display part, and include at least one air passage(107a). A pad part is disposed on the thin film transistor array substrate, and is formed adjacently to the first seal pattern and the second seal pattern. A color filter substrate(115) is disposed on the first seal pattern and the second seal pattern including the image display part, and is coupled to the thin film transistor array substrate.

Description

Liquid crystal display device with double failing structure {LIQUID CRYSTAL DISPLAY PANEL HAVING DUAL SEAL PATTERN}

1 is a schematic plan view showing a unit liquid crystal display panel in which a thin film transistor array substrate and a color filter substrate are bonded to each other in a general liquid crystal display.

2A is a plan view illustrating a liquid crystal display device in which a single failure turn is formed according to an embodiment of the prior art.

FIG. 2B is a cross-sectional view of a liquid crystal display device showing a failure turn formed between a lower substrate and a color filter substrate along the line IIb-IIb of FIG. 2A according to one embodiment of the prior art; FIG.

3A is a plan view illustrating a liquid crystal display device in which a double failure turn is formed according to another embodiment of the prior art.

FIG. 3B is a cross-sectional view of a liquid crystal display device showing a failure turn formed between the lower substrate ′ along the IIIb-IIIb line of FIG. 3A and the color filter substrate according to another embodiment of the prior art.

FIG. 4 is an enlarged view of portion “A” of FIG. 3A according to another embodiment of the prior art, and is a schematic diagram showing a seal failure caused by air filled in a closed space between double fail turns; FIG.

FIG. 5 is a plan view illustrating a liquid crystal display device in which a double failure turn is formed according to a first embodiment of the present invention, and a schematic view showing a case in which a plurality of air passages are formed in a second seal pattern. FIG.

FIG. 6 is an enlarged schematic view of a portion “B” of FIG. 5 in a liquid crystal display device having a double failing turn according to a first embodiment of the present invention, in which air is drawn out through an air passage formed in a second seal pattern; Schematic showing exiting.

FIG. 7 is a plan view illustrating a liquid crystal display device in which a double failing turn is formed according to a second exemplary embodiment of the present invention, in which a plurality of air passages are formed in a second seal pattern. FIG.

FIG. 8 is a plan view illustrating a liquid crystal display device in which a double failing turn is formed according to a third exemplary embodiment of the present invention, and a schematic diagram illustrating a case where an air passage is formed at ends of the first chamber pattern and the second chamber pattern. FIG.

FIG. 9 is a plan view illustrating a liquid crystal display device in which a double failing turn is formed according to a fourth exemplary embodiment of the present invention, and a schematic diagram illustrating a case in which an air passage is formed in a second chamber pattern forming a closed space between the first chamber patterns. .

*** Description of the symbols for the main parts of the drawings ***

101: thin film transistor array substrate 103: first seal pattern

105: second room pattern 107: space part

107a: air passage 109: gate pad portion

113: air 115: color filter substrate

117: image display unit

The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device having a double fail turn structure that can improve the reliability of a liquid crystal cell by solving a cause of a failure of printing a fail turn by applying a double fail turn structure. .

In general, a liquid crystal display device is a display device in which a desired image is displayed by individually supplying data signals according to image information to liquid crystal cells arranged in a matrix and adjusting light transmittance of the liquid crystal cells. .

The liquid crystal display includes a liquid crystal display panel in which liquid crystal cells in pixel units are arranged in a matrix, and a driver integrated circuit (IC) for driving the liquid crystal cells.

The liquid crystal display panel includes a color filter substrate and a thin film transistor array substrate facing each other, and a liquid crystal layer filled in spaced intervals between the color filter substrate and the thin film transistor array substrate.

In addition, on the thin film transistor array substrate of the liquid crystal display panel, a plurality of data lines for transmitting a data signal supplied from a data driver integrated circuit to the liquid crystal cells and a scan signal supplied from the gate driver integrated circuit to the liquid crystal cells The plurality of gate lines are orthogonal to each other, and liquid crystal cells are defined at each intersection of these data lines and the gate lines.

The gate driver integrated circuit sequentially supplies scan signals to a plurality of gate lines so that the liquid crystal cells arranged in a matrix form are sequentially selected one by one, and the data driver integrated circuit is included in the selected one line of liquid crystal cells. The data signal is supplied from.

Meanwhile, a common electrode and a pixel electrode are formed on opposite inner surfaces of the color filter substrate and the thin film transistor array substrate to apply an electric field to the liquid crystal layer. Here, the pixel electrode is formed for each liquid crystal cell on the thin film transistor array substrate, while the common electrode is integrally formed on the entire surface of the color filter substrate.

Therefore, by controlling the voltage applied to the pixel electrode in a state where a voltage is applied to the common electrode, it is possible to individually control the light transmittance of the liquid crystal cells.

As described above, in order to control the voltage applied to the pixel electrode for each liquid crystal cell, a thin film transistor used as a switching element is formed in each liquid crystal cell.

The components of the general liquid crystal display as described above will be described in detail with reference to FIG. 1.

FIG. 1 is an exemplary view illustrating a schematic planar structure of a unit liquid crystal display panel in which a thin film transistor array substrate and a color filter substrate of a liquid crystal display are bonded to each other.

Referring to FIG. 1, a general liquid crystal display panel 10 includes an image display unit 17 in which liquid crystal cells are arranged in a matrix, a gate pad unit 19 and data connected to gate lines of the image display unit 17. And a data pad portion 21 connected to the lines. Here, the gate pad portion 19 and the data pad portion 21 are formed in the edge region of the thin film transistor array substrate 13 that does not overlap the color filter substrate 15.

In addition, the gate pad unit 19 supplies a scan signal supplied from the gate driver integrated circuit to the gate lines of the image display unit 17, and the data pad unit 21 supplies image information supplied from the data driver integrated circuit. Is supplied to the data lines of the image display unit 17.

In the thin film transistor array substrate 13 of the image display unit 17, data lines to which image information is applied and gate lines to which a scan signal is applied are perpendicularly intersected with each other, and switching liquid crystal cells at an intersection thereof. A thin film transistor (not shown) and a pixel electrode (not shown) connected to the thin film transistor to drive a liquid crystal cell, and a protective film (not shown) are formed on the entire surface of the substrate to protect such an electrode and the thin film transistor. .

In addition, the color filter substrate 15 of the image display unit 17 includes color filters (not shown) separately applied to each cell region by a black matrix (not shown), and formed on the thin film transistor array substrate 13. A common transparent electrode that is a counter electrode of the pixel electrode is formed.

The thin film transistor array substrate 13 and the color filter substrate 21 configured as described above are provided with a cell-gap so as to be uniformly spaced apart by a spacer, and an outer portion of the image display unit 17. The seal patterns 23 are bonded to each other to form a unit liquid crystal display panel.

In fabricating the unit liquid crystal display panel as described above, a method of simultaneously forming a plurality of unit liquid crystal display panels on a large area mother substrate is generally applied to improve the yield.

Accordingly, a process of separating and processing unit liquid crystal display panels from a large area mother substrate by cutting and processing a mother substrate on which the plurality of liquid crystal display panels are manufactured is required.

The liquid crystal is injected into the unit liquid crystal display panel separated from the large-area mother substrate to form a liquid crystal layer in a cell-gap where the thin film transistor array substrate and the color filter substrate are separated, and seal the liquid crystal injection hole.

As described above, in order to fabricate a unit liquid crystal display panel, a thin film transistor array substrate and a color filter substrate are largely manufactured separately, and the thin film transistor array substrate and the color filter substrate are bonded to each other to maintain a uniform cell-gap, and then the unit liquid crystal. Processes for cutting into a display panel and injecting liquid crystal are required.

In particular, in order to bond the thin film transistor array substrate and the color filter substrate, a process of forming a seal pattern outside the image display unit is required.

In this regard, the failure turn forming method according to the prior art will be described as follows.

Although not shown in the drawing, a screen mask patterned to selectively expose a plurality of seal pattern forming regions, and a rubber roller for simultaneously forming a plurality of seal patterns by selectively supplying a sealant to a substrate through the screen mask ( squeegee) is provided.

In addition, the plurality of seal patterns formed on the substrate provide a gap in which a liquid crystal layer can be formed, and prevent the liquid crystal from leaking to the outside of the image display units.

Therefore, the plurality of seal patterns are formed along the edges of the image display parts of the substrate, and the liquid crystal injection holes are formed at one side thereof.

The screen printing method as described above comprises applying a sealant on a screen mask on which a plurality of seal pattern forming regions are patterned, and printing with a rubber roller to form a plurality of seal patterns on a substrate, and the plurality of seal patterns It consists of a drying step of leveling by evaporating the solvent contained in.

The screen printing method is generally used because of the convenience of the process, but has a disadvantage of increasing the consumption of the sealant by forming a plurality of seal patterns at the same time by applying a sealant on the front of the screen mask and printing with a rubber roller. .

In addition, the rubbing of an alignment layer (not shown) formed on the substrate may occur due to the contact between the screen mask and the substrate, thereby degrading the image quality of the liquid crystal display.

Thus, a seal dispensing method has been proposed to compensate for the shortcomings of the screen printing method as described above.

The seal dispensing method proposed to supplement the screen printing method will be described as follows.

Although not shown in the drawing, the conventional seal dispensing method moves the table loaded with the substrate in the front, rear, left and right directions, and applies a constant pressure to the sealants filled with syringes, thereby forming edges of the image display portions formed on the substrate. Form failure patterns along the way. In this case, the real patterns are sequentially formed in units of rows of the image display units.

Therefore, the seal dispensing method can reduce the consumption of the sealant by selectively supplying the sealant only to the region where the seal patterns are to be formed, and also rubbing the alignment film (not shown) because the syringes and the image display portions are not in contact with each other. The defect can be prevented to improve the image quality of the liquid crystal display.

2A and 2B show a conventional liquid crystal display in which a failure turn is formed by using the seal dispensing method.

2A is a plan view illustrating a liquid crystal display device in which a single failure turn is formed according to an embodiment of the prior art.

FIG. 2B is a cross-sectional view of a liquid crystal display device showing a failure turn formed between a lower substrate and a color filter substrate along the line IIb-IIb of FIG. 2A according to an embodiment of the prior art.

As shown in FIG. 2A, a liquid crystal display according to an exemplary embodiment of the present disclosure includes an image display unit 37 in which liquid crystal cells are arranged in a matrix form, and gate lines (not shown) of the image display unit 37. And a data pad part (not shown) connected to the gate pad part 39 and data lines (not shown). Here, the gate pad part 39 and the data pad part (not shown) are formed in an edge region of the thin film transistor array substrate 31 that does not overlap the color filter substrate 35.

In addition, the gate pad unit 39 supplies a scan signal supplied from a gate driver integrated circuit to the gate lines of the image display unit 37, and the data pad unit (not shown) supplies an image supplied from the data driver integrated circuit. The information is supplied to the data lines of the image display unit 37.

Although not shown in the drawing, in the thin film transistor array substrate 31 of the image display unit 37, data lines to which image information is applied and gate lines to which a scanning signal is applied are vertically intersected with each other, and the intersections thereof are provided. A thin film transistor (not shown) for switching the liquid crystal cells and a pixel electrode (not shown) connected to the thin film transistor to drive the liquid crystal cell are formed on the front surface of the substrate.

The color filter substrate 35 of the image display unit 37 may include color filters (not shown) applied separately to each cell region by a black matrix (not shown), and formed on the thin film transistor array substrate 31. A common transparent electrode (not shown) that is a counter electrode of the pixel electrode is formed.

A failure pattern 33 is formed outside the image display unit 37, and the thin film transistor array substrate 31 and the color filter substrate 35 are bonded to each other by the failure turn 33. The liquid crystal display panel is formed. In this case, a spacer (not shown) is disposed between the thin film transistor array substrate 31 and the color filter substrate 35 to maintain a cell gap between the thin film transistor array substrate 31 and the color filter substrate 35.

However, according to the liquid crystal display device according to an exemplary embodiment of the present invention in which the fine fail-turn structure is applied as described above, as illustrated in FIG. 2B, the pad region, for example, the gate pad portion 39, is vulnerable to moisture penetration. This may cause a defect in the liquid crystal display panel.

Accordingly, a liquid crystal display device having a double fail turn structure has been proposed as a fail turn structure capable of improving the problem that the gate pad portion may be vulnerable to moisture penetration.

Referring to FIGS. 3A and 3B, a liquid crystal display device having a double fail-turn structure according to another exemplary embodiment will be described below.

3A is a plan view illustrating a liquid crystal display device in which a double failure turn is formed according to another embodiment of the prior art.

FIG. 3B is a cross-sectional view of a liquid crystal display showing a failure turn formed between a lower wave and a color filter substrate along the IIIb-IIIb line of FIG. 3A according to another embodiment of the prior art.

As shown in FIG. 3A, an LCD according to another embodiment of the related art includes an image display unit 57 in which liquid crystal cells are arranged in a matrix, and gate lines (not shown) of the image display unit 57. And a data pad part (not shown) connected to the gate pad part 49 and data lines (not shown). The gate pad part 49 and the data pad part (not shown) are formed in an edge region of the thin film transistor array substrate 41 that does not overlap the color filter substrate 55.

In addition, the gate pad unit 49 supplies a scan signal supplied from a gate driver integrated circuit to the gate lines of the image display unit 57, and the data pad unit (not shown) is an image supplied from the data driver integrated circuit. The information is supplied to the data lines of the image display section 57.

Although not shown in the drawing, in the thin film transistor array substrate 41 of the image display unit 57, data lines to which image information is applied and gate lines to which a scanning signal is applied are vertically intersected with each other, and the intersection thereof is provided. A thin film transistor (not shown) for switching liquid crystal cells is formed at a portion thereof, and a pixel electrode (not shown) connected to the thin film transistor to drive the liquid crystal cell is formed on a front surface of the substrate.

In addition, color filter substrates 55 of the image display unit 57 are formed on the color filter substrates (not shown) separated and applied to each cell region by a black matrix (not shown), and formed on the thin film transistor array substrate 41. A common transparent electrode (not shown) that is a counter electrode of the pixel electrode is formed.

In addition, double-sided failure patterns 43 and 45 are formed outside the image display unit 57, and the thin-film transistor array substrate 41 and the color filter substrate are formed by the failure turns 43 and 45. 55 are joined to form a unit liquid crystal display panel. In this case, a spacer (not shown) is disposed between the thin film transistor array substrate 41 and the color filter substrate 55 so as to maintain a cell gap between the thin film transistor array substrate 41 and the color filter substrate 55. Here, as shown in FIG. 3B, the failure turns 43 and 45 of the dual structure are spaced apart from the pad portion 49 by a predetermined interval, and a space between the failure turns 43 and 45 of the dual structure is provided. The part 47 is formed, and these both ends are cut off from the outside each other.

However, according to the liquid crystal display device of the double fail-turn structure according to another embodiment of the prior art, in the case of the double fail-turn structure, the space between the fail turn and the fail turn is blocked from the outside during the bonding process during the cell process. I can't get out.

Therefore, when the thin film transistor array substrate and the color filter substrate are bonded together, as shown in FIG. 4, the air 53 penetrates into the failure turns 43 and 45, resulting in a failure turn printing failure. The failure turn width becomes thinner and the failure turn occurs when the liquid crystal is injected, thereby causing a large number of injection defects, and also becomes very vulnerable when evaluating the reliability of the cell.

Accordingly, an object of the present invention is to provide a liquid crystal display device having a double failure turn structure that can prevent moisture penetration of a pad region.

In addition, another object of the present invention is to provide a liquid crystal display device having a double fail-turn structure that can improve the reliability of the cell by preventing a fail-turn failure.

According to an aspect of the present invention, there is provided a liquid crystal display device having a double fail-turn structure, comprising: a thin film transistor array substrate having gate lines and data lines intersecting each other; An image display unit defined in an area where the gate line and the data line cross each other; A first chamber pattern and a second chamber pattern which are formed to be spaced apart from each other and are provided with at least one air passage; A pad part disposed on the thin film transistor array substrate and formed to be adjacent to the first yarn pattern and the second yarn pattern; And a color filter substrate disposed on the first chamber pattern and the second chamber pattern including the image display unit and coupled to the thin film transistor array substrate.

In addition, a liquid crystal display device having a double fail-turn structure for achieving the object of the present invention, the thin film transistor array substrate is disposed to cross the gate wiring and data wiring; An image display unit defined in an area where the gate line and the data line cross each other; A thin film transistor unit formed in an area where the gate line and the data line cross each other; A first chamber pattern and a second chamber pattern which are formed to be spaced apart from each other and are provided with at least one air passage; A pad part disposed on the thin film transistor array substrate and formed to be adjacent to the first yarn pattern and the second yarn pattern; A color filter substrate disposed on the first chamber pattern and the second chamber pattern including the image display unit and coupled to the thin film transistor array substrate; And a liquid crystal layer filled in a space formed by combining the thin film transistor array substrate and the color filter substrate.

Hereinafter, a liquid crystal display of a double fail-turn structure according to the present invention will be described in detail with reference to the accompanying drawings.

FIG. 5 is a plan view illustrating a liquid crystal display device in which a double failure turn is formed according to a first embodiment of the present invention, and is a schematic view illustrating a case where a plurality of air passages are formed in a second seal pattern.

FIG. 6 is an enlarged schematic view of a portion “B” of FIG. 5 in a liquid crystal display device having a double failing turn according to a first embodiment of the present invention, in which air is drawn out through an air passage formed in a second seal pattern; Schematic diagram showing exiting.

As shown in FIG. 5A, the liquid crystal display device 100 according to the first embodiment of the present invention includes an image display unit 117 in which liquid crystal cells are arranged in a matrix form, and a gate line of the image display unit 117. And a gate pad portion 109 connected to the data lines and a data pad portion (not shown) connected to the data lines (not shown). Here, the gate pad part 109 and the data pad part (not shown) are formed in the edge region of the thin film transistor array substrate 101 which does not overlap the color filter substrate 115.

In addition, the gate pad unit 109 supplies a scan signal supplied from the gate driver integrated circuit to the gate lines of the image display unit 117, and the data pad unit (not shown) supplies an image supplied from the data driver integrated circuit. Information is supplied to the data lines of the image display unit 117.

Although not shown in the drawing, in the thin film transistor array substrate 101 of the image display unit 117, data lines to which image information is applied and gate lines to which a scan signal is applied are vertically intersected with each other, and the intersections thereof are provided. A thin film transistor (not shown) for switching the liquid crystal cells is formed on the substrate, and a pixel electrode (not shown) connected to the thin film transistor to drive the liquid crystal cell is formed on the front surface of the substrate.

In addition, the color filter substrate 115 of the image display unit 117 is formed on the color filter (not shown) applied separately to each cell region by a black matrix (not shown) and formed on the thin film transistor array substrate 101. A common transparent electrode (not shown) that is a counter electrode of the pixel electrode is formed.

In addition, first and second fail patterns 103 and 105 having a dual structure are formed outside the image display unit 117, and the thin film transistor array substrate 101 is formed by the fail turns 103 and 105. ) And the color filter substrate 115 are bonded to form a unit liquid crystal display panel. Here, the first and second failure turns 103 and 105 of the dual structure are spaced apart from the gate pad part 109 by a predetermined interval, and the first and second failure turns 103 and 105 of these double structures. Space portions 107 are formed therebetween, and air passages 107a are formed at both ends thereof so as to communicate with the outside.

In addition, a spacer (not shown) is disposed between the thin film transistor array substrate 101 and the color filter substrate 115 so that the cell-gap is maintained at regular intervals.

In this case, the description of the first and second failure turns is limited to the gate pad part, but the description of the data pad part is omitted since the same applies to the data pad part.

Therefore, according to the first embodiment of the present invention, the air passage 107a communicates with the outside between the first and second fail patterns 103 and 105 of the dual structure formed on the outer side of the image display unit 117. 6, the first and second fail turns are formed when the thin film transistor array substrate 101 and the color filter substrate 115 are bonded together by the fail turns 103 and 105. Since the air 113 between the spaces 107 between the patterns 103 and 105 exits through the air passage 107a, air that has not escaped to the outside as the conventional one digs into the failure turn part. It will not cause a printing failure of a failure turn.

Meanwhile, a liquid crystal display device having a double failure turn according to the second embodiment of the present invention will be described with reference to FIG. 7.

FIG. 7 is a plan view illustrating a liquid crystal display device in which a double failing turn is formed according to a second exemplary embodiment of the present invention. FIG. 7 is a schematic diagram illustrating a case where a plurality of air passages are formed in a second chamber pattern (ie, a second chamber pattern). .

As shown in FIG. 7, the liquid crystal display device 200 having the double fail-turn structure according to the second embodiment of the present invention includes an image display unit 217 in which liquid crystal cells are arranged in a matrix form, and an image display unit thereof. A gate pad portion 209 connected to the gate lines (not shown) of 217 and a data pad portion (not shown) connected to the data lines (not shown) are included. Here, the gate pad part 209 and the data pad part (not shown) are formed in an edge region of the thin film transistor array substrate 201 that does not overlap the color filter substrate 215.

In addition, the gate pad unit 209 supplies a scan signal supplied from a gate driver integrated circuit to the gate lines of the image display unit 217, and the data pad unit (not shown) supplies an image supplied from the data driver integrated circuit. Information is supplied to the data lines of the image display unit 217.

Although not shown in the drawing, in the thin film transistor array substrate 201 of the image display unit 217, data lines to which image information is applied and gate lines to which a scanning signal is applied are vertically intersected with each other, and the intersections thereof are provided. A thin film transistor (not shown) for switching the liquid crystal cells is formed on the substrate, and a pixel electrode (not shown) connected to the thin film transistor to drive the liquid crystal cell is formed on the front surface of the substrate.

In addition, color filter substrates 115 of the image display unit 217 are formed on the color filter substrates (not shown) separated and applied to each cell region by a black matrix (not shown), and formed on the thin film transistor array substrate 201. A common transparent electrode (not shown) that is a counter electrode of the pixel electrode is formed.

In addition, first and second fail patterns 203 and 205 having a dual structure are formed outside the image display unit 217, and the fail turns 203 and 205 form the thin film transistor array substrate 201. ) And the color filter substrate 215 are bonded together to form a unit liquid crystal display panel. In this case, a spacer (not shown) is disposed between the thin film transistor array substrate 201 and the color filter substrate 215 so that the cell-gap is maintained at regular intervals. Here, the first and second failure turns 203 and 205 of the dual structure are spaced apart from the gate pad part 209 by a predetermined interval, and the first and second failure turns 203 and 205 of these dual structures. Space portions 207 are formed therebetween, and air passages 207a are formed at both ends to communicate with the outside. In this case, the description of the first and second failure turns is limited to the gate pad part, but the description of the data pad part is omitted since the same applies to the data pad part.

In addition, a spacer (not shown) is disposed between the thin film transistor array substrate 201 and the color filter substrate 215 so that the cell-gap is maintained at regular intervals.

Accordingly, according to the second embodiment of the present invention, the space portion 207 between the first and second fail patterns 203 and 205 of the dual structure formed on the outer side of the image display portion 217 is external. A plurality of air passages 207a are formed in the second failure turn 205 so as to communicate with each other. As shown in FIG. 7, the thin film transistor array substrate is formed by the first and second failure turns 203 and 205. When the 201 and the color filter substrate 215 are bonded together, air between the space portions 207 between these first and second fail patterns 203 and 205 passes through the plurality of air passages 207a. By being able to easily escape to the outside, air that has not escaped to the outside does not dig into the failure turn part as in the past so as not to cause the printing failure of the failure turn.

In addition, a liquid crystal display device having a double failure turn structure according to a third embodiment of the present invention will be described with reference to FIG. 8 as follows.

FIG. 8 is a plan view illustrating a liquid crystal display device in which a double failure turn is formed according to a third exemplary embodiment of the present invention, and ends of a first yarn pattern (ie, an inner yarn pattern) and a second yarn pattern (ie, an outside yarn pattern). It is a schematic diagram which shows the case where the air path was formed in the.

As shown in FIG. 8, the liquid crystal display device 300 according to the third embodiment of the present invention includes an image display unit 317 in which liquid crystal cells are arranged in a matrix form, and a gate line of the image display unit 317. The gate pad part 309 is connected to the data pads (not shown) and the data pad part (not shown) is connected to the data lines (not shown). Here, the gate pad part 309 and the data pad part (not shown) are formed in the edge region of the thin film transistor array substrate 301 which does not overlap the color filter substrate 315.

In addition, the gate pad unit 309 supplies a scan signal supplied from a gate driver integrated circuit to the gate lines of the image display unit 317, and the data pad unit (not shown) supplies an image supplied from the data driver integrated circuit. The information is supplied to the data lines of the image display unit 317.

Although not shown in the drawing, in the thin film transistor array substrate 301 of the image display unit 317, data lines to which image information is applied and gate lines to which a scanning signal is applied are vertically intersected with each other. A thin film transistor (not shown) for switching the liquid crystal cells is formed at an intersection portion, and a pixel electrode (not shown) is connected to the thin film transistor to drive the liquid crystal cell on the front surface of the substrate.

In addition, the color filter substrate 315 of the image display unit 317 is formed on the color filter (not shown) coated separately by cell region by a black matrix (not shown) and formed on the thin film transistor array substrate 301. A common transparent electrode (not shown) that is a counter electrode of the pixel electrode is formed.

First and second seal patterns 303 and 305 having a dual structure are formed outside the image display unit 317, and the thin film transistor array substrate 301 is formed by the failure turns 303 and 305. ) And the color filter substrate 315 are bonded together to form a unit liquid crystal display panel. Here, the first and second failure turns 303 and 305 of the dual structure are spaced apart from the gate pad part 309 by a predetermined interval, and the first and second failure turns 303 and 305 of these double structures. Space portions 307 are formed therebetween, and air passages 307a are formed at both ends thereof so as to communicate with the outside. In this case, the description of the first and second failure turns is limited to the gate pad part, but the description of the data pad part is omitted since the same applies to the data pad part.

In addition, a spacer (not shown) is disposed between the thin film transistor array substrate 301 and the color filter substrate 315 so that the cell-gap is maintained at regular intervals.

Therefore, according to the third embodiment of the present invention, the air passage (2) to communicate with the outside to both sides of the first and second fail patterns (303, 305) of the dual structure formed on the outside of the image display unit 317 307a is formed, and the first and second fail turns are formed when the thin film transistor array substrate 301 and the color filter substrate 315 are bonded together by the first and second fail turns 303 and 305. Air 313 between the space portion 307 between the pattern, 303, 305 is to escape to the outside through the air passage 307a, the air that did not escape to the outside as the existing digging into the turn part There will be no case where a printing failure of a failure turn is caused.

In addition, a liquid crystal display device having a double failure turn according to a fourth embodiment of the present invention will be described with reference to FIG. 9.

FIG. 9 is a plan view illustrating a liquid crystal display device in which a double failing turn is formed according to a fourth exemplary embodiment of the present invention. FIG. 9 is a schematic diagram illustrating a case in which at least two air passages are formed in a second chamber pattern (outer chamber pattern).

As shown in FIG. 9, the liquid crystal display device 400 having the double fail-turn structure according to the fourth embodiment of the present invention includes an image display unit 417 in which liquid crystal cells are arranged in a matrix form, and an image display unit thereof. A gate pad portion 409 connected to the gate lines (not shown) of 417 and a data pad portion (not shown) connected to the data lines (not shown) are included. Here, the gate pad portion 409 and the data pad portion (not shown) are formed in the edge region of the thin film transistor array substrate 401 that does not overlap the color filter substrate 415.

In addition, the gate pad unit 409 supplies a scan signal supplied from a gate driver integrated circuit to the gate lines of the image display unit 417, and the data pad unit (not shown) is an image supplied from the data driver integrated circuit. Information is supplied to the data lines of the image display unit 417.

Although not shown in the drawing, in the thin film transistor array substrate 401 of the image display unit 417, data lines to which image information is applied and gate lines to which a scan signal is applied are vertically intersected with each other, and the intersections thereof are provided. A thin film transistor (not shown) for switching the liquid crystal cells is formed on the substrate, and a pixel electrode (not shown) connected to the thin film transistor to drive the liquid crystal cell is formed on the front surface of the substrate.

In addition, color filters (not shown) applied to the color filter substrate 415 of the image display unit 417 separated by cell regions by a black matrix (not shown) and formed on the thin film transistor array substrate 401. A common transparent electrode (not shown) that is a counter electrode of the pixel electrode is formed.

In addition, first and second fail patterns 403 and 405 having a dual structure are formed outside the image display unit 417, and the thin film transistor array substrate 201 is formed by the fail turns 403 and 405. ) And the color filter substrate 215 are bonded together to form a unit liquid crystal display panel. Here, the first and second failure turns 403 and 405 of the dual structure are spaced apart from the gate pad portion 409 by a predetermined interval, and the first and second failure turns 403 and 405 of these dual structures. The space portion 407 is formed therebetween, and both ends of the second failure turn 405 are connected to a part of the first thread pattern 403, and at least the second failure turn 405 communicates with the outside. Two air passages 407a are formed. In this case, the description of the first and second failure turns is limited to the gate pad part, but the description of the data pad part is omitted since the same applies to the data pad part.

In addition, a spacer (not shown) is disposed between the thin film transistor array substrate 401 and the color filter substrate 415 so that the cell-gap is maintained at regular intervals.

Therefore, according to the fourth embodiment of the present invention, the space portion 407 between the first and second fail patterns 403 and 405 of the dual structure formed on the outside of the image display portion 417 is external. At least two air passages 407a are formed in the second seal pattern 405 so as to be in contact with each other. As shown in FIG. 9, the thin film transistor array is formed by the first and second failure turns 403 and 405. When the substrate 401 and the color filter substrate 415 are bonded together, air between the space portions 407 between these first and second seal patterns 403 and 405 causes the two air passages 407a to be separated. Since it can be easily escaped to the outside through the air, the air that has not escaped to the outside does not penetrate into the failure turn portion, and thus does not cause a printing failure of the failure turn.

As described above, according to the liquid crystal display device having the double fail-turn structure according to the present invention, the first and second fail turns having the double structure formed on the outer side of the image display part adjacent to the pad part are formed. By forming an air passage in the second chamber pattern which is the second chamber pattern so that the space between the second failure turns communicates with the outside, the first and second failure turns when the thin film transistor array substrate and the color filter substrate are bonded together. Air between the spaces in between can easily escape to the outside through the air passage.

Therefore, the air, which has not escaped to the outside, does not dig into the failure turn part as in the past, thereby causing the printing failure of the failure turn.

Therefore, according to the present invention, it is possible to prevent the penetration of moisture from the pad area due to the application of the double failure turn structure at the time of failure turn formation, and through the air passage formed at the failure turn when the array substrate and the color filter substrate are bonded together. It is possible to easily escape the air between the failure turn to the outside to prevent the failure turn printing failure, there is an advantage to improve the reliability of the cell.

On the other hand, while described above with reference to a preferred embodiment of the present invention, those skilled in the art various modifications of the present invention without departing from the spirit and scope of the invention described in the claims below And can be changed.

Claims (14)

A thin film transistor array substrate on which the gate line and the data line cross each other; An image display unit defined in an area where the gate line and the data line cross each other; A first chamber pattern and a second chamber pattern which are formed to be spaced apart from each other and are provided with at least one air passage; A pad part disposed on the thin film transistor array substrate and formed to be adjacent to the first yarn pattern and the second yarn pattern; And And a color filter substrate disposed on the first chamber pattern and the second chamber pattern including the image display unit and coupled to the thin film transistor array substrate. The liquid crystal display device according to claim 1, wherein an air passage is provided between both ends of the second yarn pattern and the first yarn pattern. The liquid crystal display of claim 1, wherein the at least one air passage is formed in a second seal pattern disposed at the outermost portion of the image display unit. The liquid crystal display of claim 1, wherein the air passage is formed between both ends of the first yarn pattern and both ends of the second yarn pattern. The liquid crystal display of claim 1, wherein both ends of the second yarn pattern are connected to a portion of the first yarn pattern. 6. The liquid crystal display of claim 5, wherein at least one air passage is formed in the second seal pattern. The liquid crystal display of claim 1, wherein the at least one air passage is formed in a second seal pattern portion except for a portion corresponding to the pad portion. A thin film transistor array substrate on which the gate line and the data line cross each other; An image display unit defined in an area where the gate line and the data line cross each other; A thin film transistor unit formed in an area where the gate line and the data line cross each other; A first chamber pattern and a second chamber pattern which are formed to be spaced apart from each other and are provided with at least one air passage; A pad part disposed on the thin film transistor array substrate and formed to be adjacent to the first yarn pattern and the second yarn pattern; A color filter substrate disposed on the first chamber pattern and the second chamber pattern including the image display unit and coupled to the thin film transistor array substrate; And And a liquid crystal layer filled in a space formed by combining the thin film transistor array substrate and the color filter substrate. The liquid crystal display device according to claim 8, wherein an air passage is provided between both ends of the second yarn pattern and the first yarn pattern. 10. The liquid crystal display of claim 8, wherein the at least one air passage is formed in a second seal pattern disposed at the outermost portion of the image display unit. 10. The liquid crystal display of claim 8, wherein the air passage is formed between both ends of the first yarn pattern and both ends of the second yarn pattern. The liquid crystal display of claim 8, wherein both ends of the second yarn pattern are connected to a portion of the first yarn pattern. 13. The liquid crystal display of claim 12, wherein at least one air passage is formed in the second seal pattern. 10. The liquid crystal display of claim 8, wherein the at least one air passage is formed in a second seal pattern portion except for a portion corresponding to the pad portion.

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