KR20060103563A - Liquid crystal display device - Google Patents

Abstract

The present invention relates to a liquid crystal display device capable of preventing image degradation due to distortion of a common voltage.

According to an exemplary embodiment of the present invention, a liquid crystal display includes: a liquid crystal panel configured to display an image having a desired gray scale by adjusting light transmittance according to electric fields formed on pixel electrodes and a common electrode; a driving circuit unit driving the liquid crystal panel to generate a common voltage; And a common voltage compensating circuit for compensating the common voltage from the driving circuit unit and supplying the common voltage to the common electrode.

By such a configuration, the present invention can prevent image degradation due to horizontal stripes of the black pattern due to distortion of the common voltage, unevenness due to an increase in black brightness over time, flicker, and afterimages. .

Liquid Crystal Panel, Common Voltage, Buffer, Flexible Substrate

Description

Liquid crystal display {LIQUID CRYSTAL DISPLAY DEVICE}

1 is a view schematically showing a liquid crystal panel of a general liquid crystal display device.

2 is a diagram illustrating the polarity of a liquid crystal cell driven by a line inversion method.

3 is a driving waveform diagram of a common electrode and a gate line for driving a liquid crystal cell line inversion;

4 is a waveform diagram illustrating distortion of a common voltage due to a load of a general liquid crystal panel.

5 illustrates a liquid crystal display according to a first embodiment of the present invention.

FIG. 6 is a schematic view of the gate driver shown in FIG. 5; FIG.

FIG. 7 is a view schematically illustrating a data driver according to the first embodiment shown in FIG. 5.

FIG. 8 is a circuit diagram illustrating a common voltage compensation circuit according to the first embodiment shown in FIG. 5.

FIG. 9 is a waveform diagram illustrating a compensated common voltage supplied to a common electrode of the liquid crystal panel illustrated in FIG. 5.

FIG. 10 is a circuit diagram illustrating a common voltage compensation circuit according to the second embodiment of FIG. 5.

FIG. 11 is a view schematically illustrating a data driver according to the second embodiment shown in FIG. 5.

12 illustrates a liquid crystal display according to a second exemplary embodiment of the present invention.

<Explanation of Signs of Major Parts of Drawings>

2: liquid crystal 10: color filter substrate

12, 110: upper substrate 14: black matrix

16 color filter 18 common electrode

20: thin film transistor substrate 22, 120: lower substrate

24 pixel electrode 100 liquid crystal panel

130: driving circuit portion 140: gate driver

142: scan pulse generator 144, 244: voltage generator

146, 246: common voltage generator 150, 250: data driver

160: pad portion 170: flexible substrate

172, 272: common voltage compensation circuit 174, 176, 178, 274, 276: signal line

175: buffer 180: controller

182: control unit

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device capable of preventing image quality deterioration due to distortion of a common voltage.

In recent years, portable information terminals have tended to be miniaturized to be convenient for an individual to carry. The spread of mobile communication terminals such as mobile phones and PCS (Personal Communication System) is rapidly expanding as a portable information terminal, and a portable digital apparatus (PDA) or HPC having more functions than such a mobile communication terminal. (Hand Handled PC) is commercially available.

Meanwhile, liquid crystal displays and light emitting displays are mainly used as portable information terminals. In accordance with the trend of miniaturization of portable information terminals, liquid crystal display modules used as means for displaying images are also miniaturized.

The liquid crystal display displays an image by adjusting the light transmittance of the liquid crystal having dielectric anisotropy using an electric field. To this end, the liquid crystal display includes a liquid crystal panel displaying an image through a liquid crystal cell matrix and a driving circuit for driving the liquid crystal panel.

As shown in FIG. 1, the liquid crystal panel includes a color filter substrate 10 and a thin film transistor substrate 20 bonded together with the liquid crystal 2 interposed therebetween.

The color filter substrate 10 includes a black matrix 14, a color filter 16, and a common electrode 18 sequentially formed on the upper substrate 12.

The black matrix 14 is formed in a matrix form on the upper substrate 12. The black matrix 14 divides an area of the upper substrate 12 into a plurality of cell areas in which the color filter 16 is to be formed, and prevents light interference and external light reflection between adjacent cells.

The color filter 16 is formed to be divided into red (R), green (G), and blue (B) in the cell region divided by the black matrix 14 to transmit only the corresponding color.

The common electrode 18 is a transparent conductive layer which is entirely coated on the color filter 16, and supplies a common voltage (hereinafter referred to as common voltage Vcom) as a reference when driving the liquid crystal 2. An overcoat layer (not shown) may be further formed between the color filter 16 and the common electrode 18 to planarize the common electrode 18.

The thin film transistor substrate 20 includes a thin film transistor TFT and a pixel electrode 24 formed in each cell region defined by the gate line GL and the data line DL formed on the lower substrate 22.

The thin film transistor TFT supplies a data signal from the data line DL to the pixel electrode 24 in response to a scan pulse from the gate line GL.

The pixel electrode 24 is formed of a transparent conductive layer to receive the data signal from the thin film transistor TFT to drive the liquid crystal 2.

The liquid crystal 2 has dielectric anisotropy and rotates according to an electric field formed by a data signal supplied to the pixel electrode 24 and a common voltage Vcom supplied to the common electrode 18 to adjust light transmittance. To implement the image.

The liquid crystal panel is driven by an inversion method of inverting the polarity of the liquid crystal cell by a predetermined unit in order to prevent degradation of the liquid crystal and to improve display quality. In Inversion method, Frame Inversion, in which the polarity of the liquid crystal cell is inverted in units of frames, Line Inversion, in which the polarity of liquid crystal cells are inverted in units of horizontal lines, and Liquid crystal cells in units of vertical lines. Column Inversion, the polarity of which is inverted, and Dot Inversion, in which the polarity of the liquid crystal cell is inverted in units of liquid crystal cells, are used.

As shown in FIG. 2, the line inversion method of inverting the polarity of the liquid crystal cell in the horizontal line unit has an advantage in terms of power consumption compared with the column inversion and dot inversion methods. In the line inversion method, as shown in FIG. 3, the voltage of the data signal is inverted by inverting the polarity of the common voltage Vcom in units of horizontal synchronization periods in which the gate lines GL1, GL2, GL3,..., Respectively are driven. Because it can lower.

In a typical liquid crystal display, the common electrode 18 formed on the color filter substrate 10 forms a large parasitic capacitor together with the gate line GL, the data line DL, and the pixel electrode 24 of the thin film transistor substrate 20. There is a problem that the load is large. Since the load of the liquid crystal panel increases as the size of the liquid crystal panel increases or the resolution increases, the power supply at the output terminal of the common voltage Vcom cannot bear the load of the liquid crystal panel. Accordingly, as shown in FIG. 4, the common voltage Vcom waveform is distorted due to the load of the liquid crystal panel.

Accordingly, in general liquid crystal display devices, horizontal stripes of the black pattern due to distortion of the common voltage (Vcom) waveform, unevenness, flicker, and residual images due to the increase of black luminance over time There is a problem that the image quality is deteriorated.

Accordingly, an object of the present invention is to provide a liquid crystal display device capable of preventing a deterioration of image quality due to distortion of a common voltage.

In order to achieve the above object, a liquid crystal display according to an embodiment of the present invention is a liquid crystal panel for displaying an image of a desired gray scale by adjusting the light transmittance according to the electric field formed in the pixel electrode and the common electrode, and the liquid crystal panel And a common voltage compensating circuit for driving and generating a common voltage and a common voltage compensating circuit for compensating the common voltage from the driving circuit.

The liquid crystal display further includes a pad unit provided at one side of the liquid crystal panel, a controller unit for controlling the driving circuit unit, and a flexible substrate for electrically connecting the pad unit and the controller unit. .

The driving circuit unit in the liquid crystal display device includes a voltage generator for generating a driving voltage for driving the liquid crystal panel, a first voltage and a second voltage lower than the first voltage; And a common voltage generator configured to generate the common voltage inverted by one horizontal synchronization period unit of the liquid crystal panel using the first and second voltages.

In the liquid crystal display, the common voltage compensating circuit may be connected between a first voltage line supplied with the first voltage and a second voltage line supplied with the second voltage to generate a reference voltage by a resistance divided ratio. And a buffer for supplying the first and second voltages alternately to the common electrode by comparing the second resistor with the common voltage from the common voltage generator.

In the liquid crystal display, the common voltage compensating circuit may include a first transistor connected between a first voltage line to which the first voltage is supplied and a first node as an output terminal, and a gate electrode connected to a second node, and the second voltage. A second transistor connected between the supplied second voltage line and the first node and a gate electrode connected to the second node, and connected between the second node and the second voltage line and supplied with the common voltage; And a third transistor having a gate electrode connected to the input line.

In the liquid crystal display, the conduction type of the first transistor is different from the second and third transistors.

The driving circuit unit may further include a gate driver for driving the gate lines of the liquid crystal panel and a data driver for driving the data lines of the liquid crystal panel.

In the liquid crystal display, the voltage generator and the common voltage generator are embedded in any one of the gate driver and the data driver.

In the liquid crystal display, the common voltage compensating circuit is formed in one of a dummy region and a flexible substrate of the liquid crystal panel.

The common voltage output from the common voltage generator in the liquid crystal display may be supplied to the common electrode through the pad part, the flexible substrate, the common voltage compensation circuit, the flexible substrate, and the pad part.

In the liquid crystal display, the flexible substrate may be configured to supply a first signal line for supplying a common voltage input through the pad part to the common voltage compensation circuit and a compensated common voltage output from the common voltage compensation circuit to the pad part. And second and third signal lines.

The common voltage output from the common voltage generator in the liquid crystal display is supplied to a signal line formed in a dummy region of the liquid crystal panel, the common voltage compensating circuit, and the common electrode.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to FIGS. 5 to 12.

5 is a schematic view of a liquid crystal display according to a first embodiment of the present invention.

Referring to FIG. 5, the liquid crystal display according to the first exemplary embodiment of the present invention adjusts the light transmittance of the liquid crystal according to an electric field formed by a data signal supplied to the pixel electrode and a common voltage Vcom supplied to the common electrode. The liquid crystal panel 100 compensates for the liquid crystal panel 100 displaying an image of a desired gray scale, the driving circuit unit 130 for driving the liquid crystal panel 100, and the common voltage Vcom from the driving circuit unit 130. And a common voltage compensating circuit 172 for supplying to the circuit.

In addition, the liquid crystal display according to the first exemplary embodiment of the present invention includes a pad unit 160 provided on one side of the liquid crystal panel 100, a controller unit 180 for controlling the driving circuit unit 130, and a liquid crystal panel. A flexible substrate 170 is further provided to electrically connect the pad unit 160 and the controller unit 180 of the 100.

The liquid crystal panel 100 includes a color filter substrate and a thin film transistor substrate bonded to each other with a liquid crystal (not shown) therebetween.

The color filter substrate includes a black matrix 14, a color filter 16, and a common electrode 18 as illustrated in FIG. 1 sequentially formed on the upper substrate 110.

The black matrix 14 is formed in a matrix form on the upper substrate 110. The black matrix 14 divides an area of the upper substrate 110 into a plurality of cell areas in which the color filter 16 is to be formed, and prevents light interference and external light reflection between adjacent cells. The color filter 16 is formed to be divided into red (R), green (G), and blue (B) in the cell region divided by the black matrix 14 to transmit only the corresponding color.

The common electrode 18 is a transparent conductive layer which is entirely coated on the color filter 16, and supplies the common voltage Vcom as a reference when driving the liquid crystal in common. An overcoat layer (not shown) may be further formed between the color filter 16 and the common electrode 18 to planarize the common electrode 18.

The thin film transistor substrate includes a thin film transistor TFT and a pixel electrode (not shown) formed in each cell region defined by the gate line GL and the data line DL formed on the lower substrate 120.

The thin film transistor TFT supplies a data signal from the data line DL to the pixel electrode in response to a scan pulse from the gate line GL.

The pixel electrode is formed of a transparent conductive layer to receive a data signal from the thin film transistor TFT to drive the liquid crystal.

The liquid crystal panel 100 rotates the liquid crystal according to the electric field formed by the data signal supplied to the pixel electrode 24 and the common voltage Vcom supplied to the common electrode 18 to adjust the light transmittance of the desired grayscale. The image will be implemented.

The controller unit 180 includes a controller 182 for aligning source data supplied from the outside to be suitable for driving the liquid crystal panel 100 and controlling the driving circuit unit 130.

The controller 182 arranges the source data supplied from the outside to be suitable for driving the liquid crystal panel 100, and supplies the aligned data signal to the driving circuit unit 130 through the flexible substrate 170 and the pad unit 160. do. In addition, the controller 182 generates a gate control signal and a data control signal for controlling the driving circuit unit 130 and supplies the gate control signal and the data control signal to the driving circuit unit 130 through the flexible substrate 170 and the pad unit 160.

The flexible substrate 170 is electrically connected between the output unit of the controller unit 180 and the pad unit 160 to transfer data signals and control signals from the controller unit 180 to the pad unit 160. On the other hand, on the flexible substrate 170 to transmit the input power supplied from the outside to the pad unit (160). In addition, the common voltage compensation circuit 172 is mounted on the flexible substrate 170, and the common voltage Vcom input from the driving circuit unit 130 through the pad unit 160 is transferred to the common voltage compensation circuit 172. The first signal line 174 and the second signal line 176 and the third signal line 178 for transmitting the compensated common voltage Vcom output from the common voltage compensation circuit 172 to the pad unit 160. Include.

The pad unit 160 includes a plurality of pads electrically connected to the driving circuit unit 130 through a plurality of signal wires. The at least two pads of the plurality of pads are supplied with the common voltage Vcom compensated from the common voltage compensation circuit 172. The pad unit 160 is electrically connected to the flexible substrate 170 to transfer data signals, control signals, and input power from the flexible substrate 170 to the driving circuit unit 130, and compensated common voltage Vcom. Is transferred to the common electrode.

The driving circuit unit 130 includes a gate driver 140 for driving the gate lines GL and a data driver 150 for driving the data lines DL.

As illustrated in FIG. 6, the gate driver 140 generates a scan pulse generator 142 that generates a scan pulse SP according to a gate control signal GCS supplied from the controller 182 through the pad unit 160. The voltage generator 144 generates various voltages VDD, VGH, VGL, VH, and VL required for driving the liquid crystal panel 100 by using the input power Vin input through the pad 160. And a common voltage generator 146 for generating a common voltage Vcom by using the first and second voltages VH and VL from the voltage generator 144.

The voltage generator 144 uses the input power Vin input from the outside to generate the driving voltage VDD and the common voltage Vcom inverted at every horizontal synchronization period of the liquid crystal panel 100. The first and second voltages VH and VL and the gate high and low voltages VGH and VGL for generating the scan pulse SP are generated.

The common voltage generator 146 generates the common voltage Vcom which is inverted every one horizontal synchronization period by using the first and second voltages VH and VL from the voltage generator 144. In this case, the common voltage Vcom is supplied to the common voltage compensation circuit 172 through the pad unit 160 and the first signal line 174 of the flexible substrate 170.

The scan pulse generator 142 sequentially shifts the scan pulse SP by one horizontal synchronization period by using the gate control signal GCS, the gate high voltage VGH, and the gate low voltage VGL from the controller 182. ) Is supplied to the gate lines GL.

FIG. 7 is a diagram schematically illustrating a data driver 150 according to a first embodiment in a liquid crystal display according to an exemplary embodiment of the present invention.

Referring to FIG. 7 and FIG. 5, the data driver 150 may include a shift register 152 that sequentially generates a sampling signal, a sampling latch 154 that samples an input data signal RGB according to the sampling signal, Buffering the digital-analog converter (DAC) 156 for converting the digital data signal RGB latched from the sampling latch 154 into an analog data signal, and the analog data signal output from the digital-analog converter 156. And an output unit 158 that supplies the data lines DL.

The shift register 152 sequentially generates a sampling signal using the source start pulse SSP and the source shift clock SSC of the data control signal DCS from the controller 182.

The sampling latch 154 samples and latches the digital data signal RGB inputted from the control unit 182 in units of one horizontal line in synchronization with the sampling signal from the shift register 152.

The digital-to-analog converter 156 selects one of a plurality of gamma voltages supplied from a gamma voltage generator (not shown) as a gray scale voltage according to the latched digital data signal RGB from the sampling latch 154 and performs an analog signal. Generates a data signal.

The output unit 158 buffers one horizontal line of analog data signals supplied from the digital-analog converter 156 and supplies them to the data lines DL.

8 is a circuit diagram illustrating a common voltage compensating circuit 172 according to a first embodiment in a liquid crystal display according to an exemplary embodiment of the present invention.

Referring to FIG. 8, the common voltage compensating circuit 172 according to the first exemplary embodiment of the present disclosure may receive an input common voltage input from the common voltage generator 146 through the pad 160 and the first signal line 174. And a buffer 175 for compensating and outputting Vcom_in.

The common voltage Vcom_in from the common voltage generator 146 is input to the first input terminal of the buffer 175, and the reference voltage is input to the second input terminal. The output terminal of the buffer 175 is electrically connected to the second and third signal lines 176 and 178 of the flexible substrate 170.

The input common voltage Vcom_in is inverted into a first voltage level and a second voltage level in units of one horizontal synchronization period. The reference voltage is determined by the resistance divided ratios of the first and second resistors R1 and R2 electrically connected between the first voltage VH and the second voltage VL.

The buffer 175 outputs the first voltage VH when the voltage level of the input common voltage Vcom_in supplied to the first input terminal is greater than the reference voltage. On the other hand, the buffer 175 outputs the second voltage VL when the voltage level of the input common voltage Vcom_in supplied to the first input terminal is lower than the reference voltage.

Accordingly, in the common voltage compensation circuit 172, the input common voltage Vcom_in input from the common voltage generation unit 146 through the pad unit 160 and the first signal line 174 is a liquid crystal as shown in FIG. 9. The distortion caused by the load of the panel 100 is compensated for and output to the second and third signal lines 176 and 178 of the flexible substrate 170.

The compensated common voltage Vcom is supplied to one side of the common electrode of the upper substrate 110 through the second signal line 176, the pad 160, and the lower substrate 120 of the flexible substrate 170. The third signal line 178, the pad unit 160, and the lower substrate 120 of the substrate 170 are supplied to the other side of the common electrode of the upper substrate 110.

As described above, the liquid crystal display according to the first exemplary embodiment of the present invention uses the common voltage Vcom generated by the common voltage generator 146 embedded in the gate driver 140 as a pad unit (eg, the liquid crystal panel 100). After supplying to the common voltage compensation circuit 172 mounted on the flexible substrate 170 through the 160, and using the common voltage compensation circuit 172 to compensate for the distortion of the common voltage (Vcom), the compensated common voltage ( Vcom) is again supplied to the common electrode of the upper substrate 110 through the pad portion 160 and the lower substrate 120 of the liquid crystal panel 100. Accordingly, the liquid crystal display according to the exemplary embodiment of the present invention uses the common voltage compensating circuit 172 and the liquid crystal panel 100 according to the large parasitic capacitor together with the gate line GL, the data line DL, and the pixel electrode. The distortion of the common voltage Vcom due to the load of

Therefore, the liquid crystal display according to the first exemplary embodiment of the present invention prevents distortion of the common voltage Vcom even when the load of the liquid crystal panel 100 increases as the size of the liquid crystal panel 100 increases or the resolution increases. It is possible to prevent deterioration of image quality due to distortion of the common voltage Vcom.

10 is a circuit diagram illustrating the common voltage compensating circuit 272 according to the second embodiment in the liquid crystal display according to the first embodiment of the present invention.

Referring to FIG. 10 and FIG. 5, the common voltage compensating circuit 272 according to the second embodiment of the present invention may include a first voltage line VL1 to which a first voltage VH is supplied and a first node that is an output terminal. is connected between a P-type first transistor Q1 connected between n1 and a second voltage line VL2 and a first node n1 supplied with a second voltage VL lower than the first voltage VH. The N-type second transistor Q2, the resistor R connected to the first voltage line VL1 and the second node n2 serving as the gate electrode of the first transistor Q1, and the second voltage line VL2. ) And an N type third transistor Q3 connected between the second node n2. Here, the first to third transistors Q1, Q2, and Q3 may be Bipolar Junction Transistors or Metal Oxide Semiconductor Field Effect Transistors.

The source electrode of the P type first transistor Q1 is electrically connected to the first voltage line VL1, and the drain electrode is electrically connected to the first node n1. In addition, the gate electrode of the P-type first transistor Q1 is electrically connected to the second node n2. The first P-type transistor Q1 receives the first voltage VH supplied to the first voltage line VL1 through the first node n1 according to the voltage Vn2 on the second node n2. Outputs to the second and third signal lines 176 and 178.

The source electrode of the N type second transistor Q2 is electrically connected to the second voltage line VL1, and the drain electrode is electrically connected to the first node n1. In addition, the gate electrode of the N type second transistor Q2 is electrically connected to the second node n2. The N-type second transistor Q2 may receive the second voltage VL supplied to the second voltage line VL2 through the first node n1 according to the voltage Vn2 on the second node n2. Output to the second and third signal lines 176 and 178.

The source electrode of the N type third transistor Q3 is electrically connected to the second voltage line VL2, and the drain electrode is electrically connected to the second node n2. In addition, the gate electrode of the N type third transistor Q3 is electrically connected to the first signal line 174 of the flexible substrate 170. The third N-type transistor Q3 is supplied to the second voltage line VL2 according to the voltage level of the input common voltage Vcom_in input from the common voltage generator supplied to the first signal line 174. The voltage VL is supplied to the second node n2.

The operation of the common voltage compensation circuit 272 according to the second embodiment of the present invention will be described below.

When the voltage level of the input common voltage Vcom_in supplied to the first signal line 174 of the flexible substrate 170 from the common voltage generator is in a high state, the N type 3 transistor Q3 is turned on. The second voltage VL is supplied from the second voltage line VL2 to the second node n2 to become a low voltage level. Accordingly, the P-type first transistor Q1 is turned on by the voltage on the second node n2 while the N-type second transistor Q2 is turned off. Therefore, the first voltage VH from the first voltage line VL1 is supplied to the second node n2, that is, the output terminal through the P-type first transistor Q1, so that the common voltage Vcom is a high voltage. It becomes a level.

On the other hand, when the voltage level of the input common voltage Vcom_in supplied to the first signal line 174 of the flexible substrate 170 from the common voltage generator is low, the N-type 3 transistor Q3 is turned off to generate a first voltage. On the two nodes n2, the first voltage VH is supplied from the first voltage line VL1 to become a high voltage level. Accordingly, the P-type first transistor Q1 is turned off by the voltage on the second node n2 while the N-type second transistor Q2 is turned on. Accordingly, the second voltage n2, that is, the output terminal is supplied with the second voltage VL from the second voltage line VL2 through the N type second transistor Q2, so that the common voltage Vcom is a low voltage. It becomes a level.

The compensated common voltage Vcom output from the common voltage compensation circuit 272 according to the second embodiment of the present invention is the second signal line 176, the pad unit 160, and the lower substrate of the flexible substrate 170. The upper substrate 110 is supplied to one side of the common electrode of the upper substrate 110 through the third signal line 178, the pad unit 160, and the lower substrate 120 of the flexible substrate 170. It is supplied to the other side of the common electrode.

Accordingly, in the common voltage compensation circuit 272 according to the second embodiment of the present invention, as the size of the liquid crystal panel 100 increases or the resolution increases, the load of the liquid crystal panel 100 is increased as shown in FIG. 9. Even if is increased, it is possible to prevent distortion of the common voltage Vcom, thereby preventing deterioration in image quality due to distortion of the common voltage Vcom.

11 is a diagram schematically illustrating a data driver 250 according to a second embodiment in the liquid crystal display according to the first embodiment of the present invention.

Referring to FIG. 11 and FIG. 5, the data driver 150 according to the second embodiment includes a data signal generator 151 for supplying data signals to data lines DL of the liquid crystal panel 100, and a pad. A voltage generator 244 for generating various voltages VDD, VGH, VGL, VH, and VL required for driving the liquid crystal panel 100 by using the input power Vin input through the unit 160; The common voltage generator 246 generates a common voltage Vcom by using the first and second voltages VH and VL from the generator 244.

The data signal generator 151 includes a shift register 152 that sequentially generates a sampling signal, a sampling latch 154 that samples the data signal RGB input according to the sampling signal, and a latch from the sampling latch 154. A digital-analog converter (DAC) 156 for converting the converted digital data signal RGB into an analog data signal, and buffering the analog data signal output from the digital-analog converter 156 to the data lines DL. And an output unit 158 for supplying to the.

Since the data signal generator 151 has the same configuration as the data driver 150 according to the first embodiment shown in FIG. 7, a detailed description thereof will be replaced with the above description.

The voltage generator 244 and the common voltage generator 246 have the same configuration as the voltage generator 144 and the common voltage generator 146 embedded in the gate driver 140 illustrated in FIG. 6. The detailed description will be replaced with the above description.

12 is a schematic view of a liquid crystal display according to a second embodiment of the present invention.

Referring to FIG. 12, the liquid crystal display according to the second exemplary embodiment of the present invention adjusts a light transmittance according to an electric field formed by a data signal supplied to a pixel electrode and a common voltage Vcom supplied to a common electrode, and a desired gray scale. A liquid crystal panel 100 for displaying an image of the liquid crystal display, a driving circuit unit 130 for driving the liquid crystal panel 100, and a common voltage Vcom from the driving circuit unit 130. A common voltage compensating circuit 272 for compensating and supplying the liquid crystal panel 100 is provided.

In addition, the liquid crystal display according to the second exemplary embodiment of the present invention includes a pad unit 160 provided on one side of the liquid crystal panel 100, a controller unit 180 for controlling the driving circuit unit 130, and a liquid crystal panel. A flexible substrate 170 is further provided to electrically connect the pad unit 160 and the controller unit 180 of the 100.

The liquid crystal display according to the second exemplary embodiment of the present invention has the same components as the liquid crystal display according to the first exemplary embodiment of FIG. 5 except for the common voltage compensation circuit 272. . Accordingly, in the liquid crystal display according to the second embodiment of the present invention, descriptions of other components except for the common voltage compensation circuit 272 will be replaced with the description of the first embodiment of the present invention. .

The common voltage compensating circuit 272 is formed on one side of the lower substrate 120 to compensate for the common voltage input from the driving circuit unit 130 to supply the common voltage to the common electrode of the upper substrate 110.

To this end, the common voltage compensation circuit 272 may be configured as a buffer as shown in FIG. 8 or a plurality of transistors as shown in FIG. 10, and the detailed description thereof will be described with reference to FIGS. 8 and FIG. 10 A description of each will be replaced.

The common voltage compensation circuit 272 may be formed in the dummy region of the lower substrate 120 at the same time as the thin film transistor TFT of the lower substrate 120 is formed.

Accordingly, the common voltage compensation circuit 272 prevents distortion of the common voltage Vcom even if the load of the liquid crystal panel 100 increases as the size of the liquid crystal panel 100 increases or the resolution increases. ) Can prevent image quality deterioration.

As described above, the liquid crystal display according to the second exemplary embodiment of the present invention can simplify the assembling process of the liquid crystal display by forming the common voltage compensation circuit 272 on the liquid crystal panel 100.

On the other hand, the liquid crystal display according to the embodiment of the present invention described above is preferably applied to a small liquid crystal display including a portable information terminal; Furthermore, the present invention can be applied to a medium-size liquid crystal display device including a computer monitor or the like or a large liquid crystal display device for a television.

As described above, the liquid crystal display according to an exemplary embodiment of the present invention prevents distortion of the common voltage by increasing output characteristics of the common voltage even if the size of the liquid crystal panel increases or the load of the liquid crystal panel increases as the resolution increases. .

Therefore, the present invention can prevent image degradation due to horizontal stripes of the black pattern due to the distortion of the common voltage, unevenness due to an increase in the black luminance over time, flicker, and afterimages.

On the other hand, the present invention described above is not limited to the above-described embodiment and the accompanying drawings, it is possible that various substitutions, modifications and changes within the scope without departing from the technical spirit of the present invention It will be evident to those of general knowledge.

Claims (12)

A liquid crystal panel which displays an image having a desired gray scale by adjusting light transmittance according to an electric field formed in the pixel electrode and the common electrode; A driving circuit unit driving the liquid crystal panel and generating a common voltage; And a common voltage compensating circuit for compensating the common voltage from the driving circuit unit and supplying the common voltage to the common electrode. The method of claim 1, A pad unit provided at one side of the liquid crystal panel; A controller unit for controlling the driving circuit unit; And a flexible substrate for electrically connecting the pad portion and the controller portion. The method of claim 2, The driving circuit unit, A voltage generator for generating a driving voltage required for driving the liquid crystal panel, a first voltage and a second voltage lower than the first voltage; And a common voltage generator configured to generate the common voltage inverted by one horizontal synchronizing period unit of the liquid crystal panel by using the first and second voltages. The method of claim 3, wherein The common voltage compensation circuit, First and second resistors connected between a first voltage line supplied with the first voltage and a second voltage line supplied with the second voltage to generate a reference voltage by a resistance voltage division ratio; And a buffer configured to compare the common voltage from the common voltage generator with the reference voltage and alternately supply the first and second voltages to the common electrode. The method of claim 3, wherein The common voltage compensation circuit, A first transistor connected between a first voltage line supplied with the first voltage and a first node which is an output terminal, and a gate electrode connected to a second node; A second transistor connected between a second voltage line to which the second voltage is supplied and the first node, and a gate electrode connected to the second node; And a third transistor connected between the second node and the second voltage line and having a gate electrode connected to an input line to which the common voltage is supplied. The method of claim 5, And the conduction type of the first transistor is different from the second and third transistors. The method of claim 3, wherein The driving circuit unit, A gate driver for driving gate lines of the liquid crystal panel; And a data driver for driving data lines of the liquid crystal panel. The method of claim 7, wherein And the voltage generator and the common voltage generator are embedded in one of the gate driver and the data driver. The method of claim 3, wherein And the common voltage compensation circuit is formed in one of a dummy region and a flexible substrate of the liquid crystal panel. The method of claim 9, And the common voltage output from the common voltage generator is supplied to the common electrode through the pad part, the flexible substrate, the common voltage compensation circuit, the flexible substrate, and the pad part. The method of claim 10, The flexible substrate, A first signal line for supplying a common voltage input through the pad part to the common voltage compensation circuit; And second and third signal lines supplying the compensated common voltage output from the common voltage compensating circuit to the pad part. The method of claim 9, And the common voltage output from the common voltage generator is supplied to a signal line formed in a dummy region of the liquid crystal panel, the common voltage compensating circuit, and the common electrode.

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