KR20060072827A - A method for filling contact-hole of semiconductor device using the epitaxial process - Google Patents

Abstract

The present invention relates to a method for filling contact holes in a semiconductor device using an epitaxial process to fill contact holes in a semiconductor device. A method for filling a contact hole in a semiconductor device using an epitaxial process according to the present invention includes: a) forming a gate oxide film, a gate, a spacer, and a source / drain on a semiconductor substrate on which a device isolation film is formed; b) depositing an intermetallic material on the exposed front surface; c) forming a first contact pattern and forming a first contact hole only over the source / drain; d) epitaxially growing the source / drain top using a first epitaxial process to form a first epitaxial layer filling the depth of the first contact hole; e) forming a second contact pattern and forming a second contact hole on the gate; f) epitaxially growing a top of the gate using a second epitaxial process to form a second epitaxial layer filling the depth of the second contact hole; And g) forming silicide on the source / drain / gate through the first and second contact holes. According to the present invention, by performing contact gap filling using an epitaxial film, it is not necessary to use many processes for tungsten gap filling, thereby reducing the manufacturing cost and shortening the processing time of the semiconductor device. have.

Epitaxial, contact hole, gap filled, silicide

Description

A method for filling contact-hole of semiconductor device using the epitaxial process

1 is a diagram illustrating a semiconductor device in which a contact according to the related art is formed.

FIG. 2 is a diagram illustrating a semiconductor device filled with a contact hole using an epitaxial process according to an embodiment of the present invention.

3A to 3M are diagrams illustrating a contact hole filling method of a semiconductor device using an epitaxial process according to an exemplary embodiment of the present invention.

The present invention relates to a method for filling a contact hole in a semiconductor device using an epitaxial process, and more particularly, to a semiconductor device using an epitaxial process for filling a contact hole using an epitaxial process when filling a contact gap of a semiconductor device. It relates to a contact hole filling method.

In the conventional method, a contact hole filling method of a semiconductor device performs PSG deposition after forming silicide in a source / drain / gate portion, performs PSG CMP, and then performs mask and etching for forming a contact pattern. . Next, a contact metal barrier is deposited and then contact gap filling is performed using tungsten (W).

1 is a diagram illustrating a semiconductor device in which a contact according to the related art is formed.

Referring to FIG. 1, a gate 114 is formed on a Si-substrate 111 on which an isolation layer 112 is formed, and ions are implanted to form a source / drain (or drain) in an active region of the Si-substrate 111. 116 is formed, and then a silicide 117 is formed on the source / drain 116 and the gate 114. Thereafter, the PSG 118 is deposited, the PSG CMP is performed, and then, a mask and an etching for forming a contact pattern are performed. Next, the contact metal barrier 119 is deposited, and then contact gap filling is performed using tungsten 120. Here, reference numeral 113 denotes a gate oxide film and 115 denotes a spacer formed on both sidewalls of the gate 114.

However, the contact forming method of the semiconductor device according to the prior art has a contact metal barrier and a contact gap to be filled in the contact hole as the scale of the semiconductor device becomes smaller and the contact hole becomes smaller and the depth of the contact hole increases. When filling, there is a problem in that gap filling does not occur well.

An object of the present invention for solving the above problems is to provide a contact filling method of a semiconductor device using an epitaxial process that can fill the contact hole using an epitaxial film as a contact gap filling material.

As a means for achieving the above object, a contact hole filling method of a semiconductor device using an epitaxial process according to the present invention,

a) sequentially forming a gate oxide film, a gate, and a spacer on the semiconductor substrate on which the device isolation film is formed, and implanting ions into an active region of the semiconductor substrate to form a source / drain;

b) depositing intermetallic material (PSG) on the exposed front surface;

c) forming a first contact pattern on the intermetallic material, and etching to form a first contact hole only on the source / drain;

d) epitaxially growing the source / drain top using a first epitaxial process to form a first epitaxial layer filling the depth of the first contact hole;

e) forming a second contact pattern on the intermetallic material, and etching according to forming a second contact hole on the gate;

f) epitaxially growing an upper portion of the gate using a second epitaxial process to form a second epitaxial layer filling the depth of the second contact hole; And

g) forming silicide on the source / drain / gate through the first and second contact holes

Characterized in that it comprises a.

Here, the deposition conditions of the first epitaxial layer of step d) is characterized in that the distribution of the resistance and impurities of the source / drain is the same so that no problem occurs during subsequent contact formation.

Here, in the first epitaxial layer of step d), when the source / drain is N-type, the impurity factor is PH ₃ or AsH ₃ , and when the source / drain is P-type, the impurity factor is B _2. It is characterized in that H ₆ .

The second epitaxial layer of step f) may have an impurity factor of PH ₃ or AsH ₃ when the gate is N-type, and an impurity factor of B ₂ H ₆ when the gate is P-type. It features.

Here, the epitaxial process of step d) and f) is carried out at a temperature of 700 ~ 1200 ℃, characterized in that proceeds to a pressure of reduced pressure (Atmospheric: 760 Torr) or greater than 20 Torr (Reduced Pressure).

Here, the epitaxial process of steps d) and f) is characterized by using TCS (SiHCl ₃ ) as the atmosphere gas.

Here, the second epitaxial process of step f) is characterized in that the impurity concentration is equal to the concentration of the gate.

Here, the silicide of step g) is formed by depositing titanium (Ti).

Here, the thickness of the silicide of step g) is 300 to 600Å, the silicide of step g) is characterized in that it is formed at a process temperature of 300 to 600 ℃.

According to the present invention, by performing the contact gap filling using the epitaxial film, it is not necessary to use many processes performed for the conventional tungsten gap filling, thereby reducing the manufacturing cost of the semiconductor device, the process time Can shorten.

Hereinafter, a method of filling a contact hole in a semiconductor device using an epitaxial process according to an exemplary embodiment of the present invention will be described.

Embodiments of the present invention disclose a contact hole filling method of a semiconductor device using an epitaxial process that does not require a conventional silicide formation and tungsten gap filling process by performing contact gap filling using an epitaxial film.

Here, epitaxial growth refers to growing a single crystal thin film on the silicon substrate surface with the same crystal structure along the substrate crystal axis. Generally, epitaxial growth starts at a high temperature of about 900 to 950 ° C. When the temperature decreases, polycrystalline film growth occurs. In this case, the semiconductor substrate is mostly silicon, and an insulating single crystal plate is also used. In this case, a crystal orientation in which the silicon lattice constant and the substrate material coincide must be selected.

2 is a diagram illustrating a semiconductor device filled with a contact hole using an epitaxial process according to an embodiment of the present invention.

Referring to FIG. 2, a semiconductor device filled with a contact hole using an epitaxial process according to an exemplary embodiment of the present invention may include a gate 216 ′ on a Si-substrate 211 on which an isolation layer (STI) 214 is formed. And a source / drain 218 implanted with ions into an active region on the Si-substrate 211, and is used to separate the gate layer 216 'and the metal layer to be subsequently formed. Depositing a PSG 219 film and forming a contact pattern on the PSG film 219 to form a first contact hole in the source / drain 218 and a second contact hole on the gate 216 ' These are formed, respectively.

In addition, a first epitaxial layer 220 epitaxially grown on the source / drain 218 is formed using a first epitaxial process, wherein the first epitaxial layer 220 is formed on the first epitaxial layer 220. Since the contact hole depth is formed, the first contact hole is primarily filled.

In addition, a second epitaxial layer 221 is formed by epitaxially growing an upper portion of the gate 216 'using a second epitaxial process, wherein the second epitaxial layer 221 is formed in the second contact. By forming the hole to a depth, the second contact hole is secondarily filled.

In addition, silicides 222 are formed on the first and second epitaxial layers 220 and 221. Here, reference numeral 215 'denotes a gate oxide film, and reference numeral 217 denotes a spacer.

Therefore, in the semiconductor device filled with the contact hole using the epitaxial process according to the embodiment of the present invention, the contact gap on the source / drain is firstly filled using the first epitaxial process, and the second epitaxial process. Is used to secondary fill the contact gap on the gate.

3A to 3M are diagrams illustrating a method for filling a contact hole in a semiconductor device using an epitaxial process according to an exemplary embodiment of the present invention.

In the method of filling a contact hole of a semiconductor device using an epitaxial process according to an embodiment of the present invention, referring to FIG. 3A, a pad oxide film 212 and a pad nitride film (SiN) 213 are deposited on a semiconductor substrate 211. Is carried out. Specifically, the pad oxide film 212 is usually formed to a thickness of 100 to ₃₀₀ kPa, and then the SiN 213 is formed to a thickness of 1000 to 3000 kPa by the reaction of SiH ₂ Cl ₂ + NH ₃ gas on the pad oxide film 213. Form.

Next, referring to FIG. 3B, a moat pattern, which is a mask pattern for forming a shallow trench isolation layer STI, is formed, and etching is performed according to the mask pattern. Here, reference numeral A denotes an etching portion on the semiconductor substrate 211. Specifically, a mask pattern for forming an STI is formed on the pad nitride layer 213, and the pad nitride layer 213, the pad oxide layer 212, and the semiconductor substrate 211 are etched.

Next, referring to FIG. 3C, an STI oxide film is filled in the etching portion A to form an STI 214. Specifically, the film is formed by depositing an STI oxide film on the etching portion A to form the STI, and using thermal oxidation to enhance the characteristics of the oxide film. Dense), followed by CMP.

Next, referring to FIG. 3D, the SiN 213 is stripped. Specifically, the SiN 213 formed in the active region on the semiconductor substrate 211 is stripped by a wet method or a dry method.

Next, referring to FIG. 3E, the gate oxide film 215 and the gate poly 216 are sequentially formed on the exposed entire surface. Specifically, the gate oxide film 215 is generally formed in a wet or dry manner on the exposed entire surface of about 50 to 300 kV, and then the gate poly 216 to be used as the gate electrode is deposited to have a thickness of 2000 kPa to 3000 kPa. Here, the pad oxide film 212 is changed to the gate oxide film 215 by wet or dry oxidation.

Next, referring to FIG. 3F, after the gate oxide layer 215 and the gate poly 216 are partially removed by patterning and etching, the gate oxide layer 215 ′ and the gate 216 ′ are formed by implanting ions. The nitride layer is deposited on sidewalls of both sides of the gate 216 ', and the spacer 217 is formed by etching the nitride layer.

Next, referring to FIG. 3G, a source / drain is formed by implanting ions using an ion implanter, and using a rapid thermal oxidation process (RTP) or a furnace (furnace) equipment to activate the source / drain. Conduct thermal diffusion.

Next, referring to FIG. 3H, PSG 219 is deposited and CMP planarization is performed on the exposed front surface. Specifically, a PSG 219 film is deposited to separate the gate 216 'portion and the metal layer to be subsequently formed, followed by CMP for planarization.

Next, referring to FIG. 3I, a first contact pattern is formed on the PSG 219 and etched to form a first contact hole only on the source / drain 218. Here, reference numeral B denotes a contact hole.

Next, referring to FIG. 3J, a first epitaxial layer 220 is epitaxially grown on the top of the source / drain 218 by using a first epitaxial process to fill the depth of the first contact hole. Form.

Here, the epitaxial deposition uses an impurity material suitable for the characteristics of the NMOS or PMOS, and also as a process condition, the source / drain resistance and the impurity distribution are the same so that no problem occurs during the formation of a subsequent contact. Proceed to

For N-type sources / drains, the impurity factor is usually PH ₃ or AsH ₃ , and for P-type sources / drains, the impurity factor is usually B ₂ H ₆ .

In this case, the first epitaxial process is carried out at a temperature of 700 ~ 1200 ℃, proceeds to a pressure of reduced pressure (Atmospheric: 760 Torr) or greater than 20 Torr (Reduced Pressure), and also as the atmosphere gas TCS (SiHCl ₃ ) Will be used.

Next, referring to FIG. 3K, a second contact pattern is formed on the intermetallic material 219, and etching is performed to form a second contact hole in the upper portion of the gate 216 ′. Here, reference numeral C denotes a contact hole.

Next, referring to FIG. 3L, the upper part of the gate is epitaxially grown using a second epitaxial process to form a second epitaxial layer 221 filling the depth of the second contact hole. At this time, the impurity concentration is equal to the concentration of the gate 216 '.

In the case of an N-type gate, the impurity factor is usually PH ₃ or AsH ₃ , and in the case of the P-type gate, the impurity factor is usually B ₂ H ₆ .

At this time, the second epitaxial process is carried out at a temperature of 700 ~ 1200 ℃, the atmospheric pressure (Atmospheric: 760 Torr) or a pressure of reduced pressure (Reduced Pressure) greater than 20 Torr, and proceeds to the atmosphere gas TCS (SiHCl ₃ ) Will be used.

Next, referring to FIG. 3M, silicide 222 is formed on the source / drain / gate through the first and second contact holes. At this time, the silicide 222 is made of titanium (Ti), the silicide deposition temperature is 350 ~ 500 ℃, the thickness of the silicide 222 is carried out to about 300 ~ 600Å.

As a result, the method for filling a contact hole in a semiconductor device according to an exemplary embodiment of the present invention primarily fills a contact gap on a source / drain using a first epitaxial process and contacts on a gate using a second epitaxial process. Secondary gaps are filled.

While the invention has been shown and described in connection with specific embodiments thereof, it will be appreciated that various modifications and changes can be made without departing from the spirit and scope of the invention as indicated by the claims. Anyone who owns it can easily find out.

According to the present invention, by performing the contact gap filling using the epitaxial film, it is not necessary to use many processes performed for the conventional tungsten gap filling, thereby reducing the manufacturing cost of the semiconductor device, the process time Can shorten.

Claims (13)

a) sequentially forming a gate oxide film, a gate, and a spacer on the semiconductor substrate on which the device isolation film is formed, and implanting ions into an active region of the semiconductor substrate to form a source / drain; b) depositing intermetallic material (PSG) on the exposed front surface; c) forming a first contact pattern on the intermetallic material, and etching to form a first contact hole only on the source / drain; d) epitaxially growing the source / drain top using a first epitaxial process to form a first epitaxial layer filling the depth of the first contact hole; e) forming a second contact pattern on the intermetallic material, and etching according to forming a second contact hole on the gate; f) epitaxially growing an upper portion of the gate using a second epitaxial process to form a second epitaxial layer filling the depth of the second contact hole; And g) forming silicide on the source / drain / gate through the first and second contact holes Contact hole formation method of a semiconductor device using an epitaxial process comprising a. The method of claim 1, The deposition condition of the first epitaxial layer of step d) is performed such that the resistance of the source / drain and the distribution of impurities are made equal so that a problem does not occur during subsequent contact formation. Contact hole filling method of a semiconductor device. The method of claim 1, The first epitaxial layer of step d) is the impurity factor is PH ₃ or AsH ₃ when the source / drain is N-type, the contact hole filling method of a semiconductor device using an epitaxial process. The method of claim 1, The method of claim ₁ , wherein the impurity factor is B ₂ H ₆ when the source / drain of the first epitaxial layer is P-type. The method of claim 1, In the second epitaxial layer of step f), when the gate is N-type, the impurity factor is PH ₃ or AsH ₃ , characterized in that the contact hole filling method of a semiconductor device using an epitaxial process. The method of claim 1, In the second epitaxial layer of step f), when the gate is P-type, the impurity factor is B ₂ H ₆ , characterized in that the contact hole filling method of a semiconductor device using an epitaxial process. The method of claim 1, The method of filling a contact hole of a semiconductor device using an epitaxial process, characterized in that the epitaxial process of step d) and f) is carried out at a temperature of 700 ~ 1200 ℃. The method of claim 1, The method of filling contact holes of a semiconductor device using an epitaxial process, wherein the epitaxial process of steps d) and f) is performed at a reduced pressure greater than atmospheric pressure (Atmospheric: 760 Torr) or 20 Torr. The method of claim 1, The epitaxial process of steps d) and f) is a contact hole filling method of a semiconductor device using an epitaxial process, characterized in that using the TCS (SiHCl ₃ ) as the atmosphere gas. The method of claim 1, The second epitaxial process of the step f) is a contact hole filling method of a semiconductor device using an epitaxial process, characterized in that the impurity concentration is equal to the concentration of the gate. The method of claim 1, The silicide of step g) is a contact hole filling method of a semiconductor device using an epitaxial process, characterized in that formed by depositing titanium (Ti). The method of claim 1, The thickness of the silicide of the step g) is 300 to 600 Å contact hole filling method of a semiconductor device using an epitaxial process. The method of claim 1, Method for filling a contact hole of a semiconductor device using an epitaxial process, characterized in that the silicide of step g) is formed at a process temperature of 300 ~ 600 ℃.

Images