KR20060063245A - Driving method of plasma display panel - Google Patents

Abstract

An object of the present invention is to provide a method of driving a plasma display panel which reduces a peak current flowing through an address electrode during address discharge.

In order to achieve the above object, the present invention provides an image for a plasma display panel in which the scan and sustain electrode lines are parallel to each other, and the address electrode lines cross with respect to the scan and sustain electrode lines, and discharge cells are partitioned. The unit frame is divided into a plurality of subfields having different gray scale weights, and each subfield includes a reset period in which discharge cells are initialized, an address period in which discharge cells to be turned on among discharge cells are selected, and gray levels in the selected discharge cells. In the driving method of the plasma display panel is divided into the sustain period during which the sustain discharge is performed according to the weight,

In the address period, a scanning pulse is sequentially applied to the scan electrode lines, the address electrode lines are divided into a plurality of blocks, and a display time signal is applied to the address electrode lines with a predetermined time difference for each block. A driving method of a display panel is provided.

Description

Driving method of plasma display panel {Driving method of plasma display panel}

1 is a view briefly showing an electrode arrangement of a plasma display panel having a conventional three-electrode structure.

2 is a block diagram showing a driving apparatus for driving a plasma display panel having a conventional three-electrode structure.

3 is a circuit diagram illustrating a Y driver and an X driver of the driving apparatus shown in FIG. 2.

4 is a timing diagram showing a driving signal for driving a plasma display panel having a conventional three-electrode structure.

FIG. 5 is a timing diagram showing in detail a driving signal and a displacement current in the address period of FIG. 4.

FIG. 6 is a diagram illustrating the path of the displacement current of FIG. 5 in the circuit of FIG. 3.

7 is a diagram illustrating dividing address electrode lines into three blocks in order to apply the driving method of the present invention.

FIG. 8 is a timing diagram illustrating application of a display data signal with a predetermined time difference for each block in an address period according to an embodiment of the present invention.

9 is a timing diagram illustrating a driving signal to which the driving method of FIG. 8 is applied.

FIG. 10 is a timing diagram illustrating the application of a display data signal with a predetermined time difference for each block in an address period according to another embodiment of the present invention.

FIG. 11 is a timing diagram illustrating a driving signal to which the driving method of FIG. 10 is applied.

Explanation of symbols on the main parts of the drawings

A1, ..., Am ... address electrode lines,

Y1, ..., Yn ... scanning electrode lines,

X1, ..., Xn ... holding electrode lines,

B1, B2, B3 ... first, second, third block,

Ab1, Ab2, Ab3 ... address electrode lines of the first, second and third blocks,

Id ... displacement current, d1, d2 ... first, second time difference of FIG. 8,

Wa ... the pulse width of the display data signal of Fig. 8,

Wy ... pulse width of the scanning pulse of Fig. 8,

Wb1, Wb2, Wb3 ... pulse widths of the display data signals of the first, second, and third blocks of FIG.

d3, d4 ... the first and second time difference of FIG. 10,

Vs ... first voltage, Vset .. second voltage,

Vset + Vs ... third voltage, Vnf ... fourth voltage,

Vsch ... fifth voltage, Vscl ... sixth voltage,

Va ... seventh voltage, Vb ... bias voltage.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of driving a plasma display panel, and more particularly, to a method of driving a plasma display panel which reduces a peak current flowing to an address electrode during address discharge.

Recently, a plasma display panel, which is drawing attention as a replacement of a conventional cathode ray tube display device, is discharged after a discharge gas is filled between two substrates on which a plurality of electrodes are formed. The phosphor formed in a predetermined pattern by the ultraviolet rays is excited to obtain a desired image.

1 is a view briefly showing an electrode arrangement of a plasma display panel having a conventional three-electrode structure. Referring to the drawings, scan electrode lines Y1, ..., Yn and sustain electrode lines X1, ..., Xn are arranged side by side in parallel, and address electrode lines A1, ... .Am is arranged to intersect the scan electrode lines Y1, ..., Yn and the sustain electrode lines X1, ..., Xn, and the intersecting area divides the discharge cell Ce. .

2 is a block diagram showing a driving apparatus for driving a plasma display panel having a conventional three-electrode structure. The driving apparatus of the plasma display panel includes an image processing unit 100, a logic control unit 102, a Y driving unit 104, an address driving unit 106, an X driving unit 108, and a plasma display panel 1. The image processing unit 100 converts an external image signal from the outside and outputs it as an internal image signal, and the logic controller 102 receives an internal image signal, respectively, an address driving control signal SA and a Y driving control signal ( SY and the X driving control signal SX are output, and the Y driving unit 104, the address driving unit 106, and the X driving unit 108 receive driving control signals, respectively, and scan electrodes and addresses of the plasma display panel 1. A driving signal is output to each of the electrode and the sustain electrode.

3 is a circuit diagram illustrating a Y driver and an X driver of the driving apparatus shown in FIG. 2. The driving circuit of Fig. 3 is largely divided into a Y driver 104, an X driver 108, and a panel. Here, the panel is represented by the panel capacitor Cp in accordance with the circuit diagram. The panel capacitor Cp includes the scan electrode Cp 1, the sustain electrode Cp 2, and the address electrode Cp 3. The Y driving unit 104 has a sustain discharge voltage (Vs), a rising maximum voltage (Vset + Vs), a falling minimum voltage (Vnf), a scan high voltage (Vsch), and a scan low voltage (Vscl) at the scan electrode (Cp 1). And a ground voltage Vg. The sustain discharge voltage (Vs) is through the Ys, Ypp, Ynp, and scl switches. The scan high voltage Vsch is applied through the sch switch, the scan low voltage Vscl is applied through the scl switch, and the ground voltage Vg is applied through the Yg, Ypp, Ynp, and scl switches. On the other hand, the Y driver includes a Y energy recovery circuit 302 in order to reduce energy consumption when the sustain discharge voltage Vs and the ground voltage Vg are alternately applied to the scan electrode Cp.

The X driver 108 applies a sustain discharge voltage Vs, a ground voltage Vg, and a bias voltage Vb to the sustain electrode Cp of the panel. The sustain discharge voltage Vs is applied through the Xs and Xpp switches, the ground voltage Vg is applied through the Xg and Xpp switches, and the bias voltage Vb is applied through the Xb switch. On the other hand, the X driver 108 uses the X energy recovery circuit 304 to reduce energy consumption when the sustain discharge voltage Vs and the ground voltage Vg are alternately applied to the sustain electrode Cp. Equipped.

4 is a timing diagram showing a driving signal for driving a plasma display panel having a conventional three-electrode structure.

One subfield SF is divided into a reset period PR, an address period PA, and a sustain period PS, and a plurality of subfields are gathered to form a frame for representing an image. In the reset period PR, a reset pulse consisting of rising ramp pulses and falling ramp pulses is applied to the scan electrode lines Y1,..., And Yn so that all of the discharge cells are initialized. In the address period PA, the entire discharge cells are applied. Scan pulses are applied to the scan electrode lines Y1, ..., Yn to select the discharge cells to be turned on, and display data is matched to the scan pulses on the address electrode lines A1, ..., Am. A signal is applied, and in the sustain period PS, sustain pulses are applied to the scan electrode lines Y1, ..., Yn and sustain electrode lines X1, ..., Xn to perform sustain discharge in the selected discharge cell. Is applied alternatingly.

FIG. 5 is a timing diagram illustrating in detail the driving signal and the displacement current in the address period of FIG. 4, and FIG. 6 is a diagram illustrating the path of the displacement current of FIG. 5 in the circuit of FIG. 3. 5 and 6, display data signals are applied to scan pulses for each address electrode line. When the display data signals having the address voltage Va and the ground voltage Vg are alternately applied to the address electrode lines A1, ..., Am in accordance with the scanning pulse, the displacement current Id flowing through the address electrode is applied. Are superimposed to increase the peak current value. That is, at time ta and tb, the peak current value Ip1 of the displacement current Id flowing through the address electrode is increased by applying the display data signal. At this time, the displacement current Id flowing to the address electrode also flows to the scan electrode and the sustain electrode through the panel, and as shown in FIG. 6, flows through the sch, Yscl switch, or flows through the scl, Yscl switch. This flows through the Xb switch. When a displacement current having a large peak current value flows to each element in the Y driver 104 and the X driver 108 of FIG. 3, each element may be burned out. On the other hand, the use of a large breakdown voltage circuit device in an effort to prevent this will increase the manufacturing cost.

In order to solve the above problems, an object of the present invention is to provide a method of driving a plasma display panel which reduces a peak current flowing to an address electrode during address discharge.

In order to achieve the above object, the present invention represents an image for a plasma display panel in which the scan and sustain electrode lines are parallel to each other, and the address electrode lines intersect with the scan and sustain electrode lines to partition the discharge cells. The unit frame is divided into a plurality of subfields having different gradation weights, and each subfield is configured according to a reset period for initializing discharge cells, an address period for selecting discharge cells to be turned on, and gradation weights in the selected discharge cells. In the driving method of the plasma display panel is divided into a sustain period in which a sustain discharge is performed,

In the address period, a scanning pulse is sequentially applied to the scan electrode lines, the address electrode lines are divided into a plurality of blocks, and a display time signal is applied to the address electrode lines with a predetermined time difference for each block. A driving method of a display panel is provided.

According to another aspect of the present invention, the pulse widths of the display data signals may be the same.

According to another aspect of the present invention, the pulse width of the scanning pulse may be the sum of the predetermined time differences for each block and the pulse width of the display data signal.

According to this other aspect of the present invention, the pulse width of the display data signal can be gradually reduced from block to block.

According to another aspect of the present invention, the pulse width of the scan pulse may be equal to the largest pulse width among the pulse widths of the block-specific display data signal.

According to another aspect of the present invention, a reset pulse consisting of a rising ramp pulse and a falling ramp pulse is applied to the scan electrode lines during a reset period, and a bias voltage is applied to the sustain electrode lines when the falling ramp pulse is applied. In the period, it is preferable that the sustain pulse is alternately applied to the scan electrode lines and the sustain electrode lines.

According to another aspect of the present invention, the rising ramp pulse rises from the first voltage to the second voltage and finally reaches the third voltage, and the falling ramp pulse falls from the first voltage and finally reaches the fourth voltage. The scan pulse has a fifth voltage and then the sixth voltage in sequence, the display data signal has a seventh voltage, and the sustain pulse alternately has the first voltage and the ground voltage.

The present invention also provides a recording medium having recorded thereon a program for executing the above method of driving the plasma display panel on a computer in order to achieve the above object.

Hereinafter, with reference to the accompanying drawings will be described in detail an embodiment of the present invention.

7 is a diagram illustrating dividing address electrode lines into three blocks in order to apply the driving method of the present invention.

According to the driving method of the present invention, the address electrode lines A1, ..., Am are divided into a plurality of blocks, and the address electrode lines A1, ..., Am corresponding to each block are displayed with a predetermined time difference. As a driving method for applying a data signal, in FIG. 7, the address electrode lines A1,..., And Am are shown in FIG. 7 as a first block B1, a second block B2, and a third block B3. Divide into three blocks. Of course, it is not limited to dividing into three blocks, and the number of blocks can be variously determined according to design specifications.

FIG. 8 is a timing diagram illustrating application of a display data signal with a predetermined time difference for each block in an address period according to an embodiment of the present invention.

In FIG. 7, the address electrode lines A1, ..., Am are divided into three blocks B1, B2, and B3, and a display data signal is applied with a predetermined time difference for each block. The display data signal having the address voltage Va is applied to the address electrode lines Ab1 of the first block at a time t1, and the first time difference d1 is greater than the time t1 to the address electrode lines Ab2 of the second block. The display data signal having the address voltage Va is applied at a time t2, which is delayed by, and the address voltage Va at the time t3 which is later than the time t2 by a second time difference d2 to the address electrode lines Ab3 of the third block. A display data signal having Meanwhile, the pulse widths of the display data signals applied to the address electrode lines Ab1, Ab2, and Ab3 of the first, second, and third blocks are equal to Wa. In this case, the pulse width Wy of the scan pulse applied to the scan electrode lines Y1, ..., Yn is equal to the sum of the pulse width Wa of the display data signal and the time difference d1 + d2. In other words, the pulse width Wy of the scanning pulse is Wa + d1 + d2. When the display data signal is applied by dividing the address electrode lines A1, ..., Am into three blocks with a predetermined time difference d1 or d2 for each block, the displacement current flowing through the address electrode is time t1, respectively. The flow will be divided at, t2 and t3. That is, the magnitude of the peak value Ip2 of the displacement current of FIG. 8 is smaller than the peak value Ip1 of the displacement current shown in FIG. 5. Therefore, even if the displacement current Id flowing through the address electrode (3 in Cp in FIG. 6) flows through the scan electrode (1 in Cp in FIG. 6) and the sustain electrode (2 in Cp in FIG. 6) of the panel, the Y driver (FIG. 6). 10) and the burnout of circuit elements in the X driver 108 of FIG. 6 may not occur, and manufacturing cost may be reduced.

9 is a timing diagram illustrating a driving signal to which the driving method of FIG. 8 is applied.

The subfield SF is divided into a reset period PR, an address period PA, and a sustain period PS, and a plurality of subfields having different gray scale weights form a frame for displaying an image. During the reset period PR, the rising ramp pulse and the falling ramp pulse are applied to the scan electrode lines Y1, ..., Yn, and the falling ramp pulse is applied to the sustain electrode lines X1, ..., Xn. From the application time, the positive bias voltage Vb is applied, and the ground voltage Vg is applied to the address electrode lines A1, ..., Am. The rising ramp pulse rises from the first voltage Vs by the second voltage Vset to finally reach the third voltage Vset + Vs, and the falling ramp pulse falls from the first voltage Vs and finally 4 voltage (Vnf) is reached. The application of the rising ramp pulse causes negative wall charges to accumulate in the vicinity of the scan electrode and positive wall charges to accumulate in the vicinity of the sustain electrode and the address electrode, thereby performing a weak reset discharge. The wall charges accumulated near each electrode start to be erased by the application of the falling ramp pulses, and weak reset discharge is performed. The wall charge state of all the discharge cells is initialized by the above reset discharge. In other words, a small amount of negative wall charges accumulates near the scan electrodes, and a small amount of positive wall charges accumulates near the sustain electrodes and the address electrodes.

In the address period PA, address discharge is performed to select a discharge cell to be turned on among all the discharge cells. In particular, the driving method of the present invention is characterized by dividing the address electrode lines into a plurality of blocks, for example, three blocks B1, B2, and B3, and applying display data with a predetermined time difference for each block. The scan pulses having the sixth voltage Vscl are sequentially applied to the scan electrode lines Y1,..., And Yn while maintaining the fifth voltage Vsch for the line-by-line scan of the panel. A display data signal having a seventh voltage Va is applied to the address electrode lines A1, ..., Am so as to select a discharge cell to be turned on during the scanning pulse application period. A couple of times are applied. Therefore, when the display data signals are applied to the first block address electrode lines Ab1, the display data signals are applied to the second block address electrode lines Abb2 compared to the display data signals applied to the first block address electrode lines Ab1. A display data signal having a time difference equal to one time difference d1 (shown in FIG. 8) is applied, and to the display data signals applied to the second block address electrode lines Ab2 to the third block address electrode lines Ab3. In comparison, a display data signal having a time difference equal to the second time difference d2 (shown in FIG. 8) is applied. Since the display data signals applied to the block-by-block address electrode lines are applied with a predetermined time difference, the peak value of the displacement current flowing through the address electrode decreases as compared with the conventional one, and therefore the peak value of the displacement current flowing into the scan electrode and the sustain electrode is also reduced. Will be reduced. The pulse width of the display data signal for each block is the same, and the scanning pulse has a pulse width equal to the sum of the pulse width of the display data signal and a predetermined time difference. The address discharge is performed by applying the display data signal to the scan pulse and the block-by-block address electrode lines, positive wall charges are accumulated near the scan electrodes, and negative wall charges are accumulated near the sustain electrodes.

In the sustain period PS, a sustain pulse is applied to perform sustain discharge corresponding to the gray scale weight for each subfield in the selected discharge cell. The sustain pulse alternately has a first positive voltage Vg and a ground voltage Vg, and is applied to the scan electrode lines Y1, ..., Yn and the sustain electrode lines X1, ..., Xn. It is applied alternately.

When the first voltage Vs is applied to the scan electrode, the positive wall charges accumulated near the scan electrode, the negative wall charges accumulated near the sustain electrode, the first voltage Vs applied to the scan electrode and the sustain electrode The sustain discharge is performed by the ground voltage Vg applied to the negative electrode to accumulate negative wall charge near the scan electrode and positive wall charge near the sustain electrode.

When the first voltage Vs is applied to the sustain electrode, the positive wall charges accumulated near the sustain electrode, the negative wall charges accumulated near the scan electrode, the first voltage Vs applied to the sustain electrode, and the scan electrode The sustain discharge is performed by the ground voltage Vg applied to the negative electrode to accumulate negative wall charge near the sustain electrode and positive wall charge near the scan electrode.

FIG. 10 is a timing diagram illustrating the application of a display data signal with a predetermined time difference for each block in an address period according to another embodiment of the present invention.

As shown in FIG. 7, the address electrode lines A1, ..., Am are divided into three blocks B1, B2, and B3, and a display data signal is applied with a predetermined time difference for each block. The display data signal having the address voltage Va is applied to the address electrode lines Ab1 of the first block at time t4, and the first time difference d3 is greater than the time t4 to the address electrode lines Ab2 of the second block. The display data signal having the address voltage Va is applied at a time t5, which is delayed by, and the address voltage Va at the time t6, which is later than the time t5 by a second time difference d4, to the address electrode lines Ab3 of the third block. A display data signal having Meanwhile, the pulse widths of the display data signals applied to the address electrode lines Ab1, Ab2, and Ab3 of the first, second, and third blocks are gradually applied. That is, the pulse width of the display data signal of the first block is Wb1, the pulse width of the display data signal of the second block is Wb2 smaller by the first time difference d3 than Wb1, and the pulse width of the display data signal of the third block is Wb3 which is smaller by the second time difference d4 than Wb2. At this time, the pulse width Wy of the scan pulse applied to the scan electrode lines Y1, ..., Yn is equal to Wb1, which is the largest pulse width among the pulse widths of the block-specific display data signal. When the display data signal is applied by dividing the address electrode lines A1, ..., Am into three blocks with a predetermined time difference d1 or d2 for each block, the displacement current flowing through the address electrode is time t4, respectively. The flow will be divided at, t5, t6. That is, the magnitude of the peak value Ip3 of the displacement current Id of FIG. 10 becomes smaller than the peak value Ip1 of the displacement current Id shown in FIG. 5. Therefore, even if the displacement current Id flowing through the address electrode (3 in Cp in FIG. 6) flows through the scan electrode (1 in Cp in FIG. 6) and the sustain electrode (2 in Cp in FIG. 6) of the panel, the Y driver (FIG. 6). 10) and the burnout of circuit elements in the X driver 108 of FIG. 6 may not occur, and manufacturing cost may be reduced.

FIG. 11 is a timing diagram illustrating a driving signal to which the driving method of FIG. 10 is applied.

The subfield SF is divided into a reset period PR, an address period PA, and a sustain period PS, and a plurality of subfields having different gray scale weights form a frame for displaying an image. During the reset period PR, the rising ramp pulse and the falling ramp pulse are applied to the scan electrode lines Y1, ..., Yn, and the falling ramp pulse is applied to the sustain electrode lines X1, ..., Xn. The positive bias voltage Vb is applied from time to time, and the ground voltage Vg is applied to the address electrode lines A1, ..., Am. The rising ramp pulse rises from the first voltage Vs by the second voltage Vset to finally reach the third voltage Vset + Vs, and the falling ramp pulse falls from the first voltage Vs and finally 4 voltage (Vnf) is reached. The application of the rising ramp pulse causes negative wall charges to accumulate in the vicinity of the scan electrodes and positive wall charges to accumulate in the vicinity of the sustain electrodes and the address electrodes, thereby performing a weak reset discharge. The wall charges accumulated near each electrode start to be erased by the application of the falling ramp pulses, and weak reset discharge is performed. The wall charge state of all the discharge cells is initialized by the above reset discharge. In other words, a small amount of negative wall charges accumulates near the scan electrodes, and a small amount of positive wall charges accumulates near the sustain electrodes and the address electrodes.

In the address period PA, address discharge is performed to select a discharge cell to be turned on among all the discharge cells. In particular, the driving method of the present invention is characterized by dividing the address electrode lines into a plurality of blocks, for example, three blocks B1, B2, and B3, and applying display data with a predetermined time difference for each block. The scan pulses having the sixth voltage Vscl are sequentially applied to the scan electrode lines Y1,..., And Yn while maintaining the fifth voltage Vsch for the line-by-line scan of the panel. A display data signal having a seventh voltage Va is applied to the address electrode lines A1, ..., Am so as to select a discharge cell to be turned on during the scanning pulse application period. A couple of times are applied. Therefore, when the display data signals are applied to the first block address electrode lines Ab1, the display data signals are applied to the second block address electrode lines Ab2 as compared with the display data signals applied to the first block address electrode lines Ab1. A display data signal having a time difference equal to the time difference d3 (shown in FIG. 10) is applied, and the display data signals applied to the second block address electrode lines Ab2 are applied to the third block address electrode lines Ab3. A display data signal having a time difference equal to the second time difference d4 (shown in FIG. 10) is applied. Since the display data signals applied to the block-by-block address electrode lines are applied with a predetermined time difference, the peak value of the displacement current flowing through the address electrode is reduced as compared with the conventional one, and thus the displacement current flowing into the scan electrode and the sustain electrode is also reduced. The pulse width of the display data signal for each block gradually decreases, so that the pulse width of the display data signal of the first block is the largest, and the pulse width of the display data signal of the third block is the smallest. The scanning pulse has a pulse width equal to the pulse width of the display data signal of the first block. The address discharge is performed by applying the display data signal to the scan pulse and the block-by-block address electrode lines, positive wall charges are accumulated near the scan electrodes, and negative wall charges are accumulated near the sustain electrodes.

In the sustain period PS, a sustain pulse is applied to perform sustain discharge corresponding to the gray scale weight for each subfield in the selected discharge cell. The sustain pulse alternately has a first positive voltage Vg and a ground voltage Vg, and is applied to the scan electrode lines Y1, ..., Yn and the sustain electrode lines X1, ..., Xn. It is applied alternately.

When the first voltage Vs is applied to the scan electrode, the positive wall charges accumulated near the scan electrode, the negative wall charges accumulated near the sustain electrode, the first voltage Vs applied to the scan electrode and the sustain electrode The sustain discharge is performed by the ground voltage Vg applied to the negative electrode to accumulate negative wall charge near the scan electrode and positive wall charge near the sustain electrode.

When the first voltage Vs is applied to the sustain electrode, the positive wall charges accumulated near the sustain electrode, the negative wall charges accumulated near the scan electrode, the first voltage Vs applied to the sustain electrode, and the scan electrode The sustain discharge is performed by the ground voltage Vg applied to the negative electrode to accumulate negative wall charge near the sustain electrode and positive wall charge near the scan electrode.

Meanwhile, the driving method of the plasma display panel according to the present invention described above may be embodied as computer readable codes on a computer readable recording medium. Computer-readable recording media include any type of recording device that stores programs or data that can be read by a computer system. Examples of computer-readable recording media include ROM, RAM, CD-ROM, magnetic tape, hard disk, floppy disk, flash memory, optical data storage, and the like. Here, the program stored in the recording medium refers to a series of instruction instructions used directly or indirectly in an apparatus having an information processing capability such as a computer to obtain a specific result. Therefore, the term computer is used to mean all devices having information processing capability for performing a specific function by a program including a memory, an input / output device, and an arithmetic device despite the fact that the name is actually used. Even in the case of a device for driving a panel, its use is limited to a specific field of panel driving, and in reality, it is a kind of computer.

In particular, the display panel driving method according to the present invention is an integrated circuit, for example, a field programmable gate array (FPGA), which is prepared by a schematic or ultra high-speed integrated circuit hardware description language (VHDL) on a computer, and connected to a computer. It can be implemented by. The recording medium includes such a programmable integrated circuit.

According to the present invention as described above, the following effects can be obtained.

First, by dividing the address electrode into a plurality of blocks and applying a display data signal with a predetermined time difference for each block, the peak value of the displacement current generated in the address electrode during address discharge can be reduced as compared with the related art.

Second, by reducing the peak value of the displacement current flowing through the address electrode, it is possible to prevent the burnout of the circuit element in the driving unit caused by the displacement current flows to the scan electrode or sustain electrode, and to use a circuit element with a small breakdown voltage. Saves days.

Although the present invention has been described with reference to the embodiments shown in the drawings, this is merely exemplary, and it will be understood by those skilled in the art that various modifications and equivalent other embodiments are possible. Therefore, the true technical protection scope of the present invention will be defined by the technical spirit of the appended claims.

Claims (8)

For a plasma display panel in which scan and sustain electrode lines are parallel to each other and address electrode lines intersect the scan and sustain electrode lines, and discharge cells are partitioned, a unit frame representing an image includes a plurality of unit frames having different gray scale weights. Each subfield is divided into subfields, and sustain discharge is performed according to a reset period in which the discharge cells are initialized, an address period in which discharge cells to be turned on among the discharge cells are selected, and the gray scale weight in the selected discharge cells. In the driving method of the plasma display panel is divided into the sustain period is driven, In the address period, scanning pulses are sequentially applied to the scan electrode lines, the address electrode lines are divided into a plurality of blocks, and a predetermined time difference is applied to each of the blocks to apply a display data signal to the address electrode lines. A method of driving a plasma display panel. The method of claim 1, And a pulse width of the display data signal is the same. The method of claim 2, And the pulse width of the scanning pulse is the sum of the sum of the predetermined time differences for each block and the pulse width of the display data signal. The method of claim 1, And the pulse width of the display data signal decreases gradually for each block. The method of claim 4, wherein And the pulse width of the scanning pulse is the same as the largest pulse width among the pulse widths of the block-by-block display data signal. The method of claim 1, In the reset period, a reset pulse consisting of a rising ramp pulse and a falling ramp pulse is applied to the scan electrode lines, and a bias voltage is applied to the sustain electrode lines when the falling ramp pulse is applied. And a sustain pulse is alternately applied to the scan electrode lines and the sustain electrode lines in the sustain period. The method of claim 6, The rising ramp pulse rises from the first voltage by the second voltage to finally reach the third voltage, The falling lamp pulse is lowered from the first voltage to finally reach a fourth voltage, The scan pulse has a fifth voltage and subsequently has a sixth voltage, The display data signal has a seventh voltage; And the sustain pulse has a first voltage and a ground voltage alternately. A recording medium on which a program for executing the method of any one of claims 1 to 7 is recorded on a computer.

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