KR20060058920A - Method of manufacturing thin film transistor - Google Patents

Abstract

An object of the present invention is to reduce the manufacturing cost while simplifying the manufacturing process of a TFT having an LDD region. A method of manufacturing a thin film transistor for achieving the object of the present invention is as follows. First, an active layer is formed on a substrate, and a gate insulating film and a gate electrode material film are sequentially formed on the entire surface of the substrate to cover the active layer, and a gate electrode corresponding to the center of the active layer is formed on the gate electrode material film. A photoresist pattern masking the region and the LDD predetermined region adjacent to the predetermined region of the gate electrode is formed. A gate electrode material film is etched using the photoresist pattern as a mask to form a gate electrode in the gate predetermined region. Next, the first resist is doped toward the substrate using the photoresist pattern as a mask to form source and drain regions in contact with the LDD predetermined region at both edges of the active layer, and the photoresist pattern is completely removed to remove the LDD predetermined region. And an LDD region is formed in the active layer inside the source and drain regions by doping a second impurity having a lower concentration than the first impurity while having the same conductivity type as the first impurity toward the substrate using the gate electrode as a mask. .

Organic EL, LDD, TFT, LTPS

Description

Manufacturing Method of Thin Film Transistor {METHOD OF MANUFACTURING THIN FILM TRANSISTOR}

1 is a schematic view of an organic light emitting display device according to the present invention;

2A to 2C are sequential process cross-sectional views illustrating a method of manufacturing a thin film transistor according to an embodiment of the present invention.

3A to 3D are cross-sectional views sequentially illustrating a method of manufacturing a thin film transistor according to another exemplary embodiment of the present invention.

The present invention relates to a method of manufacturing a thin film transistor, and more particularly, to a method of manufacturing a thin film transistor having a lightly doped drain (LDD) region.

In general, a thin film transistor (hereinafter referred to as TFT) is used as a driving element of an active matrix liquid crystal display (LCD) device or an organic luminescence (EL) display device.

Here, the organic EL display device is a self-luminous display device that electrically excites an organic compound to emit light. Unlike an LCD device, an organic EL display device does not require a separate light source, and has a wide operating temperature range and a wide viewing angle. It is fast and has the advantage of being suitable for high resolution implementation.

The light emitting cell of the organic EL display device has a structure of an anode electrode, which is a hole injection electrode, an organic thin film, which is a light emitting layer, and a cathode electrode, which is an electron injection electrode, and injects holes and electrons from each electrode into the organic thin film, respectively. When the exciton combined with the electrons falls from the excited state to the ground state, light emission occurs.

The light emitting layer has a multilayer structure including an electron transport layer (ETL) and a hole transport layer (HTL) in the light emitting layer (EML) to improve the light emission efficiency by improving the balance between electrons and holes. Sometimes, it may further include a separate electron injection layer (EIL) and a hole injection layer (HIL).

On the other hand, TFTs applied to an organic EL device or an LCD device of an active matrix system are formed for each pixel to drive each pixel, and to a scan (gate) driving circuit or a data driving circuit. It is formed into a TFT for driving circuit which is formed to operate the pixel driving TFT.

In recent years, the electron mobility of TFT's active layer by laser crystallization technology is relatively low compared to amorphous silicon (a-Si), but it can be manufactured at low temperature below 600 ℃ similar to a-Si. As the technology of forming low temperature polycrystalline silicon (LTPS) is applied, it is possible to implement a complementary metal oxide silicon (CMOS) TFT in which N and P channels coexist to form a pixel on the same organic substrate. It is possible to integrate the driving TFT and the driving circuit TFT at the same time.

However, in the TFT using the polysilicon as the active layer, as the polysilicon has a trap level at a large portion, a characteristic deterioration due to a hot carrier or a large amount of off leakage current occurs. There is this.

To solve this problem, a method of stabilizing an active layer of polysilicon is applied by applying a lightly doped drain (LDD) region to an active layer inside the source and drain regions of the TFT.

However, in order to apply the LDD region to the TFT, a photoresist for masking an active layer in which the gate electrode and the LDD region are formed in a highly doped impurity step for forming a source and a drain region after the gate electrode is formed before the LDD region is formed. Further patterns should be formed.

Accordingly, a mask for forming the photoresist pattern is additionally required in addition to the mask used for forming the gate electrode, and a photolithography process using the mask is additionally performed, resulting in high manufacturing cost and complexity.

The present invention is to solve the problems of the prior art as described above, and its object is to reduce the manufacturing cost while simplifying the manufacturing process of the TFT having the LDD region.

Method of manufacturing a thin film transistor according to an aspect of the present invention for achieving the object of the present invention as described above is as follows.

First, an active layer is formed on a substrate, and a gate insulating film and a gate electrode material film are sequentially formed on the entire surface of the substrate to cover the active layer, and a gate electrode predetermined region corresponding to the center of the active layer is formed on the gate electrode material film. And a photoresist pattern for masking the LDD predetermined region adjacent to the gate electrode predetermined region, and using the photoresist pattern as a mask, the gate electrode material film is etched to form a gate electrode in the gate predetermined region. Next, the first resist is doped toward the substrate using the photoresist pattern as a mask to form source and drain regions in contact with the LDD predetermined region at both edges of the active layer, and the photoresist pattern is completely removed to remove the LDD predetermined region. And an LDD region is formed in the active layer inside the source and drain regions by doping a second impurity having a lower concentration than the first impurity while having the same conductivity type as the first impurity toward the substrate using the gate electrode as a mask. .

In addition, a method of manufacturing a thin film transistor according to another aspect of the present invention for achieving the object of the present invention as described above is as follows.

First, an active layer is formed on a substrate, and a gate insulating film and a gate electrode material film are sequentially formed on the entire surface of the substrate so as to cover the active layer, and a gate electrode predetermined region corresponding to the center of the active layer is formed on the gate electrode material film. A photoresist pattern for masking the LDD predetermined region adjacent to the gate electrode predetermined region is formed. Next, the gate electrode material film is etched using the photoresist pattern as a mask to form a gate electrode in the gate predetermined region, and the first impurity is doped toward the substrate using the photoresist pattern as a mask, so that LDD resists are formed on both edges of the active layer. Source and drain regions are formed in contact with the regions, and the LDD predetermined regions are opened by partially removing the side portions of the photoresist pattern. Thereafter, the photoresist pattern and the gate electrode are used as a mask to dope the second impurity having a lower concentration than that of the first impurity while having the same conductivity type as the first impurity toward the substrate, thereby forming an LDD region in the active layer inside the source and drain regions. Is formed, and the photoresist pattern is completely removed.

Here, the removal of the gate electrode is performed by wet etching, wherein the wet etching is performed by transient etching so that the gate electrode is retracted by the LDD predetermined region from the side boundary of the photoresist pattern.

In addition, the gate electrode may be etched by dry etching the gate electrode material film exposed by the photoresist pattern, and the side of the gate electrode material film etched using the photoresist pattern as a mask is etched by wet etching by the width of the LDD predetermined region. It may be formed.

After forming the photoresist pattern and before forming the gate electrode, the photoresist pattern is baked and cured by a hot plate method or an oven method.

Hereinafter, with reference to the accompanying drawings will be described in detail a preferred embodiment of the present invention.

FIG. 1 is a schematic view of an organic EL display device according to an exemplary embodiment of the present invention. As shown in FIG. 1, a pixel driver (not shown) is connected to a substrate 10 and a display part (not shown) electrically connected to the pixel driver. And a data driver 200a and a scan driver 200b for driving the pixel unit 100.

Here, the substrate 10 is made of a transparent insulating substrate and the material may be glass or plastic. Although not shown, the pixel driver of the pixel unit 100 is composed of a combination of two or more TFTs according to operating characteristics, and the display unit is an organic light emitting layer and a cathode that emit light of a specific color and the first electrode as the anode electrode. The second electrode as is sequentially stacked, and the data driver 200a and the scan driver 200b are formed of CMOS TFTs.

As shown in FIG. 2D, the pixel driver, the data driver 200a, and the scan driver 200b are formed on the substrate 10, the substrate 10, and source and drain regions 20a and 20b, source and drain, respectively. The substrate 10 covering the active layer 12 and the active layer 12 including the LDD regions 22a and 22b formed inside the regions 20a and 20b, and the channel region between the LDD regions 22a and 22b. And a TFT comprising a gate insulating film 14 formed on the entire surface and a gate electrode 16a formed on the channel region of the active layer 12.

A method of manufacturing such a TFT will be described with reference to Figs. 2A to 2C.

Referring to FIG. 2A, a-Si film is deposited on a transparent substrate 10 such as glass, and annealed with an excimer laser or the like to crystallize the a-Si film to form a polysilicon film. Next, the polysilicon layer is patterned by photolithography and etching to form the active layer 12, and the gate insulating layer 14 is formed on the entire surface of the substrate 10 to cover the active layer 21. Then, a metal film 16 such as chromium (Cr) or the like is deposited on the gate insulating film 14 as a gate electrode material film, and corresponding to the center of the active layer 12 on the metal film 16 by photolithography. The photoresist pattern 18 for masking the gate electrode predetermined region G and the LDD predetermined regions L1 and L2 adjacent to the gate electrode predetermined region G is formed.

Thereafter, the photoresist pattern 18 is baked and cured by a hot plate method or an oven method.

Referring to FIG. 2B, the metal layer 16 is etched by wet etching using the photoresist pattern 18 as a mask to form the gate electrode 16a only on the gate insulating layer 14 of the gate electrode predetermined region G. Referring to FIG. do. In this case, the wet etching is performed by transient etching so as to retreat from the side boundary of the photoresist pattern 18 by the LDD predetermined regions L1 and L2. Next, the photoresist pattern 18 is used as a mask to dope the first impurity 20 having a relatively high concentration toward the substrate 10, for example, N ⁺ impurities when the TFT is an N channel, and P when the P channel is a P channel. ^The impurities are doped to form source and drain regions 20a and 20b in contact with the LDD predetermined regions L1 and L2 at both edges of the active layer 12.

Preferably, a N ⁺ impurity using PH ₃ to approximately 10E15 ions / ㎠ concentration and P ⁺ impurity in the use of B ₂ H ₆ to approximately 10E15 ions / ㎠ concentration.

Referring to FIG. 2C, the LDD predetermined region L1 of the active layer 21 by completely removing the photoresist pattern 18 by a thinner strip process using a resist solvent or an ashing process using an oxygen plasma. L2; see FIG. 2A). Then, using the gate electrode 16a as a mask, the second impurity 22 having a same conductivity type as that of the first impurity 20 toward the substrate 10 and having a lower concentration than the first impurity 20, for example, a TFT. the case of N-channel N ^- when the doping impurities and P channel P ^- the doped impurities, a source and a drain region (20a, 20b), LDD regions in the active layer 12 of the inner side (22a, 22b) formed do.

In this embodiment, not only the source and drain regions 20a and 20b but also the gate electrode 16a are formed using the photoresist pattern 18 masking the gate electrode predetermined region G and the LDD predetermined regions L1 and L2. Therefore, even if the LDD regions 22a and 22b are applied to the active layer 12 of the TFT, a separate mask and a photolithography process using the mask are not added.

Meanwhile, in the above embodiment, the gate electrode 16a is formed by etching the metal film 16 by one excessive wet etching using the photoresist pattern 18 as a mask, but dry etching is performed in the shape of the photoresist pattern 18. The metal film 16 may be etched to form a metal film pattern, and then wet etching may be performed to remove side portions of the metal film pattern by LDD predetermined regions L1 and L2.

In addition, in the above embodiment, after the source and drain regions 20a and 20b are formed, the photoresist pattern 18 is completely removed, and then the LDD regions 22a and 22b are formed. The LDD regions 22a and 22b may be formed by removing only the regions L1 and L2, which will be described in more detail with reference to FIGS. 3A to 3D. In Fig. 3A to Fig. 3D, the same reference numerals are assigned to the same configurations as the above embodiments.

Referring to FIG. 3A, an a-Si film is deposited on a transparent substrate 10 such as glass, and annealed with an excimer laser or the like to crystallize the a-Si film to form a polysilicon film. Next, a polysilicon layer is patterned by photolithography and etching to form an active layer 12, and a gate insulating layer 14 is formed on the entire surface of the substrate 10 to cover the active layer 12. Next, a metal film 16 such as chromium (Cr) is deposited on the gate insulating film 14 as a gate electrode material film, and photolithography corresponds to the center of the active layer 12 on the metal film 16. A photoresist pattern 18 for masking the LDD predetermined regions L1 and L2 adjacent to the gate electrode predetermined region G and the gate electrode predetermined region G is formed.

Thereafter, the photoresist pattern 18 is baked and cured by a hot plate method or an oven method.

Referring to FIG. 3B, the metal layer 16 is etched by wet etching using the photoresist pattern 18 as a mask to form the gate electrode 16a only on the gate insulating layer 14 of the gate electrode predetermined region G. Referring to FIG. do. In this case, the wet etching is performed by transient etching so as to retreat from the side boundary of the photoresist pattern 18 by the LDD predetermined regions L1 and L2. Next, the photoresist pattern 18 is used as a mask to dope the first impurity 20 having a relatively high concentration toward the substrate 10, for example, N ⁺ impurities when the TFT is an N channel, and P when the P channel is a P channel. ^The dopants are doped to form source and drain regions 20a and 20b in contact with the LDD predetermined regions L1 and L2 (see FIG. 3A) at both edges of the active layer 12.

Preferably, a N ⁺ impurity using PH ₃ to approximately 10E15 ions / ㎠ concentration and P ⁺ impurity in the use of B ₂ H ₆ to approximately 10E15 ions / ㎠ concentration.

Referring to FIG. 3C, the LDD predetermined regions L1 and L2 are opened by partially removing the side portions of the photoresist pattern 18 by an ashing process using oxygen plasma. Subsequently, the gate electrode 16a and the photoresist pattern 18a from which the side portions are removed are used as masks to have the same conductivity type as the first impurity 20 toward the substrate 10 and lower than the first impurity 20. The second impurity 22 in concentration, for example, when the TFT is an N channel, is doped with N ^- impurities, and when it is a P channel, it is doped with P ^- impurities to form an active layer 12 inside the source and drain regions 20a and 20b. ), LDD regions 22a and 22b are formed.

Referring to FIG. 3D, the photoresist pattern 18a is completely removed by a thinner strip process using a resist solvent or an ashing process using an oxygen plasma.

Although the preferred embodiments of the present invention have been described above, the present invention is not limited thereto, and various modifications and changes can be made within the scope of the claims and the detailed description of the invention and the accompanying drawings. Naturally, it belongs to the range of.

For example, in the above embodiment, only the case where the above-described TFT is applied to the organic EL display device in which the display portion includes the organic light emitting layer is described. However, the flat panel display device such as a liquid crystal display device which can use such a TFT as a driving element is described. It can be applied.

According to the present invention described above, a photoresist pattern for masking the gate electrode predetermined region and the LDD predetermined region is formed by one photolithography process before forming the gate electrode, and the photoresist pattern is used to form not only the source and drain regions but also the gate. An electrode is also formed.

Therefore, even if the LDD region is applied to the active layer of the TFT, a separate mask and a photolithography process using the mask are not added, thereby reducing the manufacturing cost and making the TFT manufacturing process easy and simple.

Claims (11)

Forming an active layer on the substrate; Sequentially forming a gate insulating film and a gate electrode material film on the entire surface of the substrate to cover the active layer; Forming a photoresist pattern on the gate electrode material film to mask a gate electrode predetermined region corresponding to the center of the active layer and an LDD predetermined region adjacent to the gate electrode predetermined region; Etching the gate electrode material layer using the photoresist pattern as a mask to form a gate electrode in the gate predetermined region; Doping a first impurity toward the substrate using the photoresist pattern as a mask to form source and drain regions in contact with the LDD predetermined region at both edges of the active layer; Completely removing the photoresist pattern to open the LDD predetermined region; And LDD regions are formed in the active layer inside the source and drain regions by doping a second impurity having a lower concentration than the first impurities while having the same conductivity type as the first impurities toward the substrate using the gate electrode as a mask. A method of manufacturing a thin film transistor comprising the steps of. Forming an active layer on the substrate; Sequentially forming a gate insulating film and a gate electrode material film on the entire surface of the substrate to cover the active layer; Forming a photoresist pattern on the gate electrode material film to mask a gate electrode predetermined region corresponding to the center of the active layer and an LDD predetermined region adjacent to the gate electrode predetermined region; Etching the gate electrode material layer using the photoresist pattern as a mask to form a gate electrode in the gate predetermined region; Doping a first impurity toward the substrate using the photoresist pattern as a mask to form source and drain regions in contact with the LDD predetermined region at both edges of the active layer; Removing the side portions of the photoresist pattern to open the LDD predetermined region; Using the photoresist pattern and the gate electrode as a mask, a second impurity having a lower concentration than that of the first impurity is doped toward the substrate with the same conductivity type as the first impurity to form an active layer inside the source and drain regions. Forming an LDD region; And And removing the photoresist pattern completely. The method according to claim 1 or 2, The forming of the gate electrode may be performed by wet etching. The method of claim 3, wherein And the wet etching is performed by transient etching so that the gate electrode is retracted by the LDD predetermined region from the side boundary of the photoresist pattern. The method according to claim 1 or 2, Forming the gate electrode Etching the gate electrode material film exposed by the photoresist pattern by dry etching; And etching the side portions of the etched gate electrode material layer by the wet etching by the width of the LDD predetermined region using the photoresist pattern as a mask. The method according to claim 1 or 2, After forming the photoresist pattern and before forming the gate electrode, A method of manufacturing a thin film transistor, wherein the photoresist pattern is baked and cured by a hot plate method or an oven method. The method according to claim 1 or 2, And a PH _{3 having a} concentration of about 10E15 ions / cm 2 or B ₂ H ₆ having a concentration of about 10E15 ions / cm 2 as the first impurity. The method of claim 2, Side removal of the photoresist pattern is a method of manufacturing a thin film transistor is performed by an ashing process using an oxygen plasma. A thin film transistor manufactured by the method of claim 1. A flat panel display comprising a thin film transistor manufactured by the method of claim 1 or 2. The method of claim 10, A flat panel display further comprising a display unit having a structure in which a first electrode, an organic light emitting layer, and a second electrode are sequentially stacked.

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