KR20060057482A - Plasma display panel - Google Patents

Abstract

The present invention relates to a plasma display panel.

A plasma display panel according to the present invention includes a substrate; A signal line formed on the substrate; A pad connected to the signal line; And an insulator positioned between the pads.

Description

Plasma Display Panel {PLASMA DISPLAY PANEL}             

1 is a perspective view showing a conventional three-electrode AC surface discharge plasma display panel.

FIG. 2 is a cross-sectional view illustrating the plasma display panel shown in FIG. 1.

3A and 3B are diagrams illustrating electrodes formed on a conventional plasma display panel.

4 illustrates a portion of a plasma display panel according to a first embodiment of the present invention.

FIG. 5 is a cross-sectional view illustrating a cross section taken along line II ′ of FIG. 4.

FIG. 6 is a diagram illustrating a form in which a film is connected on the cross section of FIG. 5.

7 is a diagram illustrating a portion of a plasma display panel according to a second embodiment of the present invention.

8 is a diagram illustrating a portion of a plasma display panel according to a third embodiment of the present invention.

<Description of Symbols for Main Parts of Drawings>                 

100, 1100, 2100: address electrode pad

200, 1200, 2200: bus electrode pads 300, 1300, 2300: bulkhead

400, 1400: substrate 500, 1500: insulation pattern

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel, and more particularly, to a plasma display panel capable of reducing a panel defect and enabling stable driving.

Plasma Display Panels (hereinafter referred to as 'PDPs') typically display characters or graphics by emitting phosphors by 147 nm ultraviolet rays generated during gas discharge such as He + Xe, Ne + Xe, He + Ne + Xe. The included image is displayed. Such PDPs are attracting attention as large-area flat panel displays due to their ease of thinning and large size, as well as expanding the market with the recent commercial production of companies.

1 and 2, a structure of a PDP of a three-electrode alternating current (AC) type which is commonly used is shown.

As shown in FIGS. 1 and 2, the PDP includes sustain electrode pairs 14 and 16 periodically formed on the upper substrate 10, and upper dielectric layers 18 formed on the sustain electrode pairs 14 and 16. And a protective layer 20, an address electrode 22 periodically formed on the lower substrate 12, a lower dielectric layer 24 formed on the address electrode 22, and a partition wall formed on the lower dielectric layer 24. And a phosphor layer 28.

The upper substrate 10 and the lower substrate 12 are spaced in parallel by the partition wall 26. The partition wall 26 is formed in parallel with the address electrode 22 to prevent ultraviolet rays generated by the discharge from leaking to adjacent cells. The phosphor layer 28 is applied to the surfaces of the lower dielectric layer 24 and the partition wall 26 to generate visible light of any one of red, green, and blue. In addition, an inert gas for plasma discharge is injected into the discharge space formed by the partition 26 and the upper and lower substrates 10/12.

Each of the sustain electrode pairs 14 and 16 has a transparent electrode 14A and 16A made of a transparent electrode material (ITO) having a light transmittance of 90% or more, and a metal electrode having a relatively narrower width than the transparent electrodes 14A and 16A. 14B, 16B). Here, the transparent electrode material (ITO) has a large resistance value and thus does not transmit power efficiently. Accordingly, the entirety of the sustain electrode pairs 14 and 16 is formed on the transparent electrodes 14A and 16A by forming metal electrodes 14B and 16B made of a highly conductive material, for example, silver (Ag) or copper (Cu). It will increase the conductivity. The sustain electrode pairs 14 and 16 are composed of a scan / sustain electrode and a sustain electrode. The scan signal for panel scanning and the sustain signal for sustaining discharge are mainly supplied to the scan / sustain electrode 14, and the sustain signal is mainly supplied to the sustain electrode 16.

The upper dielectric layer 18 and the lower dielectric layer 24 accumulate electric charges discharged from the sustain electrode pairs 14 and 16 and the address electrode 22 during discharge. The protective layer 20 serves to prevent damage to the upper dielectric layer 18 by sputtering of charged particles. This extends the lifetime of the PDP and increases the emission efficiency of secondary electrons. As the protective layer 20, magnesium oxide (MgO) is usually used.

The address electrode 22 is formed to intersect with the sustain electrode pairs 14 and 16. The address electrode 22 is supplied with a data signal for selecting cells to be displayed.

The PDP maintains the discharge by surface discharge between the pair of sustain electrodes 14 and 16 after the discharge cell is selected by the opposite discharge between the address electrode 22 and the scan / sustain electrode 14. In the discharge cell of the PDP, the fluorescent substance 28 emits light by ultraviolet rays generated during the sustain discharge, so that visible light is emitted outside the cell. As a result, the PDP displays an image in pixel units of discharge cells.

In the conventional PDP having such a structure, metal (Ag), copper (Cu), and the like, which are metallic materials, are used to improve conductivity when forming an electrode as described above. However, such an electrode causes a deformation in accordance with the change of the surrounding environment. In detail, the edge region of each electrode positioned at the edge of the panel is exposed to the atmosphere, and corrosion occurs. Also, each electrode is thermally expanded by the elevated temperature inside the panel, When a signal is applied to the activated electrode, molecules of the electrode diffuse in a specific direction. Due to the diffusion and corrosion, the electrode is distorted in shape, and distortion in a particular direction may cause a short state between the electrodes as shown in FIG. 3A or the electrode itself is broken as shown in FIG. 3B. Will occur. As a result, a defect occurs in an electrode serving as a signal line of the panel, and thus image quality defects such as band-shaped scratches, black spots, and color bleeding occur during image formation.

Accordingly, an object of the present invention is to provide a plasma display panel which can reduce a panel defect and perform stable driving.

In order to achieve the above object, a plasma display panel according to the present invention comprises a substrate; A signal line formed on the substrate; A pad connected to the signal line; And an insulator positioned between the pads.

The pad is connected to the address electrode.

The pad is connected to the bus electrode.

The insulator is formed of at least one of SiOx, SiNx, which is an inorganic insulating material, and BCB, PFCB, which is an organic insulating material, and white ball (WB), which is a dielectric material.

The insulator is formed over the thickness of the pad.

According to an embodiment of the present invention, a plasma display panel includes: a pad connected to a signal line; A partition wall is disposed between the pads.

The pad is connected to the address electrode.

The pad is connected to the bus electrode.

The partition wall is at least one of a horizontal partition wall and a vertical partition wall.

Other objects and advantages of the present invention in addition to the above object will become apparent from the description of the preferred embodiment of the present invention with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to FIGS. 4 to 8.

4 and 5, the PDP according to the first embodiment of the present invention includes a substrate 400, an address electrode line 110 formed on the substrate 400 to supply a data signal, and an address electrode line. The barrier rib 300 is arranged to partition the discharge electrode formed at the intersection of the bus electrode line 220 and the address electrode line 110 and the bus electrode line 220. The edge portions of the address electrode line 110 and the bus electrode line 220 extend from the respective electrode lines 110 and 220 to have a predetermined area, and thus the address electrode pad 100 and the bus electrode pad 200. Are formed, and an insulating pattern 500 is formed between the address electrode pads 100.

The address electrode pads 100 formed as described above are in contact with one side of a COF (Chilp on Film), that is, a film on which a film electrode pad is formed. Referring to FIG. 6, an edge of the plasma display panel according to the exemplary embodiment of the present invention extends from the substrate 400 and the address electrode line 110 and partially formed on the substrate 400. 100, the insulating pattern 500 formed between the address electrode pads 100, the film 600 disposed to face the edge of the substrate 400, and the address electrode pads formed on the film 600. Inside the anisotropic conductive film 800 and the anisotropic conductive film 800 disposed between the film electrode pads 700 connected to the substrates 100, the film electrode pad 700 and the address electrode pads 100, respectively. A conductive ball 900 for electrically connecting the film electrode pad 700 and the address electrode pad 100 is provided.

In the plasma display panel according to the first embodiment of the present invention having the structure as described above, the insulating pattern 500 is formed between the address electrode pads 100, thereby causing corrosion and high temperature and electrical effects due to contact with the atmosphere. The shape deformation of the address electrode pads 100 due to the diffusion phenomenon can be minimized to prevent breakage of the electrode lines and even if the shape of the address electrode pads 100 is deformed. It is possible to prevent the short phenomenon between the (100).

7 relates to a plasma display panel according to a second embodiment of the present invention.

Here, the plasma display panel according to the second embodiment of the present invention has the same configuration except for the insulating pattern 1500 disposed between the bus electrode pads 1200 compared to the plasma display panel according to the first embodiment of the present invention. Since the descriptions except for the bus electrode pad 1200 and the insulating pattern 1500 will be omitted.

Referring to FIG. 7, in the plasma display panel according to the second embodiment of the present invention, a bus electrode pad 1200 partially arranged at an edge portion of the panel and an insulating pattern 1500 are formed between the bus electrode pads 1200. Is formed. The plasma display panel according to the second exemplary embodiment of the present invention having the above structure has an address electrode line 1110 and a bus electrode line 1220, an address electrode line 1110 and a bus electrode line disposed at an edge of the panel. In addition to minimizing the shape deformation due to the surrounding environment of the address electrode pad 1100 and the bus electrode pad 1200 extending from the 1220, the short circuit between the electrodes may be minimized even if the shape deformation occurs.

The insulating patterns 500 and 1500 formed in the plasma display panel according to the first and second embodiments of the present invention having the structure as described above are SiOx and SiNx, which are inorganic insulating materials, and Benzocyclobutene (BCB) and PFCB, which are organic insulating materials. (Perfluorocyclobutane) and dielectric material WB (White Ball) and the like, the thickness of the insulating patterns (500, 1500) is greater than the thickness of the address electrode pads (100, 1100) and bus electrode pads (200, 1200) It can be formed as.

8 is a diagram illustrating a plasma display panel according to a third embodiment of the present invention.

Here, the plasma display panel according to the third embodiment of the present invention has the same configuration except for the shape of the partition wall as compared with the plasma display panel according to the second embodiment of the present invention, and thus descriptions thereof except for the description of the partition wall are omitted. Let's do it.

Referring to FIG. 8, in the plasma display panel according to the third exemplary embodiment, the partition wall 2300 is formed to an edge portion of the panel where the address electrode pads 2100 are formed. Accordingly, the plasma display panel according to the third embodiment of the present invention can minimize the shape deformation of each address electrode pad 2100 by using the partition wall 2300 without forming a separate insulating pattern. The process can be reduced. Here, the plasma display panel according to the third embodiment of the present invention may have a lattice-shaped partition wall structure having transverse bulkheads and vertical partition walls. Accordingly, the partition wall is formed up to an edge portion of the panel on which the bus electrode pads 2200 are formed. It is possible to have the same effect as the barrier ribs 2300 formed between the address electrode pads 2100 described above.

As described above, in the plasma display panel according to the exemplary embodiment of the present invention, not only the shape deformation of the electrode line may be minimized by forming an insulation pattern and a partition wall between the electrode lines, but also an inter-electrode short phenomenon that may occur during shape deformation. And breaking of the electrode can be prevented. Accordingly, the plasma display panel according to the embodiment of the present invention can reduce the panel defects, thereby enabling stable driving of the panel.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (9)

A substrate; A signal line formed on the substrate; A pad connected to the signal line; And an insulator positioned between the pads. The method of claim 1, The pad And a plasma display panel connected to the address electrode. The method of claim 1, The pad A plasma display panel connected to the bus electrode. The method of claim 1, The insulator is Plasma display panel, characterized in that at least one of SiOx, SiNx as an inorganic insulating material, BCB, PFCB as an organic insulating material and White Ball (WB) as a dielectric material. The method of claim 1, The insulator is And a thickness greater than or equal to the thickness of the pad. A pad connected to the signal line; And a partition wall disposed between the pads. The method of claim 6, The pad And a plasma display panel connected to the address electrode. The method of claim 6, The pad A plasma display panel connected to the bus electrode. The method of claim 6, The partition wall And at least one of a transverse bulkhead and a vertical bulkhead.

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