KR20060022583A - Device for driving plasma display panel - Google Patents

Abstract

The present invention relates to a plasma display panel, and more particularly, to a driving apparatus of a plasma display panel.

The present invention uses a) an energy recovery circuit for maintaining the potential of the plasma display panel at a sustain voltage or ground, b) a setup supply unit for applying a rising ramp waveform to the plasma display panel using the setup voltage, and c) using a write scan voltage. A scan reference for supplying a set down supply unit for applying a falling ramp waveform to the plasma display panel and d) a scan reference voltage to the plasma display panel, and providing a path for maintaining the potential of the plasma display panel to the ground by the energy recovery circuit unit. The scan reference voltage supply unit includes a switch forming a path such that the potential of the plasma display panel is at a ground level, and a voltage maintaining unit maintaining a voltage difference between the first terminal and the second terminal of the switch. It is characterized by.

The present invention can minimize the generation of heat and improve the reliability of the driving device by maintaining the voltage difference between the gate terminal and the source terminal of the switch Q9 to be 15V through the voltage holding unit.

Description

Device for driving plasma display panel {Device for Driving Plasma Display Panel}

1 is a circuit diagram of a driving apparatus of a conventional plasma display panel.

2 illustrates a driving waveform diagram according to an operation of a driving apparatus of a conventional plasma display panel.

3 is a circuit diagram of a driving apparatus of a plasma display panel according to the present invention.

The present invention relates to a plasma display panel, and more particularly, to a driving apparatus of a plasma display panel.

1 is a circuit diagram of a driving apparatus of a conventional plasma display panel. 2 illustrates a driving waveform diagram according to an operation of a driving apparatus of a conventional plasma display panel.

The fifth switch Q5 and the seventh switch Q7 are turned on during the setup period. At this time, the sustain voltage Vs is supplied from the energy recovery circuit 40. The sustain voltage Vs supplied from the energy recovery circuit 40 is scanned via the internal diode of the sixth switch Q6, the seventh switch Q7 and the second selector Q15 of the drive integrated circuit 52. Supplied to the electrodes. Thus, as shown in FIG. 2, the voltages of the scan electrodes Y are rapidly increased to Vs.

On the other hand, since the sustain voltage Vs is supplied to the negative terminal of the second capacitor C2, the second capacitor C2 supplies the voltage of Vs + Vsetup to the fifth switch Q5. The fifth switch Q5 supplies the voltage supplied from the second capacitor C2 to the first node point n1 with a predetermined slope while the channel width is adjusted by the first variable resistor VR1 installed at the front end thereof. do.

The voltage applied with the predetermined slope to the first node point n1 is supplied to the scan electrodes via the seventh switch Q7 and the second selector Q15 of the drive integrated circuit 52. As shown in FIG. 2, the rising ramp waveform Ramp-up is supplied to the scan electrodes Y through the above process.

After the rising ramp waveform Ramp-up is supplied to the scan electrodes, the fifth switch Q5 is turned off. When the fifth switch Q5 is turned off, only the voltage of Vs supplied from the energy recovery circuit 40 is applied to the first node point n1. Thus, as shown in FIG. The voltage at Y) drops rapidly to Vs.

Thereafter, the seventh switch Q7 is turned off and the tenth switch Q10 is turned on in the set down period. The tenth switch Q10 adjusts the channel width by the second variable resistor VR2 provided at the front end thereof, and writes the voltage of the second node n2 as a write scan voltage (-Vw) (or a setdown voltage source). Descend with a slope. Accordingly, as shown in FIG. 2, the ramp ramp down is supplied to the scan electrodes Y, and the potential of the scan electrodes Y drops to −Vw.

Here, the seventh switch Q7 has an internal diode in a direction different from that of the sixth switch Q6, so that the voltage applied to the second node n2 is the internal diode and the fourth switch of the sixth switch Q6. It is prevented from being supplied to the ground potential GND via the internal diode of Q4.

The scan reference voltage supply unit 50 is a third capacitor C3 connected between the reference voltage source Vsc and the second node n2, and an eighth connected between the reference voltage source Vsc and the second node n2. A switch Q8 and a ninth switch Q9 are provided.

The eighth switch Q8 supplies the voltage of the reference voltage source Vsc to the drive integrated circuit 52 as shown in FIG. 2 while being switched by the control signal supplied from the timing controller during the selective write and erase address periods. The third capacitor C3 adds the voltage applied to the second node n2 and the voltage value of the reference voltage source Vsc to the eighth switch Q8. The ninth switch Q9 is turned on together with the fourteenth switch Q14, the seventh switch Q7, the sixth switch Q6, and the fourth switch Q4 so that the potential of the scan electrode Y is at ground level. do.

On the other hand, in the plasma display panel, since a dielectric layer is present between each electrode, a capacitance component exists. In the case of a three-electrode plasma display panel, a capacitor is equivalently present between the electrodes.

In the addressing period of FIG. 2, a large peak current (i = C × dv / dt) is generated due to a change in the data voltage and the ground level voltage applied to the data electrode X and an equivalent capacitance component of the plasma display panel.

If a pattern in which a change in data voltage occurs frequently is applied to the plasma display panel, the peak current greatly affects the output waveforms of the other electrodes and adversely affects the operation of the driving apparatus.

In particular, a negative bias voltage of the write scan voltage (-Vw) is applied to the scan electrode Y through the eleventh switch Q11 in the address period where data is applied, and is 110V to 120V higher than the write scan voltage (-Vw). The scan voltage by the large reference voltage source Vsc is applied through the eighth switch Q8.

When an image signal corresponding to an alternating pattern (Alternative Pattern) in which the entire cell on one scan line is repeatedly turned on and off is applied to the data electrode, a peak current is largely generated by the capacitance between the data electrode and the scan electrode. In addition, the peak current directly affects the eighth switch Q8 and the eleventh switch Q11 which are repeatedly turned on and off during the addressing period.

In addition, the peak current affects the normal potential of the source terminal of the ninth switch Q9 so that the potential difference between the source terminal and the gate terminal of the ninth switch Q9 becomes 10 V or less.

This phenomenon occurs because the noise component due to the induced peak current affects the potential of the source terminal of the ninth switch Q9 through the drive integrated circuit 52. When the voltage difference between the gate terminal and the source terminal of the ninth switch Q9 becomes less than 15V but less than 10V, heat is generated in the device itself because the ninth switch Q9 switches in a linear region. Therefore, it is necessary to prepare a countermeasure for preventing heat generated in the ninth switch.

The present invention is to solve the above problems, and to provide a driving device of the plasma display panel that can minimize the heat generation of the driving device caused by the peak current generated in a specific pattern.

In order to achieve the above object, the present invention provides an energy recovery circuit for maintaining a potential of a plasma display panel at a sustain voltage or ground, and b) a setup supply unit for applying a rising ramp waveform to the plasma display panel using a setup voltage. A set-down supply unit for applying a falling ramp waveform to the plasma display panel using a write scan voltage; and d) supplying a scan reference voltage to the plasma display panel, and maintaining the potential of the plasma display panel at ground by the energy recovery circuit unit. A scan reference voltage supply unit providing a path, wherein the scan reference voltage supply unit maintains a voltage difference between the switch forming the path and the voltage difference between the first terminal and the second terminal of the switch such that the potential of the plasma display panel is at a ground level. It characterized in that it comprises a voltage holding unit.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

3 is a circuit diagram of a driving apparatus of a plasma display panel according to the present invention. As shown in FIG. 3, the driving apparatus of the plasma display panel according to the present invention includes an energy recovery circuit 40, a setup supply unit 42, a set-down supply unit 47, a scan reference voltage supply unit 50, and a scan voltage supply unit ( 46).

<Energy recovery circuit>

The energy recovery circuit 40 supplies and recovers energy to the plasma display panel C through resonance with the inductor L1 and maintains the potential of the plasma display panel C as the sustain voltage Vs or ground. .

〈Setup Supply Unit〉

The setup supply unit 42 applies the rising ramp waveform to the plasma display panel C using the setup voltage Vsetup. The setup supply section 42 forms a rising ramp waveform having a constant slope by the operation of the setup switch Q5 operating in the active region.

〈Set Down Supply Part〉

The set-down supply unit 47 applies the rising ramp waveform and then applies the falling ramp waveform to the plasma display panel C using the write scan voltage (-Vw). The setdown supply unit 47 forms a falling ramp waveform having a predetermined slope by the operation of the setdown switch Q10 operating in the active region.

<Scan reference voltage supply part>

The scan reference voltage supply unit 50 supplies the scan reference voltage Vsc to the plasma display panel C during the scan, and the potential of the plasma display panel C is set to the ground level by the energy recovery circuit 40. Provide a path to be maintained.

The scan reference voltage supply unit 50 includes a switch Q9 for forming a path such that the potential of the plasma display panel C becomes a ground level. The switch Q9 is a FET switching element having a gate terminal which is a signal input terminal for receiving a timing signal.

In this case, the scan reference voltage supply unit 50 includes a voltage holding unit 55 which maintains a voltage difference between the gate terminal and the source terminal to be 15V. The voltage holding part 55 causes the voltage difference between the gate terminal and the source terminal of the switch Q9 to be 15 V so that the switch Q9, which is an FET switching element, is not a linear region but a saturation region and a cut-off region. By not operating in the off region, heat from the peak current at the switch (Q9) is prevented.

The voltage holding part 55 includes a Zener diode having a breakdown voltage of 15V. That is, the voltage difference between the gate terminal and the source terminal of the switch Q9 is maintained at 15V by the zener diode having the breakdown voltage of 15V. At this time, the cathode terminal of the zener diode is connected to the gate terminal of the switch Q9, and the anode terminal is connected to the source terminal of the switch Q9.

<Scan voltage supply part>

The scan voltage supply unit 400 supplies a write scan voltage (-Vw) for addressing each scan electrode to the plasma display panel C through the second selector Q15 during scanning.

As such, those skilled in the art will appreciate that the present invention can be implemented in other specific forms without changing the technical spirit or essential features thereof. Therefore, the above-described embodiments are to be understood as illustrative in all respects and not as restrictive.

The scope of the present invention is shown by the following claims rather than the detailed description, and all changes or modifications derived from the meaning and scope of the claims and their equivalents should be construed as being included in the scope of the present invention. do.

As described above, the present invention can minimize the generation of heat and improve the reliability of the driving device by maintaining the voltage difference between the gate terminal and the source terminal of the switch Q9 at 15V through the voltage holding unit.

Claims (5)

An energy recovery circuit for maintaining the potential of the plasma display panel at a sustain voltage or ground; A setup supply unit applying a rising ramp waveform to the plasma display panel using a setup voltage; A set-down supply unit applying a falling ramp waveform to the plasma display panel using a write scan voltage; And A scan reference voltage supply unit for supplying a scan reference voltage to the plasma display panel and providing a path for maintaining the potential of the plasma display panel to the ground by the energy recovery circuit unit; The scan reference voltage supply unit may include a switch for forming a path such that the potential of the plasma display panel is at a ground level, and a voltage maintaining unit for maintaining a voltage difference between the first terminal and the second terminal of the switch at a constant voltage. The driving device of the plasma display panel. The method of claim 1, And the switch is an FET switching element, and the voltage holding unit maintains the gate terminal and the source terminal of the switch at a constant voltage. The method of claim 2, And the voltage maintaining unit maintains the constant voltage so that the switch operates in one of a saturation region and a blocking region. The method of claim 2, The voltage holding part includes a zener diode, And a cathode terminal of the zener diode is connected to a gate terminal of the switch, and an anode terminal of the zener diode is connected to a source terminal of the switch. The method of claim 4, wherein The breakdown voltage of the zener diode is 15V.

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