KR20060002869A - Electronically controllable rf switch - Google Patents

Abstract

An RF switch circuit (10) and a turner (12) comprising an RF switch circuit are described. The switch circuit comprises at least two input terminals and one output terminal. The input terminals are connected to different RF signal sources, e. g. a terrestrial TV antenna (16) and a TV cable network (18). The circuit comprises first SPST switches (28, 30), each connected to one of the input terminals and a second, SPDT switch (32) connected to the first SPST switches. The switch circuit achieves high isolation performance between the input terminals (20, 22).

Description

Electronically controllable RF switch {ELECTRONICALLY CONTROLLABLE RF SWITCH}

The present invention relates to electrical circuits and, more particularly, to a radio frequency (RF) switch circuit and a receiver circuit for receiving radio frequency signals.

The receiver circuit serves to receive the RF signal. The RF signal may include an analog signal or a digital signal. The receiver circuit converts the received RF signal into an intermediate frequency (IF) signal and then converts the baseband signal. If the received RF signal comprises a digital signal, the output is a digital signal such as an MPEG-2 transport stream. If the RF signal includes an analog signal, the output is an analog baseband signal such as an NTSC signal.

Switch circuits serve to connect and disconnect electrical signal paths. For example, several signal sources can be connected to one signal input by a switch circuit. The switch circuit allows selecting one of the signal sources and connecting it to the signal input.

Especially in RF applications, switch circuits are required to meet certain requirements. One such requirement is to cause low insertion loss (IL) in the forward path. Another is the separation performance between the signal source and the signal input as well as between the signal sources.

It is known that commercially available cable set-top boxes (STBs) use two or more signal sources, such as cable or terrestrial TV signals. In these devices, the switching between two signal sources is made by an electro-mechanical assembly that requires current to magnetize the coil, which then contacts or disconnects the two contact pins to perform the function of a mechanical switch. do. Such electromechanical assemblies are bulky and require relatively high currents and high voltages to control.

US-A-5,274,343 discloses a radio frequency circuit of a radar system, connecting several RF signal sources to a single input port of a frequency multiplier circuit. This circuit acts as an RF switch circuit for cascading the first switch and the second switch interconnected by the radio network. The first and second switches are single pole double throw (SPDT) integrated FET switches, each of which includes one common port and two branch ports. In each first switch, one branch port is connected to the termination impedance and the other branch port is connected to one branch port of the second switch via a radio network. The common port of the second switch is connected to the input port through the network.

It is an object of the present invention to provide a switching circuit and a receiver circuit that switch electronically between at least two signal sources, which circuit is simple in structure and provides good separation performance.

This object is achieved by a switch circuit according to claim 1 and a receiver circuit according to claim 9. The dependent claims relate to preferred embodiments.

According to the invention, there is provided a switch circuit having at least two input terminals and one output terminal. For RF signals applied to two input terminals, a signal path is optionally provided to the output terminal. This is done by cascading the first switch and the second switch.

The first switch includes a first port and a second port. The switch is electronically switchable such that the first and second ports are connected in a first state and the first and second ports are disconnected in a second state. This results in high insertion loss in the disconnected state (e.g., typically greater than 40 microseconds) and low insertion loss in the connected state (e.g., less than 3 microseconds, typically about 1 ms).

In a preferred embodiment, the first switch is implemented using a PIN diode. It is preferred to use two anti-parallel PIN diodes and a driver terminal connected between the PIN diodes in series connection between the first port and the second port. It is also preferred that the first switch be made of individual electronic components.

According to the invention there is provided a second switch comprising two branch ports and one common port as a second stage of a switch cascade. The second switch acts as a single pole multi throw (SPMT) switch and selectively connects one of the branch ports to a common port. It is preferred to use a single pole double throw (SPDT) switch, which is a switch with only two branch ports. According to a preferred embodiment of the invention, an integrated circuit (SPDT or SPMT) switch is used for a second switch, such as an integrated circuit using for example a FET switch.

According to the invention, each input terminal in the switch circuit is connected to one of the branch ports of the second switch via one of the first switches. The signal path is therefore fully electronically switchable. The part count for this circuit is low. In terms of separation performance, high values can be achieved because of the cascaded structure. For example, if each switching stage provides at least 35 Hz of separation in the relevant frequency range, such as from 50 MHz to 500 MHz, the total separation performance will be at least 70 Hz.

According to a preferred embodiment of the present invention, a control circuit for the first switch is provided. The control circuit comprises at least two driver circuits, one for providing a control signal, for driving one of the first switches with the control signal, and the other for providing an inverted control signal for the control. With a signal to drive another of the first switches. This allows controlling both switches with only one control signal at the control terminal. It is preferred that the control circuit consists of individual electronic components.

According to a further development of the invention, both the first switch and the second switch are controlled simultaneously. The aforementioned control circuit is also connected to the second switch to control the second switch synchronously with the first switch. This allows a compact switch circuit that already contains other circuits for both switches.

According to a preferred embodiment of the invention, the I ² C transceiver is connected to a control circuit. The I ² C bus is a simple means of communication and control and inexpensive, highly integrated components are available for this purpose.

According to another aspect of the present invention, a receiver circuit is provided for receiving a radio frequency signal comprising a switch circuit as described above connected to an input of a tuner circuit. The switch circuit serves to select one of at least two RF signal sources for connection to the tuner input terminal. For example, two signal sources may be a terrestrial TV antenna and a cable TV network. The tuner preferably includes a wideband circuit capable of handling the complete frequency range of both signal sources. Due to the good separation performance of the switch circuit, the two signal sources are well separated from each other. Therefore, one tuner that electronically switches between two different signal sources can be used for the signals from the two different sources.

Hereinafter, preferred embodiments of the present invention will be described with reference to the drawings.

1 is a schematic diagram of a receiver set connected to a terrestrial TV antenna and a cable TV network.

2 is a schematic circuit diagram of the RF switch circuit used in FIG.

3 is a schematic circuit diagram of the first switch used in FIG.

4 is a schematic circuit diagram of a second switch used in FIG.

5 is a schematic circuit diagram of the driver circuit used in FIG.

As shown in FIG. 1, there is a receiver set 11 comprising a TV device 14 and a set top box 21. It should be noted that the receiver set 11 is merely an example here. The TV device 14 can be any video display, such as an LCD, plasma or cathode ray display. In addition, the receiver set 11 may be a computer system in which a TV card installed in place of the set top box 21 exists and a computer monitor exists in place of the TV device 14. As another alternative, the functionality of the set top box 21 may be integrated in the TV device.

The set top box 21 includes a receiver module 15 for receiving high frequency (HF) signals and converting them into baseband signals.

In the example of FIG. 1, receiver module 15 and set top box 21 are hybrid digital / analog TV devices, ie they can receive HF signals including analog and digital signals.

Receiver module 15 includes a tuner 12. The tuner first converts the RF signal received at its input into an intermediate frequency (IF) signal. Another circuit (not shown) then demodulates this IF signal to output an analog video signal (a composite video baseband signal) and a TV audio signal. The same tuner 12 may include additional circuitry such as an IF amplifier, SAW filter, VSB / QAM demodulator, etc., capable of demodulating both terrestrial and cable digital TV signals and outputting an MPEG-2 transport stream.

In the device of FIG. 1 there are two high frequency TV signal sources, a terrestrial TV antenna 16 and a TV cable network 18. The antenna 16 is connected to the first input port 20 of the receiver set 11. The TV cable network 18 is connected to the second input port 22 of the receiver set 11. In the set top box 21 of the receiver set 11, the receiver module 15 is arranged in such a manner that the HF inputs 20, 22 of the receiver set 11 are actually input ports of the receiver module 15. The receiver module 15 includes a switch circuit 10 connected to the input ports 20, 22. The output port 24 of the switch circuit 10 is connected to the input of the tuner 12. The switch 10 serves to connect the signal from the antenna 16 or the signal from the cable network 18 to the tuner 12. The switch circuit 10 may be electronically controlled by the tuner 12 via the control interface port 26.

The two RF signal sources 16, 18 need to be electrically separated from each other. The required electrical isolation is required by regulations such as FCC parts 15.115 and 15.117. Here, the separation performance of 80 Hz between 54 MHz and 216 MHz, 60 Hz between 216 MHz and 550 MHz, and 55 Hz between 550 MHz and 806 MHz are specified.

It should be noted that the arrangement of the switch circuit 10 and the tuner 12 shown by symbolic representation in FIG. 1 is for explaining the function of the switch circuit 10. In practical application, switch circuit 10 and tuner 12 are preferably part of the same device, such as receiver module 15.

It is to be noted that the tuner 12 is known to those skilled in the art as such, and is not shown in the present specification and is not described in detail. Tuner circuit 12 receives the HF signal at terminal 24. 2 is a schematic diagram of a receiver module 15 having a switch circuit 10 and a tuner 12.

The switch circuit 10 includes two single-pole-single-throw (SPST) switches 28 and 30, one single-pole-double-throw (SPDT) switch 32, a control circuit 34, and a drive. Voltage input 26.

I ² C transceiver circuitry 36 is implemented in tuner 12. The I ² C transceiver circuit 36 provides a voltage to the voltage input 26 for controlling the switch circuit 10. The I ² C transceiver circuit 36 receives a command via the I ² C bus, whereby a first state in which a signal path from the first input terminal 20 to the output terminal 24 is established, and the second input terminal. Control switch 10 to switch between the second state in which a signal path is provided from 22 to output terminal 24.

The I ² C transceiver circuit 36 provides a voltage signal RFSW to the control circuit 34. The control circuit 34 generates an in-phase voltage V _SW for driving the second SPST switch 30 and generates an inverted voltage V _SW for driving the first SPST switch 28. Complementary driver circuit. The control circuit 34 further provides a driver for the switch signal PESW to drive the SPDT switch 32.

The control circuit 34 receives the voltage RFSW as a switch signal at the control terminal 38. The voltage RFSW may be high, such as 5V, or low, such as 0V.

The first and second SPST switches 28 and 30 have the same structure. These include the two switching elements driven by the respective voltage (V _SW) and the voltage (V _SW) at the actuator terminal. If the signal applied to the driver terminal is high, the two switching elements are switched on so that the first port and the second port 44, 46 are connected. If the applied signal is low, the switching element is turned off to separate the first port and the second port 44, 46.

The SPDT switch 32 includes two branch ports 48, 50, a common port 52, and a control port 54. Two common ports 48, 50 are connected to a second port of the corresponding one of the SPST switches 28, 30, respectively. The common port 52 is connected to the output terminal 24 of the switch circuit 10.

The SPDT switch 32 selectively connects one of the branch ports 48, 50 to the common port 52 according to the driver signal at the driver port 54. If the driver signal is high, the first branch port 48 is connected to the common port 52. If the driver signal is low, the second branch port 50 is connected to the common port 52.

The control circuit 10 operates in the following manner. That is, according to the signal on the I ² C input port of the control circuit 10, the transceiver 36 provides the control circuit 10 with a high or low switching signal RFSW.

If the RFSW is high, this corresponds to the first state in which the first SPST 28 is on, connecting the first input port 20 to the first branch port 48 of the SPDT switch 32. At the same time, the SPDT switch 32 connects the first branch port 48 to the common port 52 such that a signal path is provided between the first input terminal 20 and the output terminal 24 of the switch 10. Is controlled by PESW, a signal set high. This signal path has a low insertion loss. At the same time, the second SPST switch 30 is off and the second branch port 50 of the SPDT switch 32 is disconnected. Therefore, high insulation is achieved between the input terminal 20 and the input terminal 22 and between the second input terminal 22 and the output terminal 24.

When transceiver 36 receives the opposite I ² C command, transceiver 36 controls switch 10 to change to a second state in which the situation is reversed. If RFSW is low, V _SW is low, and when the first SPST switch 28 is off, V _SW is high, the second SPST switch 30 is on, PESW is low, and the SPDT switch 32 Connects the second branch port 50 to the common port 52, and the first branch port 48 is separated. This creates a signal path with low insertion loss between the second input terminal 22 and the output terminal 24, while the input terminals 20, 22 are well insulated from each other, and the first input terminal 20 Also well isolated from the output terminal 24.

3 shows a circuit diagram of the SPST switch 28. The SPST switches 28 and 30 have the same structure. These are implemented using individual electronic components. PIN diodes D1 and D2 serve as switching elements. For example, components with similar PIN diode features such as PIN diodes of the type HVC142 family available from Hitachi or low switching on capacitance can be used. Diodes D1 and D2 are connected in anti-parallel fashion with a series connection between input port 44 and output port 46. Each port 44, 46 has a supply voltage that forms a fixed DC potential ( A voltage divider between 5 V) and ground, and between the diodes D1 and D2 the driver terminal 56 is connected where voltage V _SW is applied, if V _SW is high (e.g. 5V). Both diodes D1 and D2 are forward biased to provide a signal path with low insertion loss between input port 44 and output port 46. If V _SW is low (e.g., 0V), Both diodes D1 and D2 are reverse biased, so high isolation of about 40 Hz is achieved between input port 44 and output port 46.

In FIG. 4 an embodiment of the SPDT switch 32 of FIG. 2 is shown. The SPDT switch 32 is implemented using an integrated circuit RF SPDT switch 58. This is preferably a MOSFET switch. For example, PE4230 available from Peregrine Semiconductor may be used. These integrated circuits feature high RF isolation (38µs at 1.0µs) and low insertion loss (0.44µs at 1.0µs) and utilize low-voltage CMOS logic control.

5 is a schematic diagram of the control circuit 34. The control circuit 34 is implemented using individual electronic components. And switches the first signal driver circuit is in-phase voltage signal (V _SW) by 40 from (RFSW) occurs, the voltage signal (V _SW) inverted by the second driver circuit 42 is generated. To obtain the voltage PESW from V _SW , a resistive divider network 41 is used. The driver circuits 40 and 42 are implemented by bipolar transistors T1 and T2 of type BC 8 57 BW and BC 847 BW connected to the complementary circuit.

When RFSW is applied to the base of complementary transistor pairs 40 and 42, an in-phase voltage V _SW is obtained from driver transistor 40 and an inverted voltage V _SW is obtained from driver transistor 42. . PESW is an in-phase voltage (V _SW ) adapted to obtain the correct switching voltage for the SPDT switch 32.

As shown in FIG. 1, the switch circuit 10 is integrated into the receiver module 15, which is a set top box 21, a receiver module of a PC-TV card or an integrated TV set. It may be a receiver module. The output port 24 of the switch circuit 10 is connected to the input port of the tuner 12. The two input terminals 20, 22 of the switch circuit 10 are connected to an RF signal source as shown in FIG. 1.

According to the control signal received via the I ² C bus, the transceiver 36 integrated in the tuner 12 may be connected to a first signal source (eg terrestrial antenna 16 of FIG. 1) or a second signal source { For example, the switch 10 controls the switch 10 to selectively connect the cable TV signal 18 of FIG. 1 to the RF input of the tuner 12.

The tuner 12 receives the selected RF signal and converts the received signal into an IF signal. The tuner 12 is a hybrid module capable of receiving both analog and digital terrestrial waves as well as cable signals. Depending on whether the received RF signal includes a digital or analog TV signal, the generated IF signal is demodulated to output a baseband analog signal or processed to output a digital baseband signal in the form of an MPEG-2 transport stream. .

As mentioned above, the present invention is applicable to radio frequency (RF) switch circuits and receiver circuits for receiving radio frequency signals.

Claims (9)

As the switch circuit 10, At least two input terminals 20, 22 and one output terminal 24, A first state comprising first and second ports 44 and 46, respectively, wherein there is a high insertion loss between the first port 44 and the second port 46, and the first port 44 And electronically switchable first switches 28, 30 between a second state where there is a low insertion loss between the second port 46 and each input terminal 20, 22 is a first switch 28. First switches 28 and 30 connected to one of the first ports 44 of A second switch 32 having at least two branch ports 48, 50 and one common port 52, between one branch port 48, 50 and the common port 52 in each state; Has a low insertion loss, the insertion loss between the common port 52 and the remaining branch ports 48, 50 comprises a second switch 32 that is electronically switchable between different states, Each branch port (48, 50) is connected to a second port (46) of one of the first switches (28, 30). Switch circuit according to claim 1, wherein the first switch (28, 30) is implemented using a PIN diode (D1, D2). The method of claim 2, The first switch 28, 30 is implemented using two antiparallel PIN diodes D1, D2 in a series connection between the first port 44 and the second port 46, A switch circuit, wherein a driver terminal (56) is connected between the diodes (D1, D2). 4. Switch circuit according to any one of claims 1 to 3, wherein the first switch (28, 30) consists of individual electronic components. 5. The switch circuit according to claim 1, wherein the second switch is an integrated circuit. 6. 6. Switch circuit according to any one of the preceding claims, wherein a control circuit (34) is provided for synchronously controlling the first and second switches (28, 30, 32). The method according to any one of claims 1 to 6, A control circuit 34 is provided comprising a control terminal 38 and at least two driver circuits 40, 42, The first driver circuit 40 provides an in-phase voltage signal V _SW for driving one of the first switches 30, The second driver circuit (42) provides an inverted voltage signal ( V _SW ) for driving the other (28) of the first switch. 8. Switch circuit according to claim 6 or 7, wherein the control circuit (34) is connected to an I ² C transceiver (36). A receiver circuit for receiving a radio frequency signal, At least two radio frequency inputs, A tuner circuit 12 for receiving a radio frequency signal at one input and generating a baseband signal, and A switch circuit 10 according to any of the preceding claims, wherein the input terminals 20, 22 are connected to the radio frequency input, and the output terminal 24 is connected to the tuner ( A receiver circuit connected to said input of 12).

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