KR20050121090A - Semiconductor equipment having finger type diffusion layer and manufacture method thereof - Google Patents
Semiconductor equipment having finger type diffusion layer and manufacture method thereof Download PDFInfo
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- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
- H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
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Abstract
본 발명은 포토다이오드의 샐로우 확산층을 핑거구조로 제작하여 암전류를 줄이고 전체 전류 흐름을 증대시키도록 한 핑거형 확산층을 갖는 반도체장치와 그 제조방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a finger diffusion layer for fabricating a shallow diffusion layer of a photodiode with a finger structure to reduce dark current and increase total current flow, and a manufacturing method thereof.
본 발명에 적용되는 핑거형 확산층을 갖는 반도체장치는 기판과, 상기 기판 상에 형성되는 에피텍셜층과, 상기 에피텍셜층 내부에 이온주입법에 의하여 형성되는 n-웰층과, 상기 에피텍셜층 상부에 이온주입법에 의하여 수평바 형태가 다수개 배열되어 핑거형태로 형성되는 고농도 샐로우 확산층을 포함하여 이루어지는 것을 특징으로 한다. 아울러 핑거형 확산층을 갖는 반도체장치의 제조방법은 Si 웨이퍼상에 에피텍셜층(p-층)을 형성하는 단계와, n-웰층을 형성하는 단계와, n+ 확산층을 형성하는 단계와, 인접소자간의 완전한 격리를 위해 p+ 상부 격리 영역을 형성하는 단계 및 수평바 형태가 다수개 배열된 핑거형태의 구조로 P+ 샐로우 확산층을 형성하는 단계를 포함하여 이루어지는 것을 특징으로 한다.A semiconductor device having a finger diffusion layer according to the present invention includes a substrate, an epitaxial layer formed on the substrate, an n-well layer formed by an ion implantation method inside the epitaxial layer, and an upper portion of the epitaxial layer. It characterized in that it comprises a high concentration shallow diffusion layer formed in the form of a plurality of horizontal bars arranged by the ion injection method in the form of a finger. In addition, a method for manufacturing a semiconductor device having a finger diffusion layer includes forming an epitaxial layer (p-layer) on a Si wafer, forming an n-well layer, forming an n + diffusion layer, And forming a P + shallow diffusion layer in a finger-like structure in which a plurality of horizontal bars form a plurality of horizontal bars.
따라서 본 발명에 따른 핑거형 확산층을 갖는 반도체장치와 그 제조방법에 따르면, 핑거 구조에 의해 접촉면적에 비해 상대적으로 수광면적이 넓음으로 인하여 보다 많은 빛을 받아들일 수 있으므로 고감도의 광검출소자로서 이용될 수 있어 보다 높은 신뢰도와 효율을 갖으며, 비교적 낮은 전압에서도 동작 될 수 있는 효과가 있다.Therefore, according to the semiconductor device having the finger-type diffusion layer and the manufacturing method thereof according to the present invention, since the light receiving area is wider than the contact area by the finger structure, more light can be received and thus can be used as a high-sensitivity photodetection device. It has a higher reliability and efficiency, and can be operated at a relatively low voltage.
Description
본 발명은 포토다이오드에 관한 것으로, 특히 포토다이오드의 샐로우 확산층을 핑거구조로 제작하여 암전류를 줄이고 전체 전류 흐름을 증대시키도록 한 핑거형 확산층을 갖는 반도체장치와 그 제조방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a photodiode, and more particularly, to a semiconductor device having a finger diffusion layer for fabricating a shallow diffusion layer of a photodiode with a finger structure to reduce dark current and increase total current flow, and a method of manufacturing the same.
일반적으로, 광검출 소자는 광 신호를 검출하여 전기적인 신호로 변환하는 광시스템의 기본소자로서, 통신, 광학기기, 광센서 등에 널리 상용되고 있다. 포토다이오드는 현재 사용되고 있는 대표적 광검출 소자이며 대역폭, 신호 대 잡음비, 수광효율, 암전류 등이 주 특성요소이다.In general, a photodetector is a basic element of an optical system that detects an optical signal and converts it into an electrical signal, and is widely used in communications, optical devices, optical sensors, and the like. Photodiode is a representative photodetector currently in use and its main characteristics are bandwidth, signal-to-noise ratio, light receiving efficiency, and dark current.
가시광 영역에서의 응용을 위한 종래 포토다이오드는 주로 Si 재료로부터 만들어지며 일반적으로 도 1과 같은 pin구조를 이용하고 있는데, 수광부위를 따라 형성된 애노드전극(5)과, 기판(2)상부에 형성되는 에피텍셜층(3) 및 상기 에피텍셜층(3)의 상부를 이루는 확산층으로 이루어져 있으며 상기 확산층은 샐로우 확산층(4a)으로 이루어진다.Conventional photodiodes for application in the visible region are mainly made of Si material and generally use the pin structure as shown in FIG. 1, and are formed on the anode electrode 5 formed along the light receiving portion and on the substrate 2. An epitaxial layer 3 and a diffusion layer forming an upper portion of the epitaxial layer 3 are formed, and the diffusion layer is formed of a shallow diffusion layer 4a.
이와 같은 종래의 Si pin 포토다이오드는 반도체의 p층과 n층 사이에 높은 저항을 갖는 진성(Intrinsic)층을 성장시킨 구조로, 다른 구조의 포토다이오드에 비해 신뢰도가 높고, 낮은 전압에서 동작하며, 비교적 우수한 잡음 특성을 갖고 있다. Such a conventional Si pin photodiode is a structure in which an intrinsic layer having a high resistance is grown between a p layer and an n layer of a semiconductor. The Si pin photodiode is more reliable than other photodiodes of a different structure and operates at a low voltage. It has a relatively good noise characteristic.
그러나, 도 1과 같은 포토다이오드를 이용하여 단파장 영역의 미세광량을 검출하면, 대부분의 입사광은 표면에서 흡수되어 광생성 전류가 매우 낮게 나타난다. 또한, p-n 접합의 면적이 넓어 접합용량이 커지며 높은 암전류 특성으로 인해 고속 디지털 광신호 수신에서 대역폭의 제한과 낮은 신호대 잡음비의 문제점이 있다. 따라서 상기 포토다이오드를 고속 광검출기로 사용하거나 집적회로 소자로 구성하기 위해서는 가능한 작은 면적으로 고감도 특성을 갖는 구조의 포토다이오드 개발이 요구된다.However, when the amount of fine light in the short wavelength region is detected by using the photodiode as shown in FIG. 1, most incident light is absorbed from the surface and the photogeneration current is very low. In addition, the p-n junction has a large area, which increases the junction capacity, and there are problems of bandwidth limitation and low signal-to-noise ratio in high-speed digital optical signal reception due to high dark current characteristics. Therefore, in order to use the photodiode as a high-speed photodetector or to construct an integrated circuit device, it is required to develop a photodiode having a high sensitivity with a small area as much as possible.
본 발명은 상기와 같은 종래의 문제점을 감안하여 창안된 것으로, 본 발명의 목적은 p-n 접합면적에 비해 상대적으로 더 넓은 캐리어 수집영역을 갖도록 핑거형 확산층 구조를 실현할 수 있는 핑거형 확산층을 갖는 반도체장치와 이에 대한 제조방법을 제공하는 것이다. SUMMARY OF THE INVENTION The present invention has been made in view of the above-described conventional problems, and an object of the present invention is to provide a semiconductor device having a finger diffusion layer capable of realizing a finger diffusion layer structure having a relatively larger carrier collection area than a pn junction area. And to provide a method for this.
이러한 본 발명의 목적은, The purpose of this invention,
기판과;A substrate;
상기 기판 상에 형성되는 에피텍셜층과;An epitaxial layer formed on the substrate;
상기 에피텍셜층 내부에 이온주입법에 의하여 형성되는 n-웰층과;An n-well layer formed in the epitaxial layer by ion implantation;
상기 에피텍셜층 상부에 이온주입법에 의하여 수평바 형태가 다수개 배열되어 핑거형태로 형성되는 고농도 샐로우 확산층;을 포함하여 이루어지는 것을 특징으로 하는 핑거형 확산층을 갖는 반도체장치에 의하여 달성된다.It is achieved by a semiconductor device having a finger-type diffusion layer comprising a; high concentration shallow diffusion layer is formed in a plurality of horizontal bar form by the ion implantation method on the epitaxial layer.
또한, 상기 확산층의 상부에 광반사 방지막을 더 형성한 것이 바람직하다. In addition, it is preferable that a light reflection prevention film is further formed on the diffusion layer.
아울러, 이와같은 본 발명의 목적들은 Si 웨이퍼상에 에피텍셜층(p-층)을 형성하는 단계와;In addition, the object of the present invention is to form an epitaxial layer (p-layer) on the Si wafer;
n-웰층을 형성하는 단계와;forming an n-well layer;
n+ 확산층을 형성하는 단계와;forming an n + diffusion layer;
인접소자간의 완전한 격리를 위해 p+ 상부 격리 영역을 형성하는 단계 및 수평바 형태가 다수개 배열된 핑거형태의 구조로 P+ 샐로우 확산층을 형성하는 단계;를 포함하여 이루어지는 것을 특징으로 하는 핑거형 확산층을 갖는 반도체장치의 제조방법에 의하여 달성된다..Forming a P + shallow diffusion layer with a p-type upper isolation region for forming a complete isolation between adjacent devices and a finger structure having a plurality of horizontal bars; It is achieved by the manufacturing method of a semiconductor device having.
여기서, 광반사 방지막을 성장시키는 단계를 더 포함하는 것이 바람직하다.Here, it is preferable to further include the step of growing a light reflection prevention film.
또한, 접합깊이는 Si 웨이퍼는 700[um], p-는 5.0∼6.0[um], n+는 0.5∼0.7[um], p+는 0.2∼0.3[um]가 되는 것이 바람직하다.In addition, it is preferable that the junction depth is 700 [um] for the Si wafer, p- is 5.0 to 6.0 [um], n + is 0.5 to 0.7 [um], and p + is 0.2 to 0.3 [um].
시트저항은 Si 웨이퍼는 0.02[Ω/면적], p-는 10∼30[Ω/면적], n+는 60∼80[Ω/면적], p+는 110∼130[Ω/면적]가 되는 것이 바람직하다. The sheet resistance is preferably 0.02 [Ω / area] for the Si wafer, p− is 10 to 30 [Ω / area], n + is 60 to 80 [Ω / area], and p + is 110 to 130 [Ω / area]. Do.
n-웰의 공정은 이온주입, 도즈(Dose)량 5e+12[개수/cm3], 에너지 400keV, 확산(diffusion)시 1200℃에서 7시간 진행하는 것을 조건으로 하는 것이 바람직하다.The n-well process is preferably performed under conditions of 7 hours at 1200 ° C. during ion implantation, dose amount 5e + 12 [number / cm 3 ], energy 400keV, and diffusion.
이하에서는 본 발명에 따른 핑거형 확산층을 갖는 반도체장치와 그 제조방법에 관하여 첨부되어진 도면과 더불어 설명하기로한다.Hereinafter, a semiconductor device having a finger diffusion layer and a method of manufacturing the same according to the present invention will be described with reference to the accompanying drawings.
도 2는 본 발명에 따른 핑거형 확산층을 갖는 포토다이오드의 상면구조이고, 도 3은 본 발명에 따라 제작된 포토다이오드의 단면구조(도 2의 A-A' 위치에서의 단면구조)로서, 이를 참조하여 설명하면 다음과 같다.2 is a top structure of a photodiode having a finger diffusion layer according to the present invention, Figure 3 is a cross-sectional structure (cross-sectional structure at the AA 'position of Figure 2) of the photodiode manufactured according to the present invention, with reference to this The explanation is as follows.
포토다이오드가 디지털 광신호에 대해 우수한 신호분리 능력과 빠른 신호응답을 얻기 위해서는 낮은 암전류, 높은 광전류 그리고 낮은 접합 커패시턴스의 특성을 가져야 하며, 이를 위해 포토다이오드의 접합 면적은 가능한 작아야 하며, 입사광은 충분히 넓은 전계영역에서 흡수되어야 한다. 이를 위해 본 발명에서는 새로운 핑거형 확산층을 갖는 포토다이오드를 도 2와 같이 설계하고, 씨모스기술을 이용하여 도 3과 같은 단면구조를 갖도록 제작하였다.The photodiode needs to have low dark current, high photocurrent and low junction capacitance in order to obtain excellent signal separation and fast signal response to digital optical signals.The junction area of the photodiode should be as small as possible, and the incident light should be large enough. It must be absorbed in the electric field. To this end, in the present invention, a photodiode having a new finger-type diffusion layer is designed as shown in FIG. 2 and manufactured to have a cross-sectional structure as shown in FIG. 3 by using CMOS technology.
설계된 포토다이오드의 구조를 살펴보면, 빛이 입사되는 p+ 샐로우 확산층(50)의 영역은 핑거 형태로 배치된다.Looking at the structure of the designed photodiode, the region of the p + shallow diffusion layer 50 to which light is incident is disposed in the shape of a finger.
이는 수광면적에 비해 접합면적을 줄임으로써 암전류를 줄이고, 공간 전하층의 전계영역을 수평적으로 확장시켜 단파장에서의 광생성에 의한 캐리어 수집 효율을 증가시키기 위함이다.This is to reduce the dark current by reducing the junction area compared to the light receiving area, and to horizontally expand the electric field region of the space charge layer to increase the carrier collection efficiency by light generation at short wavelengths.
상기 도 2 및 도 3을 좀더 부연하여 설명하면 다음과 같다.2 and 3 will be described in more detail as follows.
기판(Si 웨이퍼)(10)상에 에피텍셜층(p-층)(20)이 형성되고, 상기 에피텍셜층(20)내부에 이온주입되어 n-웰층(30)이 형성된다.An epitaxial layer (p-layer) 20 is formed on the substrate (Si wafer) 10, and ion implanted into the epitaxial layer 20 to form an n-well layer 30.
또한, 인접소자간의 완전한 격리를 위해 p+ 상부 격리영역(40)이 형성된다.In addition, p + upper isolation region 40 is formed for complete isolation between adjacent elements.
또한, 상기 에피텍셜층(20)상부에 이온주입에 의하여 핑거형태로 수평바 형태가 다수개 배열되어 핑거형태로 고농도 샐로우 확산층(50)이 형성된다.In addition, a plurality of horizontal bar shapes are arranged in a finger shape by ion implantation on the epitaxial layer 20 to form a high density shallow diffusion layer 50 in a finger shape.
또한, 상기 확산층의 상부에 광반사 방지막(60)을 형성된다.In addition, an antireflection film 60 is formed on the diffusion layer.
도 4는 CMOS 제작공정과 포토다이오드 제작공정을 나타낸 도면으로서 도 3 및 도 5와 연관하여 설명하면 다음과 같다.4 is a diagram illustrating a CMOS fabrication process and a photodiode fabrication process, which will be described below with reference to FIGS. 3 and 5.
1. CMOS process(도 4 참조)CMOS process (see Figure 4)
Well 형성->Field oxide 형성->gate 형성->N+영역 형성->P+영역 형성->contact 형성->metallization(전극형성)Well formation-> Field oxide formation-> Gate formation-> N + region formation-> P + region formation-> contact formation-> metallization
2. PD(Photo Diode) process(도 4 참조)2.Photo Diode (PD) process (see Figure 4)
Well 형성->Field oxide 형성->N+영역 형성->P+영역 형성->Anti reflection layer 형성->contact 형성->metallization(전극형성)Well formation-> Field oxide formation-> N + region formation-> P + region formation-> Anti reflection layer formation-> Contact formation-> metallization
CMOS 공정에서 well 형성시 N-well 마스크와 P-well 마스크 두장이 필요한데(도 5 참조), Photo Diode 공정에서 제작하는 소자는 N-well 마스크 한 장만 사용하며(도 3 참조), CMOS 공정에서 positive P.R.(photo resistor)을 사용하여 N-well을 형성하고 negative P.R.을 사용하여 P-well을 형성한다.Two well N-well masks and two P-well masks are required to form wells in the CMOS process (see Fig. 5) .The device fabricated in the Photo Diode process uses only one N-well mask (see Fig. 3). N-well is formed using photo resistor (PR) and P-well is formed using negative PR.
이후 field oxide를 형성하고 gate 형성은 CMOS쪽에만 하게된다. 이후 N+과 P+영역은 CMOS와 Photo diode가 동일하게 진행되며 AR(Anti reflection) layer의 경우 CMOS에는 형성되지 않는다. 이후 contact과 metallization은 동일하게 진행된다.After that, the field oxide is formed and the gate is formed only on the CMOS side. Afterwards, the N + and P + regions have the same CMOS and photo diodes, and the AR (anti reflection) layer is not formed in the CMOS. Then contact and metallization proceed in the same way.
Photo Diode 소자의 parameter는 다음과 같다.The parameters of the Photo Diode device are as follows.
상기 N+의 접합깊이는 0.6[um], 상기 P+의 접합깊이는 0.25[um], 상기 P-의 접합깊The junction depth of N + is 0.6 [um], the junction depth of P + is 0.25 [um], and the junction depth of P-
이는 5.5[um], 상기 P_sub의 접합깊이는 700[um]가 적절하다.It is appropriate that 5.5 [um] and the junction depth of P_sub be 700 [um].
상기 N+의 시트저항은 70[Ω /면적](또는 [Ω /square]), 상기 P+의 시트저항은 120[Ω /면적], 상기 P-의 시트저항은 20[Ω /면적]이 적절하다.The sheet resistance of N + is 70 [Ω / area] (or [Ω / square]), the sheet resistance of P + is 120 [Ω / area], and the sheet resistance of P- is 20 [Ω / area]. .
N-Well의 parameter의 공정 조건은 이온주입법(implant)을 사용하고 도즈(Dose)량은 5e+12[개수/cm3]이며 에너지는 400keV를 사용한다. 또한 확산(diffusion)은 1200℃ 에서 7시간 진행된다.The process conditions of N-Well parameters are ion implanted, the dose is 5e + 12 [number / cm 3 ], and the energy is 400 keV. Diffusion also proceeds at 1200 ° C. for 7 hours.
이온주입법은 ion implant라는 장비로 웨이퍼에 음이온이나 양이온을 넣는 방법이고, 도즈량은 웨이퍼에 집어넣을 이온의 양이며, 에너지는 ion implant가 웨이퍼에 이온을 집어 넣을때 장비에서 이온을 가속시키는데 그때 이온이 갖는 에너지로 일종의 이온을 쏘는 총이라고 보면 된다. Ion implantation is a method of implanting negative ions or positive ions into the wafer with an ion implant, the dose is the amount of ions to be inserted into the wafer, and the energy is accelerated by the device when the ion implant ions into the wafer. This energy is a kind of gun that shoots ions.
상기 도 5를 좀더 부연하여 설명하면 다음과 같다.5 will be described in more detail as follows.
현재, Photo diode는 BJT(Bipolar Junction Transistor)공정으로 제작되고 있으나 CMOS 공정을 사용하여 크기 및 소모전력을 감소시킨다.Currently, photo diodes are manufactured by BJT (Bipolar Junction Transistor) process, but they use CMOS process to reduce size and power consumption.
일반적인 CMOS공정과의 차이점은 일반적인 CMOS의 경우 p-type substrate에서 p-channel MOS영역에 n-well을 형성하거나 p-channel MOS영역에 n-well과 n-channel MOS영역에 p-well을 모두 형성하지만, photo diode의 경우 p-channel과 n-channel의 구분없이 p-well이 형성될 부분에 n-well을 형성한다.The difference from the general CMOS process is that in the case of general CMOS, n-well is formed in p-channel MOS region on p-type substrate or both n-well and p-well is formed in p-channel MOS region. However, in the case of a photo diode, an n-well is formed at a portion where a p-well is to be formed without distinguishing between p-channel and n-channel.
도 6은 본 발명에 따른 포토다이오드와 종래의 포토다이오드 간의 캐리어 수집영역 비교도이다. 6 is a comparison diagram of a carrier collection region between a photodiode and a conventional photodiode according to the present invention.
도 6에서와 같이, 핑거 구조의 포토다이오드와 기존의 포토다오드간에 유효접합면적과 공간 전하영역의 전계분포 차이를 보여주고 있다. 반도체 표면으로 입사되는 광속(Fph)은 파장에 따른 흡수계수(α)를 갖고 거리에 따라 지수함수적으로 감소된다.(F(x)=Fph e-αx)As shown in FIG. 6, the difference in the electric field distribution between the effective junction area and the space charge region is shown between the photodiode of the finger structure and the conventional photodiode. The light flux F ph incident on the semiconductor surface has an absorption coefficient α depending on the wavelength and decreases exponentially with distance (F (x) = F ph e -αx ).
반도체 광이 흡수되면 전자-정공 쌍이 발생되는데 접합위치로부터 D=W(공간전하영역의 폭)+Lp(정공의 확산길이)거리 내에서 흡수되는 광은 광생성 전류를 형성한다.When the semiconductor light is absorbed, electron-hole pairs are generated. Light absorbed within the distance D = W (width of the space charge region) + L p (hole diffusion length) from the junction forms a photo-generation current.
이에 따라 핑거 구조의 포토다이오드가 표면으로부터 훨씬 넓은 영역에 걸쳐 캐리어를 수집할 수 있음으로 기존의 포토다이오드보다 더 큰 광생성 전류가 발생됨을 알 수 있다.Accordingly, it can be seen that the photodiode of the finger structure can collect carriers over a much larger area from the surface, thereby generating a larger photogeneration current than the conventional photodiode.
또한 핑거구조의 포토다이오드는 p-n 접합의 면적이 명백히 감소됨으로 기존의 포토다이오드보다 낮은 암전류 및 낮은 접합 커패시턴스 특성을 갖게 된다.In addition, the photodiode of the finger structure has a lower dark current and lower junction capacitance than the conventional photodiode because the p-n junction area is clearly reduced.
따라서 동일한 수광 면적으로 제작될 경우 핑거 구조의 포토다이오드는 기존의 포토다이오드 보다 감도특성이 우수하고 신호응답속도가 빠르게 나타난다. 나아가, 핑거 구조의 포토다이오드를 집적회로 소자로서 광수신부(Optical Link Receiver) IC(Integrated circuit)에 응용할 경우, 기존의 포토다이오드를 이용하는 것보다 일정한 세기의 광전류를 얻기 위해 필요한 설계면적을 줄일 수 있다. Therefore, when fabricated with the same light receiving area, the photodiode of the finger structure has better sensitivity and signal response speed than the conventional photodiode. Furthermore, when a photodiode with a finger structure is applied to an optical link receiver integrated circuit (IC) as an integrated circuit device, it is possible to reduce the design area required to obtain a photocurrent having a constant intensity than using a conventional photodiode. .
이상에서와 같은 본 발명에 따른 핑거형 확산층을 갖는 반도체장치와 그 제조방법에 따르면, 핑거 구조에 의해 접촉면적에 비해 상대적으로 수광면적이 넓음으로 인하여 보다 많은 빛을 받아들일 수 있다.According to the semiconductor device having a finger-type diffusion layer and a method of manufacturing the same according to the present invention as described above, more light can be received due to the larger light receiving area than the contact area by the finger structure.
이에 따라 고감도의 광검출소자로서 이용될 수 있어 보다 높은 신뢰도와 효율을 갖으며, 비교적 낮은 전압에서도 동작 될 수 있는 효과가 있다.Accordingly, it can be used as a high-sensitivity photodetector, which has higher reliability and efficiency, and can be operated at a relatively low voltage.
도 1은 종래의 포토다이오드 구조도. 1 is a conventional photodiode structure diagram.
도 2는 본 발명에 따른 핑거형 확산층을 갖는 포토다이오드의 상면도. 2 is a top view of a photodiode having a finger diffusion layer according to the present invention.
도 3은 본 발명에 따라 제작된 포토다이오드의 단면도. 3 is a cross-sectional view of a photodiode manufactured according to the present invention.
도 4는 CMOS 제작공정과 포토다이오드 제작공정도. 4 is a CMOS fabrication process and a photodiode fabrication process.
도 5는 CMOS의 제작 단면도. 5 is a cross-sectional view of fabrication of CMOS.
도 6은 본 발명에 따른 포토다이오드와 종래 포토다이오드 간의 캐리어 수집영역 비교도. Figure 6 is a comparison of the carrier collection area between the photodiode and the conventional photodiode according to the present invention.
<도면의 주요부분에 따른 부호의 설명><Description of the code according to the main part of the drawing>
1: 포토다이오드 2: 기판 1: photodiode 2: substrate
3: 에피텍셜층 4a: 샐로우확산층 3: epitaxial layer 4a: shallow diffusion layer
4b: 딥 확산층 5: 애노드전극 4b: deep diffusion layer 5: anode electrode
10: 기판 20: 에피텍셜층 10: substrate 20: epitaxial layer
30: n-웰 40: 격리영역 30: n-well 40: isolation region
50: 샐로우확산층 60: 광반사방지막 50: shallow diffusion layer 60: antireflection film
100: 포토다이오드100: photodiode
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7816684B2 (en) | 2007-09-14 | 2010-10-19 | Samsung Mobile Display Co., Ltd. | Light emitting display device and method of fabricating the same |
| US7977126B2 (en) | 2007-07-04 | 2011-07-12 | Samsung Mobile Display Co., Ltd. | Method of manufacturing organic light emitting device having photo diode |
| US8076669B2 (en) | 2007-09-14 | 2011-12-13 | Samsung Mobile Display Co., Ltd. | Organic light emitting display and method of manufacturing the same |
| US8143142B2 (en) | 2009-03-13 | 2012-03-27 | Samsung Electronics Co., Ltd. | Method of fabricating epi-wafer, epi-wafer fabricated by the method, and image sensor fabricated using the epi-wafer |
| US8592881B2 (en) | 2007-07-04 | 2013-11-26 | Samsung Display Co., Ltd. | Organic light emitting element and method of manufacturing the same |
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2004
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7977126B2 (en) | 2007-07-04 | 2011-07-12 | Samsung Mobile Display Co., Ltd. | Method of manufacturing organic light emitting device having photo diode |
| US8592881B2 (en) | 2007-07-04 | 2013-11-26 | Samsung Display Co., Ltd. | Organic light emitting element and method of manufacturing the same |
| US9368558B2 (en) | 2007-07-04 | 2016-06-14 | Samsung Display Co., Ltd. | Organic light emitting element and method of manufacturing the same |
| US7816684B2 (en) | 2007-09-14 | 2010-10-19 | Samsung Mobile Display Co., Ltd. | Light emitting display device and method of fabricating the same |
| US8076669B2 (en) | 2007-09-14 | 2011-12-13 | Samsung Mobile Display Co., Ltd. | Organic light emitting display and method of manufacturing the same |
| US8143142B2 (en) | 2009-03-13 | 2012-03-27 | Samsung Electronics Co., Ltd. | Method of fabricating epi-wafer, epi-wafer fabricated by the method, and image sensor fabricated using the epi-wafer |
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